Patents by Inventor Craig Mitchell
Craig Mitchell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170256443Abstract: A microelectronic unit can include a carrier structure having a front surface, a rear surface remote from the front surface, and a recess having an opening at the front surface and an inner surface located below the front surface of the carrier structure. The microelectronic unit can also include a microelectronic element having a top surface adjacent the inner surface, a bottom surface remote from the top surface, and a plurality of contacts at the top surface. The microelectronic unit can also include terminals electrically connected with the contacts of the microelectronic element. The terminals can be electrically insulated from the carrier structure. The microelectronic unit can also include a dielectric region contacting at least the bottom surface of the microelectronic element. The dielectric region can define a planar surface located coplanar with or above the front surface of the carrier structure.Type: ApplicationFiled: May 19, 2017Publication date: September 7, 2017Inventors: Vage Oganesian, Belgacem Haba, Craig Mitchell, Ilyas Mohammed, Piyush Savalia
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Patent number: 9711401Abstract: Methods and apparatus for forming a semiconductor device are provided which may include any number of features. One feature is a method of forming an interconnect structure that results in the interconnect structure having a top surface and portions of the side walls of the interconnect structure covered in a dissimilar material. In some embodiments, the dissimilar material can be a conductive material or a nano-alloy. The interconnect structure can be formed by removing a portion of the interconnect structure, and covering the interconnect structure with the dissimilar material. The interconnect structure can comprise a damascene structure, such as a single or dual damascene structure, or alternatively, can comprise a silicon-through via (TSV) structure.Type: GrantFiled: June 28, 2016Date of Patent: July 18, 2017Assignee: Tessera, Inc.Inventors: Cyprian Emeka Uzoh, Belgacem Haba, Craig Mitchell
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Publication number: 20170167680Abstract: A vehicle lighting assembly and method includes an LED light source mounted on a vehicle and a multi-tube condensing structure arranged to condense light from the LED light source. The multi-tube condensing structure has a first end face for receiving light from the LED light source and a second end face spaced apart from the first end face for dispersing the light received from the LED light source. The first end face has a first end face surface area and the second end face has a second end face surface area. The second end face surface area is less than the first end face surface area to thereby condense the light received from the LED light source.Type: ApplicationFiled: December 11, 2015Publication date: June 15, 2017Inventors: Craig Mitchell, Jeffrey Grix
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Patent number: 9669758Abstract: An alert system within a vehicle including a sensor and at least one speaker that generates at least one air thrust when a sensor detects a hazardous condition. The frequency and strength of the at least one air thrust varies based on the awareness level of the driver. In one embodiment, at least one air thrust is directed towards the driver from the direction of the hazardous condition. The hazardous condition may include, but is not limited to the driver falling asleep or a vehicle running a red light.Type: GrantFiled: July 30, 2015Date of Patent: June 6, 2017Assignee: Honda Motor Co., Ltd.Inventors: Zeljko Medenica, Craig Mitchell, Bradford D Kent, Jeffrey Grix
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Patent number: 9659812Abstract: A microelectronic unit can include a carrier structure having a front surface, a rear surface remote from the front surface, and a recess having an opening at the front surface and an inner surface located below the front surface of the carrier structure. The microelectronic unit can also include a microelectronic element having a top surface adjacent the inner surface, a bottom surface remote from the top surface, and a plurality of contacts at the top surface. The microelectronic unit can also include terminals electrically connected with the contacts of the microelectronic element. The terminals can be electrically insulated from the carrier structure. The microelectronic unit can also include a dielectric region contacting at least the bottom surface of the microelectronic element. The dielectric region can define a planar surface located coplanar with or above the front surface of the carrier structure.Type: GrantFiled: May 11, 2015Date of Patent: May 23, 2017Assignee: Tessera, Inc.Inventors: Vage Oganesian, Belgacem Haba, Craig Mitchell, Ilyas Mohammed, Piyush Savalia
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Patent number: 9640437Abstract: A method of fabricating a microelectronic unit includes providing a semiconductor element having a front surface and a rear surface remote from the front surface, forming at least one first opening extending from the rear surface partially through the semiconductor element towards the front surface by directing a jet of fine abrasive particles towards the semiconductor element, and forming at least one conductive contact and at least one conductive interconnect coupled thereto. The semiconductor element can include a plurality of active semiconductor devices therein. The semiconductor element can include a plurality of conductive pads exposed at the front surface. Each conductive interconnect can extend within one or more of the first openings and can be coupled directly or indirectly to at least one of the conductive pads. Each of the conductive contacts can be exposed at the rear surface of the semiconductor element for electrical connection to an external device.Type: GrantFiled: July 23, 2010Date of Patent: May 2, 2017Assignee: Tessera, Inc.Inventors: Vage Oganesian, Belgacem Haba, Craig Mitchell, Ilyas Mohammed, Piyush Savalia
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Patent number: 9634412Abstract: Electrical contacts comprising a surface with a plurality of cavities therein and their methods of manufacture and use.Type: GrantFiled: July 15, 2011Date of Patent: April 25, 2017Assignee: Tessera, Inc.Inventors: Cyprian Uzoh, Craig Mitchell
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Patent number: 9620437Abstract: A microelectronic assembly is provided which includes a first element consisting essentially of at least one of semiconductor or inorganic dielectric material having a surface facing and attached to a major surface of a microelectronic element at which a plurality of conductive pads are exposed, the microelectronic element having active semiconductor devices therein. A first opening extends from an exposed surface of the first element towards the surface attached to the microelectronic element, and a second opening extends from the first opening to a first one of the conductive pads, wherein where the first and second openings meet, interior surfaces of the first and second openings extend at different angles relative to the major surface of the microelectronic element. A conductive element extends within the first and second openings and contacts the at least one conductive pad.Type: GrantFiled: February 18, 2016Date of Patent: April 11, 2017Assignee: Tessera, Inc.Inventors: Vage Oganesian, Belgacem Haba, Ilyas Mohammed, Craig Mitchell, Piyush Savalia
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Publication number: 20170028911Abstract: An alert system within a vehicle including a sensor and at least one speaker that generates at least one air thrust when a sensor detects a hazardous condition. The frequency and strength of the at least one air thrust varies based on the awareness level of the driver. In one embodiment, at least one air thrust is directed towards the driver from the direction of the hazardous condition. The hazardous condition may include, but is not limited to the driver falling asleep or a vehicle running a red light.Type: ApplicationFiled: July 30, 2015Publication date: February 2, 2017Inventors: Zeljko Medenica, Craig Mitchell, Bradford D. Kent, Jeffrey Grix
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Patent number: 9560773Abstract: An electrical connection structure includes a variable-composition nickel alloy layer with a minor constituent selected from a group consisting of boron, carbon, phosphorus, and tungsten, wherein at least over a portion of a conductive substrate, the concentration of the minor constituent decreases throughout the variable-composition nickel alloy layer in a direction from the bottom surface of the variable-composition nickel alloy layer to the top surface of the variable-composition nickel alloy layer.Type: GrantFiled: July 24, 2015Date of Patent: January 31, 2017Assignee: Tessera, Inc.Inventors: Cyprian Uzoh, Vage Oganesian, Ilyas Mohammed, Belgacem Haba, Piyush Savalia, Craig Mitchell
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Publication number: 20160230493Abstract: A connection arrangement for use in establishing a connection with an object includes a body and a connection member comprising a plurality of dogs each pivotally arranged relative to the body about a pivot axis and including an engagement feature, wherein the dogs are pivotal between an engaged configuration in which the engagement feature is engaged with the object to provide a connection thereto, and a disengaged configuration in which the engagement feature is disengaged from the object. The connection arrangement further includes an actuator member, wherein the dogs and actuator member define a pair of complementary actuation surfaces which cooperate when the actuator member moves from a first to a second direction to cause the plurality of dogs to pivot from the engaged configuration towards the disengaged configuration. A first actuation surface on the actuator member includes a first cam and a second cam which are in continuous contact with a second actuation surface on the plurality of dogs.Type: ApplicationFiled: October 7, 2014Publication date: August 11, 2016Inventors: Alan Tennant, Keith Taylor, Scott Charles, Craig Mitchell
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Publication number: 20160233165Abstract: A structure including a first semiconductor chip with front and rear surfaces and a cavity in the rear surface. A second semiconductor chip is mounted within the cavity. The first chip may have vias extending from the cavity to the front surface and via conductors within these vias serving to connect the additional microelectronic element to the active elements of the first chip. The structure may have a volume comparable to that of the first chip alone and yet provide the functionality of a multi-chip assembly. A composite chip incorporating a body and a layer of semiconductor material mounted on a front surface of the body similarly may have a cavity extending into the body from the rear surface and may have an additional microelectronic element mounted in such cavity.Type: ApplicationFiled: April 18, 2016Publication date: August 11, 2016Inventors: Vage Oganesian, Ilyas Mohammed, Craig Mitchell, Belgacem Haba, Piyush Savalia
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Patent number: 9385036Abstract: Methods and apparatus for forming a semiconductor device are provided which may include any number of features. One feature is a method of forming an interconnect structure that results in the interconnect structure having a top surface and portions of the side walls of the interconnect structure covered in a dissimilar material. In some embodiments, the dissimilar material can be a conductive material or a nano-alloy. The interconnect structure can be formed by removing a portion of the interconnect structure, and covering the interconnect structure with the dissimilar material. The interconnect structure can comprise a damascene structure, such as a single or dual damascene structure, or alternatively, can comprise a silicon-through via (TSV) structure.Type: GrantFiled: July 11, 2014Date of Patent: July 5, 2016Assignee: Invensas CorporationInventors: Cyprian Emeka Uzoh, Belgacem Haba, Craig Mitchell
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Patent number: 9368476Abstract: A microelectronic assembly is provided in which first and second electrically conductive pads exposed at front surfaces of first and second microelectronic elements, respectively, are juxtaposed, each of the microelectronic elements embodying active semiconductor devices. An electrically conductive element may extend within a first opening extending from a rear surface of the first microelectronic element towards the front surface thereof, within a second opening extending from the first opening towards the front surface of the first microelectronic element, and within a third opening extending through at least one of the first and second pads to contact the first and second pads. Interior surfaces of the first and second openings may extend in first and second directions relative to the front surface of the first microelectronic element, respectively, to define a substantial angle.Type: GrantFiled: July 28, 2015Date of Patent: June 14, 2016Assignee: Tessera, Inc.Inventors: Vage Oganesian, Belgacem Haba, Ilyas Mohammed, Craig Mitchell, Piyush Savalia
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Publication number: 20160163620Abstract: A microelectronic assembly is provided which includes a first element consisting essentially of at least one of semiconductor or inorganic dielectric material having a surface facing and attached to a major surface of a microelectronic element at which a plurality of conductive pads are exposed, the microelectronic element having active semiconductor devices therein. A first opening extends from an exposed surface of the first element towards the surface attached to the microelectronic element, and a second opening extends from the first opening to a first one of the conductive pads, wherein where the first and second openings meet, interior surfaces of the first and second openings extend at different angles relative to the major surface of the microelectronic element. A conductive element extends within the first and second openings and contacts the at least one conductive pad.Type: ApplicationFiled: February 18, 2016Publication date: June 9, 2016Applicant: Tessera, Inc.Inventors: Vage Oganesian, Belgacem Haba, Ilyas Mohammed, Craig Mitchell, Piyush Savalia
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Patent number: 9362203Abstract: A method of fabricating a semiconductor assembly can include providing a semiconductor element having a front surface, a rear surface, and a plurality of conductive pads, forming at least one hole extending at least through a respective one of the conductive pads by processing applied to the respective conductive pad from above the front surface, forming an opening extending from the rear surface at least partially through a thickness of the semiconductor element, such that the at least one hole and the opening meet at a location between the front and rear surfaces, and forming at least one conductive element exposed at the rear surface for electrical connection to an external device, the at least one conductive element extending within the at least one hole and at least into the opening, the conductive element being electrically connected with the respective conductive pad.Type: GrantFiled: September 27, 2014Date of Patent: June 7, 2016Assignee: Tessera, Inc.Inventors: Vage Oganesian, Belgacem Haba, Ilyas Mohammed, Craig Mitchell, Piyush Savalia
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Patent number: 9355948Abstract: A microelectronic unit includes a semiconductor element consisting essentially of semiconductor material and having a front surface, a rear surface, a plurality of active semiconductor devices adjacent the front surface, a plurality of conductive pads exposed at the front surface, and an opening extending through the semiconductor element. At least one of the conductive pads can at least partially overlie the opening and can be electrically connected with at least one of the active semiconductor devices. The microelectronic unit can also include a first conductive element exposed at the rear surface for connection with an external component, the first conductive element extending through the opening and electrically connected with the at least one conductive pad, and a second conductive element extending through the opening and insulated from the first conductive element. The at least one conductive pad can overlie a peripheral edge of the second conductive element.Type: GrantFiled: July 24, 2014Date of Patent: May 31, 2016Assignee: Tessera, Inc.Inventors: Vage Oganesian, Belgacem Haba, Ilyas Mohammed, Craig Mitchell, Piyush Savalia
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Patent number: 9355901Abstract: A method of forming a conductive element on a substrate and the resulting assembly are provided. The method includes forming a groove in a sacrificial layer overlying a dielectric region disposed on a substrate. The groove preferably extends along a sloped surface of the substrate. The sacrificial layer is preferably removed by a non-photolithographic method, such as ablating with a laser, mechanical milling, or sandblasting. A conductive element is formed in the groove. The grooves may be formed. The grooves and conductive elements may be formed along any surface of the substrate, including within trenches and vias formed therein, and may connect to conductive pads on the front and/or rear surface of the substrate. The conductive elements are preferably formed by plating and may or may not conform to the surface of the substrate.Type: GrantFiled: April 14, 2015Date of Patent: May 31, 2016Assignee: Tessera, Inc.Inventors: Vage Oganesian, Belgacem Haba, Ilyas Mohammed, Craig Mitchell, Piyush Savalia
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Patent number: 9355959Abstract: A structure including a first semiconductor chip with front and rear surfaces and a cavity in the rear surface. A second semiconductor chip is mounted within the cavity. The first chip may have vias extending from the cavity to the front surface and via conductors within these vias serving to connect the additional microelectronic element to the active elements of the first chip. The structure may have a volume comparable to that of the first chip alone and yet provide the functionality of a multi-chip assembly. A composite chip incorporating a body and a layer of semiconductor material mounted on a front surface of the body similarly may have a cavity extending into the body from the rear surface and may have an additional microelectronic element mounted in such cavity.Type: GrantFiled: December 2, 2013Date of Patent: May 31, 2016Assignee: Tessera, Inc.Inventors: Vage Oganesian, Ilyas Mohammed, Craig Mitchell, Belgacem Haba, Piyush Savalia
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Patent number: 9349669Abstract: A microelectronic component with circuitry includes a substrate (possibly semiconductor) having an opening in a top surface. The circuitry includes a conductive via (possibly metal) in the opening. The opening has a first sidewall of a first material, and the conductive via has a second sidewall of a second material (possibly metal). At least at one side of the opening, the first and second sidewalls are spaced from each other at the top surface of the substrate but the first and second sidewalls meet below the top surface of the substrate at a meeting location. Between the meeting location and the top surface of the substrate, the first and second sidewalls are separated by a third material (possibly foam) which is a dielectric different from the first material. The third material lowers thermal stress in case of thermal expansion compared to a structure in which the third material were replaced with the second material.Type: GrantFiled: March 10, 2015Date of Patent: May 24, 2016Assignee: Invensas CorporationInventors: Cyprian Emeka Uzoh, Charles G. Woychik, Terrence Caskey, Kishor V. Desai, Huailiang Wei, Craig Mitchell, Belgacem Haba