Abstract: A method for forming a gate structure begins by preparing a semiconductor substrate provided with an isolation region formed therein. An AlN layer is formed on top of the semiconductor substrate and annealed in the presence of oxygen gas to convert into an Al2O3 layer. Thereafter, a conductive layer is formed on top of the Al2O3 layer. Finally, the conductive layer and the Al2O3 layer are patterned into the gate structure.

Abstract: A method for forming a gate structure beginning with a semiconductor substrate provided with an isolation region formed therein. An HfO2 layer and a conductive layer are formed on the semiconductor substrate, subsequently. The conductive layer and the HfO2 layer are patterned into the gate structure. By utilizing an HfO2 layer as a gate dielectric, an effective K of the gate dielectric can be controlled to within 18 to 25. In addition, by employing a CVD method for forming the HfO2 layer, it is possible to obtain a high K gate dielectric with excellent leakage current characteristic as well as a low interface state with both a gate electrode and a semiconductor substrate.

Abstract: The present invention discloses a method for forming a gate for semiconductor devices by depositing a TaOxNy film as a gate oxide film. The method includes the steps of providing a semiconductor substrate where a device isolation film has been formed, growing an SiO2 or SiON film on the semiconductor substrate, depositing an amorphous TaOxNy film on the SiO2 or SiON film, performing a low temperature annealing process to improve quality of the amorphous TaOxNy film, performing a high temperature annealing process ex-situ to remove organic substances and nitrogen in the amorphous TaOxNy film, and crystallize the amorphous TaOxNy film, and depositing a metal barrier film on the crystallized TaOxNy film, and depositing a polysilicon film or metal film for a gate electrode on the metal barrier film.

Abstract: A method of manufacturing a gate in a semiconductor device is disclosed. The method forms a TiAlN film as a barrier layer between a gate insulating film and a metal gate by CVD method or PVD method resulting in the prevention of a leakage current and the obtaining of a low threshold voltage.

Abstract: A method for forming a lower electrode structure of a capacitor of a semiconductor device, includes the steps of: forming an active region in a semiconductor substrate; forming an insulation layer atop the semiconductor substrate having the active region formed therein; forming a contact hole in the insulation layer, the contact hole exposing the active region; forming a conductive plug connected to the active region through the contact hole, the conductive plug having an upper contact surface; forming a silicide contact on the upper contact surface of the conductive plug; forming a lower electrode layer in electrical contact with the silicide contact, by depositing titanium aluminum nitride on the insulation layer; and patterning the lower electrode layer to form a lower electrode having an upper surface. A natural oxide film is prevented from generating between the interface of the plug and the lower electrode.

Abstract: A method for forming a gate structure begins by preparing a semiconductor substrate provided with an isolation region formed therein. A thin SiO2 layer is thermally grown on top of the semiconductor device by using a wet H2/O2 or a dry O2. And then, an aluminum oxide layer is formed on top of the semiconductor substrate with doping a dopant in situ. A conductive layer is formed on top of the Al2O3 layer. Finally, the conductive layer and the Al2O3 layer are patterned into the gate structure. The dopant is a material selected from a group consisting of Si, Zr, Hf, Nb or the like.

Abstract: A method for forming a gate structure begins by preparing a semiconductor substrate provided with an isolation region formed therein. An aluminum oxide (Al2O3) layer is deposited on top of the semiconductor substrate and then, silicon ions plasma doping is carried out. Thereafter, the Al2O3 layer doped with silicon ions is annealed in the presence of oxygen gas or nitrous oxygen to remove a metallic vacancy in the Al2O3 layer. Subsequently, a conductive layer is formed on top of the Al2O3 layer. Finally, the conductive layer is patterned into the gate structure.

Abstract: A method for fabricating a capacitor of a semiconductor memory device includes forming a titanium aluminum nitride layer, satisfying Ti1-xAlxN, where x<1, as a diffusion inhibiting film on a platinum upper layer for forming the capacitor's upper electrode.

Abstract: The 2-stage fluidized bed furnace for pre-reducing a fine iron ore comprises a first stage fluidized bed furnace for receiving the fine iron ore from a storage hopper, discharging medium/small particle size iron ore to the upper part thereof, and reducing a coarse particle size iron ore while forming a bubbling fluidized bed; a second stage fluidized bed furnace for receiving the medium/small particle size iron ore discharged from the upper part of the first stage and reducing it while forming a turbulent fluidized bed; and a first hot cyclone for collecting the small particle size iron ore contained in the discharged gas from the second stage fluidized bed furnace, the first stage furnace being formed in an upper-narrowed, lower-expanded shape and comprising a narrow, upper portion, a transitional, slanted portion and a wide, lower portion, the second stage furnace being in an upper-expanded, lower-narrowed shape and comprising a wide, upper portion, a transitional, slanted portion and a narrow, lower portio