Patents by Inventor Dae Han Kim
Dae Han Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11942162Abstract: A method for operating a memory device is provided. The method includes providing a high voltage signal to a memory cell array including a plurality of memory cells using a first wiring, providing a logic signal to the memory cell array using a second wiring, and providing a shielding signal to the memory cell array using a third wiring arranged between the first wiring and the second wiring. A highest voltage level of the logic signal is lower than a highest voltage level of the high voltage signal, and the shielding signal includes a negative first voltage level in a first mode and a positive second voltage level in a second mode.Type: GrantFiled: May 4, 2022Date of Patent: March 26, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyung Soo Kim, Dae Han Kim, Jong Min Kim, Myoung Won Yoon
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Publication number: 20240063041Abstract: Provided is a heavy-duty probe card transfer and loading device including a main body that moves along a set travel route, a loading arm assembly including an up-down unit coupled to the main body and configured to perform a lifting and lowering operation, a first arm drive unit rotatably coupled to the up-down unit, and a second arm drive unit rotatably coupled to the other end of the first arm drive unit, and a gripper unit rotatably coupled to the second arm drive part to grip a heavy-duty probe card and place the same on the main body.Type: ApplicationFiled: August 18, 2023Publication date: February 22, 2024Inventors: Ki Tae Kim, Jung Shik LEE, Dae Han KIM, WOON SEAP JANG, SANG KYUN PARK, DONG HYUG OH
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Patent number: 11830603Abstract: Disclosed are a system and a method for providing nutritional information based on image analysis using artificial intelligence. The system includes: at least one imaging device acquiring at least one image including at least one dish or at least one food contained in each dish; a service providing apparatus for detecting at least one food included in the at least one image when the at least one image is received, confirming the name of each detected food on the basis of a learning model, mapping food information included in pre-stored food information on the basis of the confirmed name, and generating nutritional information using the mapped food information; and a user terminal for visualizing and displaying the nutritional information when the nutritional information is received.Type: GrantFiled: January 30, 2023Date of Patent: November 28, 2023Assignee: doinglab Corp.Inventors: Hyun Suk Lee, Song Baik Jin, Jae Yeol Kim, Dae Han Kim, Yoo Bin Shin, Chae Yoon Han
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Patent number: 11688187Abstract: Disclosed are a system and a method for measuring dish size and providing nutritional information using image recognition and augmented reality based on artificial intelligence. The system includes: at least one imaging device acquiring at least one image including at least one dish or at least one food contained in each dish; a service providing apparatus for detecting the at least one dish and the at least one food from the at least one image when the at least one image is received, confirming the name of each detected food on the basis of a learning model, predicting the size of each detected dish, predicting the volume of each detected food using the predicted size of the dish, and generating nutritional information using the predicted volume of each food and pre-stored food information; and a user terminal for visualizing and displaying the nutritional information when the nutritional information is received.Type: GrantFiled: January 30, 2023Date of Patent: June 27, 2023Assignee: doinglab Corp.Inventors: Hyun Suk Lee, Song Baik Jin, Dae Han Kim, Chae Yoon Han
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Publication number: 20230067813Abstract: A method for operating a memory device is provided. The method includes providing a high voltage signal to a memory cell array including a plurality of memory cells using a first wiring, providing a logic signal to the memory cell array using a second wiring, and providing a shielding signal to the memory cell array using a third wiring arranged between the first wiring and the second wiring. A highest voltage level of the logic signal is lower than a highest voltage level of the high voltage signal, and the shielding signal includes a negative first voltage level in a first mode and a positive second voltage level in a second mode.Type: ApplicationFiled: May 4, 2022Publication date: March 2, 2023Inventors: Hyung Soo KIM, Dae Han KIM, Jong Min KIM, Myoung Won YOON
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Patent number: 11573261Abstract: Provided are a semiconductor device and a method of operating the same. A semiconductor includes a test circuit which comprises: a test transistor to be tested for time-dependent dielectric breakdown (TDDB) characteristics using a stress voltage; an input switch disposed between a voltage application node to which the stress voltage is applied and an input node which transmits the stress voltage to the test transistor; and a protection switch disposed between the input node and a ground node.Type: GrantFiled: August 26, 2021Date of Patent: February 7, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Jeong-Goo Lee, Dae Han Kim, Ji Yun Kim, Jin Yub Lee
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Publication number: 20210389369Abstract: Provided are a semiconductor device and a method of operating the same. A semiconductor includes a test circuit which comprises: a test transistor to be tested for time-dependent dielectric breakdown (TDDB) characteristics using a stress voltage; an input switch disposed between a voltage application node to which the stress voltage is applied and an input node which transmits the stress voltage to the test transistor; and a protection switch disposed between the input node and a ground node.Type: ApplicationFiled: August 26, 2021Publication date: December 16, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Jeong-Goo LEE, Dae Han KIM, Ji Yun KIM, Jin Yub LEE
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Patent number: 11128880Abstract: A method in which a server recognizes and determines an object in an image may include calculating a feature map including an object feature point within the image by learning the image based on a first model, calculating compression feature information by compressing the feature map based on a first filter, inputting the compression feature information for each at least one layer and calculating respective prediction information by learning the compression feature information for each layer based on a second model, and calculating prediction result information by determining whether the respective prediction information sequentially exceeds a predetermined threshold value in order from a top layer.Type: GrantFiled: March 2, 2021Date of Patent: September 21, 2021Assignee: doinglab Corp.Inventors: Jae Yeol Kim, Dae Han Kim, Hyun Suk Lee
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Patent number: 11125811Abstract: Provided are a semiconductor device and a method of operating the same. A semiconductor includes a test circuit which comprises: a test transistor to be tested for time-dependent dielectric breakdown (TDDB) characteristics using a stress voltage; an input switch disposed between a voltage application node to which the stress voltage is applied and an input node which transmits the stress voltage to the test transistor; and a protection switch disposed between the input node and a ground node.Type: GrantFiled: June 14, 2019Date of Patent: September 21, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Jeong-Goo Lee, Dae Han Kim, Ji Yun Kim, Jin Yub Lee
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Patent number: 11032366Abstract: A node device on a blockchain network is provided. The node device includes a blockchain state monitor that calculates an estimated time of transaction processing completion according to a transaction cost by using state information about the blockchain network, a transaction cost determiner that calculates a minimum transaction cost that satisfies a user's requirements by using the calculated estimated time of transaction processing completion, and a transaction processor that processes a transaction of the user in response to a first transaction processing request when the first transaction processing request, which pays a transaction cost equal to or greater than the minimum transaction cost, is generated by the user.Type: GrantFiled: February 14, 2020Date of Patent: June 8, 2021Assignee: AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Jai Hoon Kim, Kwang Hoon Choi, Dae Han Kim
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Publication number: 20200267215Abstract: A node device on a blockchain network is provided. The node device includes a blockchain state monitor that calculates an estimated time of transaction processing completion according to a transaction cost by using state information about the blockchain network, a transaction cost determiner that calculates a minimum transaction cost that satisfies a user's requirements by using the calculated estimated time of transaction processing completion, and a transaction processor that processes a transaction of the user in response to a first transaction processing request when the first transaction processing request, which pays a transaction cost equal to or greater than the minimum transaction cost, is generated by the user.Type: ApplicationFiled: February 14, 2020Publication date: August 20, 2020Applicant: AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Jai Hoon Kim, Kwang Hoon Choi, Dae Han Kim
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Publication number: 20200166567Abstract: Provided are a semiconductor device and a method of operating the same. A semiconductor includes a test circuit which comprises: a test transistor to be tested for time-dependent dielectric breakdown (TDDB) characteristics using a stress voltage; an input switch disposed between a voltage application node to which the stress voltage is applied and an input node which transmits the stress voltage to the test transistor; and a protection switch disposed between the input node and a ground node.Type: ApplicationFiled: June 14, 2019Publication date: May 28, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Jeong-Goo Lee, Dae Han Kim, Ji Yun Kim, Jin Yub Lee
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Patent number: 10609910Abstract: A contra-rotating multi-layer propeller unit for multi-phase flow according to an exemplary embodiment of the present disclosure includes: a shaft part; a front propeller and a rear propeller connected to the shaft part; an air collection part including a predetermined space therein and the shaft part positioned in the internal space; and an air supply pipe configured to supply air into the air collection part, and a rear propeller blade includes a two-phase blade connected to a rear propeller hub, a layer structure of which an inner surface is connected to an end portion of the two-phase blade, and a single-phase blade positioned at a location corresponding to the two-phase blade on an outer surface of the layer structure.Type: GrantFiled: January 25, 2017Date of Patent: April 7, 2020Assignee: Korea University Research and Business FoundationInventors: Young June Moon, Dae Han Kim
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Patent number: 10464019Abstract: The present invention relates to a nickel-based catalyst for oxidizing carbon monoxide, which is prepared by forming nickel oxide on the surface of a mesoporous support by one or more cycles of atomic layer deposition, and a use thereof. The nickel-based catalyst for oxidizing carbon monoxide according to the present invention is stable at high temperatures because the size of the nickel oxide particles can be restricted to nanometer scales even at high-temperature conditions. In addition, the nickel-based catalyst exhibits catalytic reactivity for oxidation of carbon monoxide even at room temperatures. Additionally, the catalytic activity, which has been deactivated after conducting the catalytic reaction, can be regenerated through annealing and increased gradually through repeated annealing.Type: GrantFiled: August 18, 2015Date of Patent: November 5, 2019Assignee: Research & Business Foundation Sungkyunkwan UniversityInventors: Young Dok Kim, Dae Han Kim, Ju Ha Lee, Myung Geun Jeong, Sang Wook Han
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Publication number: 20180184626Abstract: A contra-rotating multi-layer propeller unit for multi-phase flow according to an exemplary embodiment of the present disclosure includes: a shaft part; a front propeller and a rear propeller connected to the shaft part; an air collection part including a predetermined space therein and the shaft part positioned in the internal space; and an air supply pipe configured to supply air into the air collection part, and a rear propeller blade includes a two-phase blade connected to a rear propeller hub, a layer structure of which an inner surface is connected to an end portion of the two-phase blade, and a single-phase blade positioned at a location corresponding to the two-phase blade on an outer surface of the layer structure.Type: ApplicationFiled: January 25, 2017Publication date: July 5, 2018Applicant: Korea University Research and Business FoundationInventors: Young June MOON, Dae Han KIM
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Patent number: 9659658Abstract: A storage device includes a nonvolatile memory device and a memory controller is provided. The nonvolatile memory device includes a plurality of blocks. The memory controller is configured to detect, upon receiving a power-on signal, a partial block among the plurality of blocks. The partial block includes a first page incompletely programmed due to sudden power-off occurred to the storage device. The memory controller determines whether or not to perform a dummy program operation on the partial block, and programs a second page of the partial bock with dummy data. The first page is different from the second page.Type: GrantFiled: January 14, 2015Date of Patent: May 23, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Dae han Kim
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Patent number: 9646703Abstract: A method of programming a memory system includes repetitively performing N program loops for a selected memory cell (where N is a natural number equal to or greater than two). Each of the N program loops includes a program operation and a program verify operation. At least one of the N program loops includes performing the program operation on the selected memory cell and on at least one additionally selected memory cell by applying a program voltage to at least one word line to which the selected memory cell and at least one additionally selected memory cell are connected, and performing the program verify operation on the selected memory cell by applying a program verify voltage to a selected word line to which the selected memory cell is connected.Type: GrantFiled: August 15, 2016Date of Patent: May 9, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Kyung-Min Kang, Dae-Han Kim
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Publication number: 20160379714Abstract: A method of programming a memory system includes repetitively performing N program loops for a selected memory cell (where N is a natural number equal to or greater than two). Each of the N program loops includes a program operation and a program verify operation. At least one of the N program loops includes performing the program operation on the selected memory cell and on at least one additionally selected memory cell by applying a program voltage to at least one word line to which the selected memory cell and at least one additionally selected memory cell are connected, and performing the program verify operation on the selected memory cell by applying a program verify voltage to a selected word line to which the selected memory cell is connected.Type: ApplicationFiled: August 15, 2016Publication date: December 29, 2016Inventors: KYUNG-MIN KANG, DAE-HAN KIM
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Patent number: 9437286Abstract: A method of programming a memory system includes repetitively performing N program loops for a selected memory cell (where N is a natural number equal to or greater than two). Each of the N program loops includes a program operation and a program verify operation. At least one of the N program loops includes performing the program operation on the selected memory cell and on at least one additionally selected memory cell by applying a program voltage to at least one word line to which the selected memory cell and at least one additionally selected memory cell are connected, and performing the program verify operation on the selected memory cell by applying a program verify voltage to a selected word line to which the selected memory cell is connected.Type: GrantFiled: February 9, 2015Date of Patent: September 6, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Kyung-Min Kang, Dae-Han Kim
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Publication number: 20160199781Abstract: The present invention relates to a nickel-based catalyst for oxidizing carbon monoxide, which is prepared by forming nickel oxide on the surface of a mesoporous support by one or more cycles of atomic layer deposition, and a use thereof. The nickel-based catalyst for oxidizing carbon monoxide according to the present invention is stable at high temperatures because the size of the nickel oxide particles can be restricted to nanometer scales even at high-temperature conditions. In addition, the nickel-based catalyst exhibits catalytic reactivity for oxidation of carbon monoxide even at room temperatures. Additionally, the catalytic activity, which has been deactivated after conducting the catalytic reaction, can be regenerated through annealing and increased gradually through repeated annealing.Type: ApplicationFiled: August 18, 2015Publication date: July 14, 2016Applicant: Research & Business Foundation SUNGKYUNKWAN UNIVERSITYInventors: Young Dok KIM, Dae Han KIM, Ju Ha LEE, Myung Geun JEONG, Sang Wook HAN