Patents by Inventor Dae-Lok Bae

Dae-Lok Bae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9831164
    Abstract: A semiconductor device includes a via structure and a conductive structure. The via structure has a surface with a planar portion and a protrusion portion. The conductive structure is formed over at least part of the planar portion and not over at least part of the protrusion portion of the via structure. For example, the conductive structure is formed only onto the planar portion and not onto any of the protrusion portion for forming high quality connection between the conductive structure and the via structure.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: November 28, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-jin Moon, Pil-kyu Kang, Dae-lok Bae, Gil-heyun Choi, Byung-lyul Park, Dong-chan Lim, Deok-young Jung
  • Patent number: 9530726
    Abstract: A semiconductor device includes a via structure having a top surface with a planar portion and a protrusion portion that is surrounded by the planar portion, and includes a conductive structure including a plurality of conductive lines contacting at least a part of the top surface of the via structure.
    Type: Grant
    Filed: October 11, 2013
    Date of Patent: December 27, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-jin Moon, Byung-Iyul Park, Dong-chan Lim, Deok-young Jung, Gil-heyun Choi, Dae-lok Bae, Pil-kyu Kang
  • Patent number: 9103974
    Abstract: Semiconductor devices having an optical transceiver include a cladding on a substrate, a protrusion vertically extending trough the cladding and materially in continuity with the substrate, and a coupler on the cladding and the protrusion.
    Type: Grant
    Filed: March 5, 2012
    Date of Patent: August 11, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Pil-Kyu Kang, Dae-Lok Bae, Byung-Lyul Park, Gil-Heyun Choi
  • Patent number: 8958002
    Abstract: An image sensor includes a first substrate including a driving element, a first insulation layer on the first substrate and on the driving element, a second substrate including a photoelectric conversion element, and a second insulation layer on the second substrate and on the photoelectric conversion element. A surface of the second insulation layer is on an upper surface of the first insulation layer. The image sensor includes a conductive connector penetrating the second insulation layer and a portion of the first insulation layer. Methods of forming image sensors are also disclosed.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: February 17, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Jun Choi, Yoon-Dong Park, Chris Hong, Dae-Lok Bae, Jung-Chak Ahn, Chang-Rok Moon, June-Mo Koo, Suk-Pil Kim, Hoon-Sang Oh
  • Patent number: 8873901
    Abstract: Optical input/output (I/O) devices, which include a substrate including a trench, a waveguide within the trench of the substrate; and a photodetector within the trench and optically connected to the waveguide. An upper surface of the photodetector is at a same level as an upper surface of the waveguide.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: October 28, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pil-Kyu Kang, Dae-Lok Bae, Byung-Lyul Park, Gil-Heyun Choi
  • Patent number: 8867882
    Abstract: A photo-electric integrated circuit device comprises an on-die optical input/output device. The on-die optical input/output device comprises a substrate having a trench, a lower cladding layer disposed in the trench and having an upper surface lower than an upper surface of the substrate, and a core disposed on the lower cladding layer at a distance from sidewalls of the trench and having an upper surface at substantially the same level as the upper surface of the substrate.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 21, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pil-Kyu Kang, Dae Lok Bae, Gil Heyun Choi, Jong Myeong Lee
  • Publication number: 20140217603
    Abstract: A semiconductor device includes a via structure and a conductive structure. The via structure has a surface with a planar portion and a protrusion portion. The conductive structure is formed over at least part of the planar portion and not over at least part of the protrusion portion of the via structure. For example, the conductive structure is formed only onto the planar portion and not onto any of the protrusion portion for forming high quality connection between the conductive structure and the via structure.
    Type: Application
    Filed: February 1, 2013
    Publication date: August 7, 2014
    Inventors: Kwang-jin Moon, Pil-Kyu Kang, Dae-Lok Bae, Gil-Heyun Choi, Byung-Lyul Park, Dong-Chan Lim, Deok-Young Jung
  • Patent number: 8791405
    Abstract: Optical waveguide and coupler devices and methods include a trench formed in a bulk semiconductor substrate, for example, a bulk silicon substrate. A bottom cladding layer is formed in the trench, and a core region is formed on the bottom cladding layer. A reflective element, such as a distributed Bragg reflector can be formed under the coupler device and/or the waveguide device. Because the optical devices are integrated in a bulk substrate, they can be readily integrated with other devices on a chip or die in accordance with silicon photonics technology. Specifically, for example, the optical devices can be integrated in a DRAM memory circuit chip die.
    Type: Grant
    Filed: October 25, 2010
    Date of Patent: July 29, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho-chul Ji, Ki-nam Kim, Yong-woo Hyung, Kyoung-won Na, Kyoung-ho Ha, Yoon-dong Park, Dae-lok Bae, Jin-kwon Bok, Pil-kyu Kang, Sung-dong Suh, Seong-gu Kim, Dong-jae Shin, In-sung Joe
  • Patent number: 8735265
    Abstract: A method of forming a silicon based optical waveguide can include forming a silicon-on-insulator structure including a non-crystalline silicon portion and a single crystalline silicon portion of an active silicon layer in the structure. The non-crystalline silicon portion can be replaced with an amorphous silicon portion and maintaining the single crystalline silicon portion and the amorphous portion can be crystallized using the single crystalline silicon portion as a seed to form a laterally grown single crystalline silicon portion including the amorphous and single crystalline silicon portions.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: May 27, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pil-Kyu Kang, Dae-Lok Bae, Gil-Heyun Choi, Jong-Myeong Lee
  • Publication number: 20140048853
    Abstract: An image sensor includes a first substrate including a driving element, a first insulation layer on the first substrate and on the driving element, a second substrate including a photoelectric conversion element, and a second insulation layer on the second substrate and on the photoelectric conversion element. A surface of the second insulation layer is on an upper surface of the first insulation layer. The image sensor includes a conductive connector penetrating the second insulation layer and a portion of the first insulation layer. Methods of forming image sensors are also disclosed.
    Type: Application
    Filed: October 28, 2013
    Publication date: February 20, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-Jun Choi, Yoon-Dong Park, Chris Hong, Dae-Lok Bae, Jung-Chak Ahn, Chang-Rok Moon, June-Mo Koo, Suk-Pil Kim, Hoon-Sang Oh
  • Publication number: 20140035164
    Abstract: A semiconductor device includes a via structure having a top surface with a planar portion and a protrusion portion that is surrounded by the planar portion, and includes a conductive structure including a plurality of conductive lines contacting at least a part of the top surface of the via structure.
    Type: Application
    Filed: October 11, 2013
    Publication date: February 6, 2014
    Inventors: Kwang-jin Moon, Byung-lyul Park, Dong-chan Lim, Deok-young Jung, Gil-heyun Choi, Dae-lok Bae, Pil-kyu Kang
  • Patent number: 8570409
    Abstract: An image sensor includes a first substrate including a driving element, a first insulation layer on the first substrate and on the driving element, a second substrate including a photoelectric conversion element, and a second insulation layer on the second substrate and on the photoelectric conversion element. A surface of the second insulation layer is on an upper surface of the first insulation layer. The image sensor includes a conductive connector penetrating the second insulation layer and a portion of the first insulation layer. Methods of forming image sensors are also disclosed.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: October 29, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Jun Choi, Yoon-Dong Park, Chris Hong, Dae-Lok Bae, Jung-Chak Ahn, Chang-Rok Moon, June-Mo Koo, Suk-Pil Kim, Hoon-Sang Oh
  • Patent number: 8546162
    Abstract: A method for forming a light guide layer with improved transmission reliability in a semiconductor substrate, the method including forming a trench in the semiconductor substrate, forming a cladding layer and a preliminary light guide layer in the trench such that only one of opposite side end portions of the preliminary light guide layer is in contact with an inner sidewall of the trench, and performing a thermal treatment on the substrate to change the preliminary light guide layer into the light guide layer.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: October 1, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Lok Bae, Byung-Lyul Park, Pil-Kyu Kang, Gil-Heyun Choi, Kwang-Jin Moon
  • Patent number: 8422845
    Abstract: A photo-electric integrated circuit device comprises an on-die optical input/output device. The on-die optical input/output device comprises a substrate having a trench, a lower cladding layer disposed in the trench and having an upper surface lower than an upper surface of the substrate, and a core disposed on the lower cladding layer at a distance from sidewalls of the trench and having an upper surface at substantially the same level as the upper surface of the substrate.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: April 16, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pil-Kyu Kang, Dae Lok Bae, Gil Heyun Choi, Jong Myeong Lee
  • Patent number: 8390120
    Abstract: A semiconductor device includes a via structure and a conductive structure. The via structure has a surface with a planar portion and a protrusion portion. The conductive structure is formed over at least part of the planar portion and not over at least part of the protrusion portion of the via structure. For example, the conductive structure is formed only onto the planar portion and not onto any of the protrusion portion for forming high quality connection between the conductive structure and the via structure.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: March 5, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-Jin Moon, Pil-Kyu Kang, Dae-Lok Bae, Gil-Heyun Choi, Byung-Lyul Park, Dong-Chan Lim, Deok-Young Jung
  • Patent number: 8354308
    Abstract: A conductive layer buried-type substrate is disclosed. The substrate includes a silicon oxidation layer bonded to a supporting substrate, an adhesion promotion layer that is formed on the silicon oxidation layer and improves an adhesion between the silicon oxidation layer and a conductive layer, wherein the conductive layer is formed on the adhesion promotion layer and comprises a metal layer, and a single crystal semiconductor layer formed on the conductive layer.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: January 15, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pil-kyu Kang, Gil-heyun Choi, Dae-lok Bae, Byung-lyul Park, Dong-kak Lee
  • Patent number: 8343851
    Abstract: A wafer temporary bonding method using silicon direct bonding (SDB) may include preparing a carrier wafer and a device wafer, adjusting roughness of a surface of the carrier wafer, and combining the carrier wafer and the device wafer using the SDB. Because the method uses SDB, instead of an adhesive layer, for a temporary bonding process, a module or process to generate and remove an adhesive is unnecessary. Also, a defect in a subsequent process, for example, a back-grinding process, due to irregularity of the adhesive may be prevented.
    Type: Grant
    Filed: September 17, 2009
    Date of Patent: January 1, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-ho Kim, Dae-lok Bae, Jong-wook Lee, Seung-woo Choi, Pil-kyu Kang
  • Publication number: 20120314991
    Abstract: Semiconductor devices having an optical transceiver include a cladding on a substrate, a protrusion vertically extending trough the cladding and materially in continuity with the substrate, and a coupler on the cladding and the protrusion.
    Type: Application
    Filed: March 5, 2012
    Publication date: December 13, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Pil-Kyu Kang, Dae-Lok Bae, Byung-Lyul Park, Gil-Heyun Choi
  • Publication number: 20120314993
    Abstract: Optical input/output (I/O) devices, which include a substrate including a trench, a waveguide within the trench of the substrate; and a photodetector within the trench and optically connected to the waveguide. An upper surface of the photodetector is at a same level as an upper surface of the waveguide.
    Type: Application
    Filed: June 12, 2012
    Publication date: December 13, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Pil-Kyu Kang, Dae-Lok Bae, Byung-Lyul Park, Gil-Heyun Choi
  • Patent number: 8324055
    Abstract: A method of manufacturing a buried wiring type substrate comprises implanting hydrogen ions into a single crystalline substrate through a first surface thereof to form an ion implantation region, forming a conductive layer comprising a metal on the first surface of the single crystalline substrate, forming an insulation layer comprising silicon oxide on the conductive layer, bonding the insulation layer to a support substrate to form a preliminary buried wiring type substrate, and separating the single crystalline substrate at the ion implantation region to form a single crystalline semiconductor layer on the conductive layer.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: December 4, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pil-Kyu Kang, Dae-Lok Bae, Gil-Heyun Choi, Jong-Myeong Lee