Patents by Inventor Daisuke Adachi

Daisuke Adachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8259589
    Abstract: A network relay device is for receiving, from an external network relay device, connection confirmation information indicative of being in communication connection with the external network relay device. When the connection confirmation information is particular connection confirmation information indicative of being transmitted from a predetermined external network relay device, the network relay device provides return confirmation information to the predetermined external network relay device.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: September 4, 2012
    Assignee: Hitachi Cable, Ltd.
    Inventors: Daisuke Adachi, Koichiro Seto
  • Publication number: 20120097244
    Abstract: Provided is a hetero-junction solar cell with a silicon crystalline substrate of small thickness but exhibiting less warpage, and having a high photoelectric conversion efficiency. The crystalline silicon substrate has a thickness of 50 ?m to 200 ?m, and has a rough structure on the light-incident-side surface thereof. The surface of the transparent conductive layer in the light incidence side has an irregular structure. The top-bottom distance in the irregular structure of the transparent conductive layer in the light-incidence-side is preferably smaller than the top-bottom distance in the rough structure of the crystalline silicon substrate in the-light-incidence side. The distance between tops of the projections in the irregular structure on the surface of the transparent conductive layer in the light incidence side is preferably smaller than the distance between tops of the projections in the rough structure on the surface of the crystalline silicon substrate in the light incidence side.
    Type: Application
    Filed: July 2, 2010
    Publication date: April 26, 2012
    Applicant: KANEKA CORPORATION
    Inventors: Daisuke Adachi, Kunta Yoshikawa, Kenji Yamamoto
  • Patent number: 7955787
    Abstract: The present invention provides a method of manufacturing a PDP that prevents defects due to dust adhering to a photomask, for example, from occurring in a structure of the PDP. In photolithography, exposure is performed twice in a same process, and photomask (22) is moved within an allowable range of displacement in an exposure pattern, between a first and a second exposures. Photomask (22) is exposed twice in total before and after moving photomask (22). Region (21a), an unexposed region due to interruption of dust (22b) attached to photomask (22), can be suppressed, enabling pattern exposure on photosensitive Ag paste film (21) to be favorably performed.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: June 7, 2011
    Assignee: Panasonic Corporation
    Inventor: Daisuke Adachi
  • Publication number: 20110122529
    Abstract: A hub includes first and second side surfaces respectively opposed to inner and outer circumferential surfaces of an upper portion of a magnetic member, and a ceiling surface arranged to interconnect an upper ends of the first and second side surfaces. The adhesive agent is interposed between the inner circumferential surface of the upper portion of the magnetic member and the first side surface of the hub and between the upper surface of the magnetic member and the ceiling surface of the hub. Radial distance between the inner circumferential surface of the upper portion of the magnetic member and the first side surface of the hub and axial distance between the upper surface of the magnetic member and the ceiling surface of the hub are smaller than radial distance between the outer circumferential surface of the upper portion of the magnetic member and the second side surface of the hub.
    Type: Application
    Filed: March 29, 2010
    Publication date: May 26, 2011
    Applicant: NIDEC CORPORATION
    Inventors: Keita Hamakawa, Daisuke Adachi, Takuro Jimbu, Takayuki Iwase
  • Publication number: 20100278188
    Abstract: A network relay device is for receiving, from an external network relay device, connection confirmation information indicative of being in communication connection with the external network relay device. When the connection confirmation information is particular connection confirmation information indicative of being transmitted from a predetermined external network relay device, the network relay device provides return confirmation information to the predetermined external network relay device.
    Type: Application
    Filed: March 4, 2010
    Publication date: November 4, 2010
    Applicant: HITACHI CABLE, LTD.
    Inventors: Daisuke Adachi, Koichiro Seto
  • Patent number: 7744439
    Abstract: The present invention provides an image display device capable of displaying a good image by suppressing yellowing of a glass substrate, and a high-yield manufacturing method of the glass substrate. The image display device is formed of a front-side glass substrate and a back-side glass substrate. In this manufacturing method, a glass substrate is used as the front-side glass substrate when Sn++ content in the glass substrate is a predetermined value or less, and the glass substrate is used as the back-side glass substrate when the Sn++ content exceeds the predetermined value.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: June 29, 2010
    Assignee: Panasonic Corporation
    Inventors: Daisuke Adachi, Hiroyasu Tsuji, Keisuke Sumida
  • Patent number: 7545561
    Abstract: Provided are an image display device capable of displaying a good image by suppressing yellowing of a glass substrate, and an evaluating method of the glass substrate. The image display device is formed using the glass substrate where reflectance at wavelength of 220 nm is 5% or lower. In the evaluating method of the glass substrate for the image display device, Sn++ content in the glass substrate is analyzed using reflectance at wavelength of 220 nm.
    Type: Grant
    Filed: November 27, 2003
    Date of Patent: June 9, 2009
    Assignee: Panasonic Corporation
    Inventors: Daisuke Adachi, Hiroyasu Tsuji, Keisuke Sumida
  • Patent number: 7534155
    Abstract: A method of manufacturing display panels includes forming a material layer on a substrate, and baking the material layer formed on substrate which is placed on a supporting bed. The supporting bed is formed of a first supporting bed and a second supporting bed placed on the first supporting bed. A difference in thermal expansion coefficient between the second supporting bed and the substrate is smaller than a difference in thermal expansion coefficient between the first supporting bed and the substrate, and the substrate is placed on the second supporting bed such that the substrate is positioned entirely within the perimeter of the second supporting bed during the baking and heating. This structure allows reduction of scratches on a surface of the substrate.
    Type: Grant
    Filed: January 11, 2006
    Date of Patent: May 19, 2009
    Assignee: Panasonic Corporation
    Inventors: Hiroyuki Yonehara, Masanori Suzuki, Makoto Morita, Daisuke Adachi, Yasuyuki Akata, Kenji Tanimoto
  • Patent number: 7495393
    Abstract: The present invention provides an image display device capable of displaying a good image by suppressing yellowing of a glass substrate, and a high-yield manufacturing method of the glass substrate. The image display device is formed of a front-side glass substrate and a back-side glass substrate. In this manufacturing method, a glass substrate is used as the front-side glass substrate when Sn++ content in the glass substrate is a predetermined value or less, and the glass substrate is used as the back-side glass substrate when the Sn++ content exceeds the predetermined value.
    Type: Grant
    Filed: November 27, 2003
    Date of Patent: February 24, 2009
    Assignee: Panasonic Corporation
    Inventors: Daisuke Adachi, Hiroyasu Tsuji, Keisuke Sumida
  • Patent number: 7491107
    Abstract: The present invention provides a method of manufacturing a PDP that prevents a defect from occurring in a structure of the PDP; and also suppresses retroflexion, exfoliation, and the like, of the structure. In photolithography, exposure is performed twice with a first and a second photomasks, each having a different aperture width, but the same exposure pattern. The amount of exposure is different between first exposure region (A?) through the first photomask; and second exposure region (B?) through the second photomask.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: February 17, 2009
    Assignee: Panasonic Corporation
    Inventor: Daisuke Adachi
  • Patent number: 7487649
    Abstract: The present invention provides a manufacturing method of a glass substrate for an image display device having high picture quality. The reducing force in a float furnace is controlled to be decreased so that Sn++ content on a surface of the glass substrate forming an Ag electrode is a predetermined value or less. When the resultant Sn++ content on the surface of the glass substrate forming the Ag electrode exceeds the predetermined value, the surface is partially removed to decrease the Sn++ content to the predetermined value or less to suppress the occurrence of yellowing of the glass substrate.
    Type: Grant
    Filed: November 27, 2003
    Date of Patent: February 10, 2009
    Assignee: Panasonic Corporation
    Inventors: Daisuke Adachi, Hiroyasu Tsuji, Keisuke Sumida
  • Patent number: 7471042
    Abstract: An object of the present invention is to provide a technique for relatively easily suppressing the yellowing of a Plasma Display Panel in which electrodes comprising silver are disposed on the substrates, and thus render image displays with high luminance and high quality. In order to achieve the object, an arrangement is made in which the electrodes comprising silver further include an element whose standard electrode potential is lower than that of silver, such as Cr, Al, In, B, and Ti, or a compound of such an element, as a silver ionization inhibiting substance.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: December 30, 2008
    Assignee: Panasonic Corporation
    Inventors: Morio Fujitani, Hiroyuki Yonehara, Masaki Aoki, Keisuke Sumida, Hideki Asida, Junichi Hibino, Daisuke Adachi
  • Patent number: 7436118
    Abstract: A plasma display panel is disclosed. It can display quality videos and its manufacturing steps can be reduced. A pair of substrates (3), (11) confront each other to form dischargeable space (16) in between. At least front one (3) of the substrates is transparent, and includes display electrodes (6) formed of scan electrodes (4) and sustain electrodes (5), as well as light-blocking sections (7) corresponding to non-dischargeable sections (18) disposed between the display electrodes (6). The other substrate (11) facing to rear includes phosphor layers (15R), (15G), (15B) which emit light by discharging. Each one of display electrodes (6) is formed of transparent electrodes (4a), (5a) and bus electrodes (4b), (5b) which are formed of a plurality of electrode-layers. At least one of the electrode-layers is made of black layer (19) having a specific volume resistance ranging from 1×105 ?cm to 1×109 ?cm, and light-blocking sections (7) are made of identical material of black layer (19).
    Type: Grant
    Filed: November 25, 2004
    Date of Patent: October 14, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daisuke Adachi, Hiroyuki Yonehara, Toshimoto Kubota
  • Patent number: 7358672
    Abstract: The plasma display panel disclosed has a front substrate and a rear substrate positioned to face each other. The front substrate includes display electrodes provided with scan electrodes and sustain electrodes, and a light-shield provided on a non-discharge area between display electrodes. A rear substrate includes phosphor layers to emit light by discharge. The display electrodes are composed of transparent electrodes, and bus electrodes. The bus electrodes are composed of a plurality of electrode layers and at least one of the electrodes is composed of a black layer having a product of the resistivity and layer thickness of not larger than 2 ?cm2. A light-shield is composed of a black layer with the resistivity of not smaller than 1×106 ?cm.
    Type: Grant
    Filed: December 10, 2004
    Date of Patent: April 15, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daisuke Adachi, Hiroyuki Yonehara
  • Publication number: 20080049305
    Abstract: The present invention provides an image display device capable of displaying a good image by suppressing yellowing of a glass substrate, and an evaluating method of the glass substrate. The image display device is formed using the glass substrate where reflectance at wavelength of 220 nm is 5% or lower. In the evaluating method of the glass substrate for the image display device, Sn++ content in the glass substrate is analyzed using reflectance at wavelength of 220 nm.
    Type: Application
    Filed: September 19, 2007
    Publication date: February 28, 2008
    Inventors: Daisuke Adachi, Hiroyasu Tsuji, Keisuke Sumida
  • Publication number: 20070209394
    Abstract: The present invention provides an image display device capable of displaying a good image by suppressing yellowing of a glass substrate, and a high-yield manufacturing method of the glass substrate. The image display device is formed of a front-side glass substrate and a back-side glass substrate. In this manufacturing method, a glass substrate is used as the front-side glass substrate when Sn++ content in the glass substrate is a predetermined value or less, and the glass substrate is used as the back-side glass substrate when the Sn++ content exceeds the predetermined value.
    Type: Application
    Filed: April 12, 2007
    Publication date: September 13, 2007
    Inventors: Daisuke Adachi, Hiroyasu Tsuji, Keisuke Sumida
  • Publication number: 20070167102
    Abstract: A method of manufacturing display panels includes the steps of forming a material layer on a substrate (23), and baking the material layer formed on substrate (23) which is placed on a supporting bed (20). The supporting bed (20) is formed of a first supporting bed (21) and a second supporting bed (22) placed on the first one (21). A difference in thermal expansion coefficient between the second supporting bed (22) and the substrate (23) is set smaller than a difference in thermal expansion coefficient between the first supporting bed (21) and the substrate (23), and the substrate (23) is placed on the second supporting bed (22) such that the second supporting bed (22) exists around the substrate (23) during the baking step for being heated and baked. This structure allows suppressing the production of scratches on a surface of the substrate (23).
    Type: Application
    Filed: January 11, 2006
    Publication date: July 19, 2007
    Inventors: Hiroyuki Yonehara, Masanori Suzuki, Makoto Morita, Daisuke Adachi, Yasuyuki Akata, Kenji Tanimoto
  • Patent number: 7232504
    Abstract: A distilling apparatus and method use a two step distillation and purification process for processing a waste liquid, such as an impure sulfuric acid solution, to form a highly concentrated sulfuric acid solution. First, the waste liquid is stored in a concentrating column, where it is heated. A condenser, which uses the waste liquid as a cooling medium, condenses the vapor generated by the heater. The condensed vapor is passed through a filter, which separates impurities out of the waste liquid, prior to feeding the waste liquid back into the concentrating column. Water is then removed from the waste liquid via a distilling process. The resulting concentrated liquid is then fed to a purifying column, where it is again heated, to remove residue, and condensed, resulting in a highly pure waste liquid.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: June 19, 2007
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Osuda, Toru Matoba, Daisuke Adachi, Masataka Fukuizumi
  • Patent number: 7074101
    Abstract: A method of manufacturing a plasma display panel, whose glass substrate is not tinged and luminance is high, is provided, even when silver material is used. A layer including silver compounds, which include sulfur generated on a surface of an electrode by reacting on sulfur in air, is removed before a forming process of a dielectric layer. Then decomposition of the compound is restricted in a firing process of the dielectric layer. Even when the electrode having the silver material with high electrical conductivity is used, yellow coloration on the glass substrate is prevented. As a result, a high quality plasma display panel which does not decrease in luminance is provided.
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: July 11, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daisuke Adachi, Keisuke Sumida, Hideki Ashida, Morio Fujitani
  • Publication number: 20060145622
    Abstract: A plasma display panel is disclosed. It can display quality videos and its manufacturing steps can be reduced. A pair of substrates (3), (11) confront each other to form dischargeable space (16) in between. At least front one (3) of the substrates is transparent, and includes display electrodes (6) formed of scan electrodes (4) and sustain electrodes (5), as well as light-blocking sections (7) corresponding to non-dischargeable sections (18) disposed between the display electrodes (6). The other substrate (11) facing to rear includes phosphor layers (15R), (15G), (15B) which emit light by discharging. Each one of display electrodes (6) is formed of transparent electrodes (4a), (5a) and bus electrodes (4b), (5b) which are formed of a plurality of electrode-layers. At least one of the electrode-layers is made of black layer (19) having a specific volume resistance ranging from 1×105 ?cm to 1×109 ?cm, and light-blocking sections (7) are made of identical material of black layer (19).
    Type: Application
    Filed: November 25, 2004
    Publication date: July 6, 2006
    Inventors: Daisuke Adachi, Hiroyuki Yonehara, Toshimoto Kubota