Patents by Inventor Daisuke Kimura
Daisuke Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200141299Abstract: A heat recovery device, including a pillar-shaped honeycomb structure comprising an outer peripheral side wall having one or more planar outer peripheral side surfaces; one or more thermoelectric conversion modules arranged to face the one or more planar outer peripheral side surfaces; a tubular member that circumferentially covers the outer peripheral side surfaces of the honeycomb structure and the one or more thermoelectric conversion modules; and a casing that circumferentially covers the tubular member; wherein the partition walls are mainly configured of ceramics; and wherein the casing has an inflow port and an outflow port for a second fluid having a temperature lower than that of the first fluid, and a flow path for the second fluid is formed circumferentially around the tubular member between an inner surface of the casing and an outer surface of the tubular member.Type: ApplicationFiled: December 20, 2019Publication date: May 7, 2020Applicant: NGK INSULATORS, LTD.Inventors: Tatsuo KAWAGUCHI, Daisuke KIMURA, Makoto YOSHIHARA
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Publication number: 20200143848Abstract: According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.Type: ApplicationFiled: January 8, 2020Publication date: May 7, 2020Applicant: Toshiba Memory CorporationInventors: Masato SUGITA, Naoki KIMURA, Daisuke KIMURA
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Patent number: 10619947Abstract: A heat exchanger, including: a columnar honeycomb structure having cells partitioned by partition walls composed of ceramics, each cell penetrating from a first end to a second end to form a flow path for a first fluid; an inner tubular member fitted to an outer peripheral surface of the honeycomb structure to circumferentially cover that surface; a spacer directly and circumferentially covering an outer peripheral surface of the inner tubular member as well as indirectly and circumferentially covering the outer peripheral surface of the honeycomb structure; and an outer tubular member directly and circumferentially covering the spacer; wherein the spacer has a three-dimensional structure that allows flow of a second fluid therein and suppresses movement of bubbles in the second fluid; and wherein at least one opening part between the inner tubular member and the outer tubular member forms a gate of the spacer for the second fluid.Type: GrantFiled: November 13, 2017Date of Patent: April 14, 2020Assignee: NGK Insulators, Ltd.Inventors: Tatsuo Kawaguchi, Daisuke Kimura
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Patent number: 10566033Abstract: According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.Type: GrantFiled: May 28, 2019Date of Patent: February 18, 2020Assignee: Toshiba Memory CorporationInventors: Masato Sugita, Naoki Kimura, Daisuke Kimura
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Patent number: 10494974Abstract: An exhaust heat recovery device including a heat exchange portion, an exhaust branch portion, and an exhaust distribution portion, wherein the heat exchange portion comprises a pillar-shaped honeycomb body having a first end face and a second end face, and a casing accommodating the honeycomb body, the exhaust branch portion has a branch path that branches a path of exhaust gas flowing into the honeycomb body into a central portion and an outer circumferential portion in a cross-section orthogonal to an axial direction of the honeycomb body, and the exhaust distribution portion has an exhaust distribution mechanism that adjusts a heat recovery amount by changing an airflow resistance of the path of the exhaust gas in the central portion of the honeycomb body and varying the exhaust amount passing through the path of the exhaust gas in the outer circumferential portion of the honeycomb body.Type: GrantFiled: April 17, 2018Date of Patent: December 3, 2019Assignee: NGK Insulators, Ltd.Inventors: Tatsuo Kawaguchi, Takeshi Sakuma, Makoto Yoshihara, Hiroshi Mizuno, Daisuke Kimura
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Publication number: 20190355866Abstract: A light receiving element is obtained by: forming a first mask having a first opening and a second opening; performing etching by using the first mask, to allow the etching to progress at a higher rate in the second opening than in the first opening; forming a second mask having a third opening and a fourth opening; performing etching by using the second mask, to form a mesa in a region interposed by the third opening, and an n-type contact region in the fourth opening; and forming a first electrode on the mesa and a second electrode on the n-type contact region, the first electrode being electrically connected to the third layer, the second electrode being electrically connected to the first layer, wherein a region covered with the first mask and exposed through the fourth opening of the second mask turns into the n-type contact region after the etching using the second mask.Type: ApplicationFiled: June 5, 2019Publication date: November 21, 2019Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Daisuke KIMURA, Sundararajan BALASEKARAN
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Patent number: 10440826Abstract: A semiconductor device includes a mounting substrate including an interface, which is connectable with a host, a surface-mounted component mounted on the mounting substrate and having first and second electrode groups, a first solder portion that is positioned between a first electrode in the first electrode group and the mounting substrate to electrically connect the first electrode and the mounting substrate, and a second solder portion that is positioned between a second electrode in the second electrode group and the mounting substrate to electrically connect the second electrode and the mounting substrate. The second solder portion has a larger contact area with the mounting substrate than the first solder portion. The second solder portion is positioned between at least one additional second electrode in the second electrode group to electrically connect the at least one additional second electrode and the mounting substrate.Type: GrantFiled: September 4, 2017Date of Patent: October 8, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventor: Daisuke Kimura
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Publication number: 20190301807Abstract: A heat exchanger according to the present invention includes: a pillar shaped honeycomb structure having a plurality of cells, the cells providing first flow paths through which a first fluid is passed; an inner cylinder attached to an outer periphery of the honeycomb structure; and an outer cylinder disposed on an outer periphery of the inner cylinder, the outer cylinder providing a second flow path through which a second fluid is passed, the second flow path being arranged between the outer cylinder and the inner cylinder. The second flow path includes: an intermediate flow path extending in an axial direction of the honeycomb structure so as to include an outer peripheral position of the honeycomb structure; and side flow paths located on both sides of the intermediate flow path in the axial direction. The intermediate flow path has a height lower than that of each of the side flow paths.Type: ApplicationFiled: March 15, 2019Publication date: October 3, 2019Applicant: NGK INSULATORS, LTD.Inventors: Tatsuo Kawaguchi, Takeshi Sakuma, Daisuke Kimura, Hiroshi Mizuno, Makoto Yoshihara, Takafumi Hamada
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Publication number: 20190279686Abstract: According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.Type: ApplicationFiled: May 28, 2019Publication date: September 12, 2019Applicant: Toshiba Memory CorporationInventors: Masato Sugita, Naoki Kimura, Daisuke Kimura
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Publication number: 20190277570Abstract: A heat exchanging member including a hollow pillar shaped honeycomb structure having partition walls defining cells, the cells penetrating from a first end face to a second end face to form flow paths for a first fluid, an inner peripheral wall, and an outer peripheral wall; and a covering member being configured to cover the outer peripheral wall of the pillar shaped honeycomb structure. The heat exchanging member is configured to perform heat exchange between the first fluid and a second fluid flowing through an outer side of the covering member. In the heat exchanging member, in a cross section of the pillar shaped honeycomb structure perpendicular to a flow path direction of the first fluid, the cells are radially provided, and each of the inner peripheral wall and the outer peripheral wall has a thickness larger than that of each of the partition walls.Type: ApplicationFiled: May 21, 2019Publication date: September 12, 2019Applicant: NGK INSULATORS, LTD.Inventors: Tatsuo KAWAGUCHI, Takeshi SAKUMA, Daisuke KIMURA, Yutaro FUMOTO
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Publication number: 20190259891Abstract: An infrared light receiving device includes: a structure having a supporting base and a laminate body, the laminate body including a first superlattice layer, a second superlattice layer and a semiconductor region, the first superlattice layer, the second superlattice layer and the semiconductor region being arranged sequentially on the supporting base, and the laminate body having an array of semiconductor mesas for photodiodes and a recess defining the array of semiconductor mesas; and a first electrode connected to the first superlattice layer. The first superlattice layer has an n-type conductivity. The semiconductor region has a p-type conductivity. The first superlattice layer has a type-II superlattice structure and forming a heterojunction with the supporting base. The recess has first and second recess portions. The second recess portion has a bottom in the first superlattice layer. The first recess portion has a depth larger than that of the second recess portion.Type: ApplicationFiled: February 14, 2019Publication date: August 22, 2019Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Daisuke Kimura, Sundararajan BALASEKARAN
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Patent number: 10361335Abstract: A method includes: forming a first mask having a first opening and a second opening; performing etching by using the first mask, to allow the etching to progress at a higher rate in the second opening than in the first opening; forming a second mask having a third opening and a fourth opening; performing etching by using the second mask, to form a mesa in a region interposed by the third opening, and an n-type contact region in the fourth opening; and forming a first electrode on the mesa and a second electrode on the n-type contact region, the first electrode being electrically connected to the third layer, the second electrode being electrically connected to the first layer, wherein a region covered with the first mask and exposed through the fourth opening of the second mask turns into the n-type contact region after the etching using the second mask.Type: GrantFiled: May 1, 2018Date of Patent: July 23, 2019Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Daisuke Kimura, Sundararajan Balasekaran
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Publication number: 20190204031Abstract: A heat exchanging member includes: a pillar shape honeycomb structure having an outer peripheral wall and partition walls extending through the honeycomb structure from a first end face to a second end face to define a plurality of cells forming a through channel of a first fluid, and a covering member for covering the outer peripheral wall of the honeycomb structure. In a cross section of the honeycomb structure perpendicular to a flow direction of the first fluid, the partition walls includes: a plurality of first partition walls extending in a radial direction from the side of a center portion of the cross section; and a plurality of second partition walls extending in a circumferential direction, and a number of the first partition walls on the side of the central portion is less than a number of the first partition walls on the side of the outer peripheral wall.Type: ApplicationFiled: December 21, 2018Publication date: July 4, 2019Applicant: NGK Insulators, LTD.Inventors: Tatsuo KAWAGUCHI, Daisuke Kimura
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Patent number: 10339981Abstract: According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.Type: GrantFiled: July 25, 2018Date of Patent: July 2, 2019Assignee: Toshiba Memory CorporationInventors: Masato Sugita, Naoki Kimura, Daisuke Kimura
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Patent number: 10319778Abstract: A light receiving element includes: a semiconductor layer including a first layer, a light absorbing layer, a second layer, and a third layer, the semiconductor layer having a plurality of mesas, a terrace, and a groove; a first electrode provided on the mesas and electrically connected to the third layer; a first bump provided on the first electrode and electrically connected to the first electrode; a second electrode provided on a portion extending from the terrace to an inner side of the groove and electrically connected to the first layer; and a second bump larger than the first bump, is provided on the terrace, and is electrically connected to the second electrode, wherein the mesas and the terrace include the semiconductor layer, the groove extends to the first layer, and the second electrode is in contact with the first layer on an inner side of the groove.Type: GrantFiled: April 24, 2018Date of Patent: June 11, 2019Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Daisuke Kimura, Hiroshi Inada
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Patent number: 10312390Abstract: A light receiving device includes a substrate having a principal surface and a back surface including a light receiving surface; a metal wire disposed on the principal surface, the metal wire including a bonding portion having an opening; and photodiodes that is arranged in an array on the substrate, each of the photodiodes including an electrode connected to the bonding portion of the metal wire and a semiconductor mesa including a stacked semiconductor layer, the stacked semiconductor layer including a first semiconductor layer disposed on the substrate, an optical absorption layer including a type-II superlattice structure, and a second semiconductor layer. Each of the electrodes of the photodiodes is disposed on a side surface of the semiconductor mesa in contact with the first semiconductor layer. The first semiconductor layer faces to the light receiving surface through the opening of the bonding portion.Type: GrantFiled: March 26, 2018Date of Patent: June 4, 2019Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Sundararajan Balasekaran, Daisuke Kimura
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Publication number: 20180351029Abstract: A method includes: forming a first mask having a first opening and a second opening; performing etching by using the first mask, to allow the etching to progress at a higher rate in the second opening than in the first opening; forming a second mask having a third opening and a fourth opening; performing etching by using the second mask, to form a mesa in a region interposed by the third opening, and an n-type contact region in the fourth opening; and forming a first electrode on the mesa and a second electrode on the n-type contact region, the first electrode being electrically connected to the third layer, the second electrode being electrically connected to the first layer, wherein a region covered with the first mask and exposed through the fourth opening of the second mask turns into the n-type contact region after the etching using the second mask.Type: ApplicationFiled: May 1, 2018Publication date: December 6, 2018Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Daisuke KIMURA, Sundararajan BALASEKARAN
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Publication number: 20180342545Abstract: A light receiving element includes: a semiconductor layer including a first layer, a light absorbing layer, a second layer, and a third layer, the semiconductor layer having a plurality of mesas, a terrace, and a groove; a first electrode provided on the mesas and electrically connected to the third layer; a first bump provided on the first electrode and electrically connected to the first electrode; a second electrode provided on a portion extending from the terrace to an inner side of the groove and electrically connected to the first layer; and a second bump larger than the first bump, is provided on the terrace, and is electrically connected to the second electrode, wherein the mesas and the terrace include the semiconductor layer, the groove extends to the first layer, and the second electrode is in contact with the first layer on an inner side of the groove.Type: ApplicationFiled: April 24, 2018Publication date: November 29, 2018Applicant: Sumitomo Electric Industries, Ltd.Inventors: Daisuke Kimura, Hiroshi Inada
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Publication number: 20180342635Abstract: A light receiving device includes a substrate having a principal surface and a back surface including a light receiving surface; a metal wire disposed on the principal surface, the metal wire including a bonding portion having an opening; and photodiodes that is arranged in an array on the substrate, each of the photodiodes including an electrode connected to the bonding portion of the metal wire and a semiconductor mesa including a stacked semiconductor layer, the stacked semiconductor layer including a first semiconductor layer disposed on the substrate, an optical absorption layer including a type-II superlattice structure, and a second semiconductor layer. Each of the electrodes of the photodiodes is disposed on a side surface of the semiconductor mesa in contact with the first semiconductor layer. The first semiconductor layer faces to the light receiving surface through the opening of the bonding portion.Type: ApplicationFiled: March 26, 2018Publication date: November 29, 2018Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Sundararajan BALASEKARAN, Daisuke Kimura
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Publication number: 20180330764Abstract: According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.Type: ApplicationFiled: July 25, 2018Publication date: November 15, 2018Applicant: Toshiba Memory CorporationInventors: Masato SUGITA, Naoki Kimura, Daisuke Kimura