Patents by Inventor Daisuke Kimura
Daisuke Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180270956Abstract: A semiconductor device includes a mounting substrate including an interface, which is connectable with a host, a surface-mounted component mounted on the mounting substrate and having first and second electrode groups, a first solder portion that is positioned between a first electrode in the first electrode group and the mounting substrate to electrically connect the first electrode and the mounting substrate, and a second solder portion that is positioned between a second electrode in the second electrode group and the mounting substrate to electrically connect the second electrode and the mounting substrate. The second solder portion has a larger contact area with the mounting substrate than the first solder portion. The second solder portion is positioned between at least one additional second electrode in the second electrode group to electrically connect the at least one additional second electrode and the mounting substrate.Type: ApplicationFiled: September 4, 2017Publication date: September 20, 2018Inventor: Daisuke KIMURA
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Patent number: 10056119Abstract: According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.Type: GrantFiled: July 11, 2017Date of Patent: August 21, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Masato Sugita, Naoki Kimura, Daisuke Kimura
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Publication number: 20180230884Abstract: An exhaust heat recovery device including a heat exchange portion, an exhaust branch portion, and an exhaust distribution portion, wherein the heat exchange portion comprises a pillar-shaped honeycomb body having a first end face and a second end face, and a casing accommodating the honeycomb body, the exhaust branch portion has a branch path that branches a path of exhaust gas flowing into the honeycomb body into a central portion and an outer circumferential portion in a cross-section orthogonal to an axial direction of the honeycomb body, and the exhaust distribution portion has an exhaust distribution mechanism that adjusts a heat recovery amount by changing an airflow resistance of the path of the exhaust gas in the central portion of the honeycomb body and varying the exhaust amount passing through the path of the exhaust gas in the outer circumferential portion of the honeycomb body.Type: ApplicationFiled: April 17, 2018Publication date: August 16, 2018Applicant: NGK INSULATORS, LTD.Inventors: Tatsuo KAWAGUCHI, Takeshi SAKUMA, Makoto YOSHIHARA, Hiroshi MIZUNO, Daisuke KIMURA
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Publication number: 20180142967Abstract: A heat exchanger, including: a columnar honeycomb structure having cells partitioned by partition walls composed of ceramics, each cell penetrating from a first end to a second end to form a flow path for a first fluid; an inner tubular member fitted to an outer peripheral surface of the honeycomb structure to circumferentially cover that surface; a spacer directly and circumferentially covering an outer peripheral surface of the inner tubular member as well as indirectly and circumferentially covering the outer peripheral surface of the honeycomb structure; and an outer tubular member directly and circumferentially covering the spacer; wherein the spacer has a three-dimensional structure that allows flow of a second fluid therein and suppresses movement of bubbles in the second fluid; and wherein at least one opening part between the inner tubular member and the outer tubular member forms a gate of the spacer for the second fluid.Type: ApplicationFiled: November 13, 2017Publication date: May 24, 2018Applicant: NGK INSULATORS, LTD.Inventors: Tatsuo KAWAGUCHI, Daisuke KIMURA
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Patent number: 9843205Abstract: A secondary protection IC is connected in parallel with a rechargeable battery and controls the charge and discharge of the rechargeable battery separately from a primary protection IC. The secondary protection IC includes a detection circuit that detects an overcharge or overdischarge of the rechargeable battery, a regulator that stabilizes the voltage of the rechargeable battery and outputs the stabilized voltage to the outside of the rechargeable battery, and a control terminal that controls the regulator with a control signal. Each of the detection circuit and the regulator performs a normal operation or stops operating based on the voltage of the rechargeable battery and the control signal.Type: GrantFiled: December 2, 2014Date of Patent: December 12, 2017Assignee: MITSUMI ELECTRIC CO., LTD.Inventors: Daisuke Kimura, Junji Takeshita
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Publication number: 20170309313Abstract: According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.Type: ApplicationFiled: July 11, 2017Publication date: October 26, 2017Applicant: Toshiba Memory CorporationInventors: Masato SUGITA, Naoki KIMURA, Daisuke KIMURA
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Patent number: 9721621Abstract: According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.Type: GrantFiled: August 12, 2016Date of Patent: August 1, 2017Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Masato Sugita, Naoki Kimura, Daisuke Kimura
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Patent number: 9563100Abstract: An optical semiconductor device including: a substrate having a principal surface; first and second optical waveguides disposed on the principal surface of the substrate, the first and second optical waveguides extending in a first direction, the second optical waveguide being arranged adjacent to the first optical waveguide in a second direction intersecting with the first direction; first and second signal electrodes disposed on the first and second optical waveguides; a resistor disposed on the principal surface, the resistor being arranged between the first optical waveguide and the second optical waveguide, the resistor being electrically connected to the first signal electrode and the second signal electrode; a resin layer disposed on the principal surface, top surfaces of the first and second signal electrodes, and the resistor; and a capacitor disposed on the resin layer, the capacitor being electrically connected to the resistor through an opening of the resin layer.Type: GrantFiled: July 23, 2015Date of Patent: February 7, 2017Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Ryuji Masuyama, Naoya Kono, Daisuke Kimura, Hirohiko Kobayashi, Takamitsu Kitamura, Hideki Yagi
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Publication number: 20170032836Abstract: A semiconductor device includes a substrate having a connector for connection with a host, a semiconductor memory device mounted on the substrate and including a plurality of memory cells, a temperature sensor mounted on the substrate, and a controller mounted on the substrate. The controller is configured to determine a number of bits per memory cell by which data are to be written in the semiconductor memory device, based on a temperature detected by the temperature sensor, and write the data in the semiconductor memory device by the determined number of bits per memory cell.Type: ApplicationFiled: February 29, 2016Publication date: February 2, 2017Inventors: Daisuke KIMURA, Hayato MASUBUCHI
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Publication number: 20170030777Abstract: A semiconductor device includes a substrate having a connector for connection with a host, a semiconductor memory device mounted on the substrate, a temperature sensor mounted on the substrate, and a controller mounted on the substrate. The controller is configured to write, in the semiconductor memory device, write data received through the connector together with temperature data representing temperature detected by the temperature sensor.Type: ApplicationFiled: February 29, 2016Publication date: February 2, 2017Inventors: Daisuke KIMURA, Hayato MASUBUCHI
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Patent number: 9523871Abstract: A semiconductor optical modulator includes a substrate having a principal surface; a waveguide disposed on the principal surface of the substrate, the waveguide extending in a first direction; a first electrode disposed on the waveguide, the first electrode being in contact with an upper surface of the waveguide; a first wiring connected to the first electrode, the first wiring extending in a second direction intersecting the first direction; a build-up portion connected to the first wiring; a second wiring connected to the build-up portion, the second wiring extending in a plane parallel to the principal surface of the substrate; and a resin layer disposed on the substrate, the resin layer embedding the first wiring and the build-up portion. The build-up portion extends along a third direction, the third direction intersecting perpendicularly to the principal surface of the substrate. The second wiring is disposed on the resin layer.Type: GrantFiled: July 10, 2015Date of Patent: December 20, 2016Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Takamitsu Kitamura, Hideki Yagi, Daisuke Kimura, Hirohiko Kobayashi, Masataka Watanabe
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Publication number: 20160351232Abstract: According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.Type: ApplicationFiled: August 12, 2016Publication date: December 1, 2016Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Masato SUGITA, Naoki Kimura, Daisuke Kimura
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Patent number: 9449654Abstract: According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.Type: GrantFiled: July 10, 2014Date of Patent: September 20, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Masato Sugita, Naoki Kimura, Daisuke Kimura
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Patent number: 9373953Abstract: A disclosed battery protecting circuit for protecting a secondary battery including at least first and second cells connected in series includes a first terminal connected on a high potential side of the first cell; a second terminal connected on a low potential side of the first cell and a high potential side of the second cell; a third terminal connected on a low potential side of the second cell; a charge abnormality detecting circuit detecting abnormality of the charged state of the secondary battery; a shifting circuit shifting electric potential of the second terminal on a side of the first terminal or a third terminal when a disconnection occurs between the secondary battery and the second terminal; a disconnection detecting circuit detecting the disconnection based on the electric potential of the second terminal; and a latching circuit retaining a result detected by the disconnection detecting circuit.Type: GrantFiled: December 27, 2012Date of Patent: June 21, 2016Assignee: MITSUMI ELECTRIC CO., LTD.Inventor: Daisuke Kimura
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Patent number: 9373363Abstract: According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.Type: GrantFiled: June 5, 2015Date of Patent: June 21, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Masato Sugita, Naoki Kimura, Daisuke Kimura
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Patent number: 9280030Abstract: A method for producing a semiconductor optical device includes the steps of forming first and second optical waveguides; forming a first resin layer on the first and the second optical waveguides; forming an opening in the first resin layer; forming a first electrode in the opening; forming a second resin layer on the first electrode and the first resin layer; forming a groove in the second resin layer on the first electrode; forming a second electrode on the second resin layer, a side surface of the groove, and the top surface of the first electrode; and forming a third electrode on the second electrode. The second and third electrodes have a region in which the second and third electrodes pass over the second optical waveguide, and, in the region, the first and second resin layers are disposed between the second electrode and the second optical waveguide.Type: GrantFiled: July 11, 2014Date of Patent: March 8, 2016Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Daisuke Kimura, Hideki Yagi, Takamitsu Kitamura
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Publication number: 20160026064Abstract: An optical semiconductor device including: a substrate having a principal surface; a first and a second optical waveguides disposed on the principal surface of the substrate, the first and second optical waveguides extending in a first direction, the second optical waveguide being arranged adjacent to the first optical waveguide in a second direction intersecting with the first direction; a first and a second signal electrodes disposed on the first and second optical waveguides; a resistor disposed on the principal surface, the resistor being arranged between the first optical waveguide and the second optical waveguide, the resistor being electrically connected to the first signal electrode and the second signal electrode; a resin layer disposed on the principal surface, top surfaces of the first and second signal electrodes, and the resistor; and a capacitor disposed on the resin layer, the capacitor being electrically connected to the resistor through an opening of the resin layer.Type: ApplicationFiled: July 23, 2015Publication date: January 28, 2016Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Ryuji MASUYAMA, Naoya KONO, Daisuke KIMURA, Hirohiko KOBAYASHI, Takamitsu KITAMURA, Hideki YAGI
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Publication number: 20160011439Abstract: A semiconductor optical modulator includes a substrate having a principal surface; a waveguide disposed on the principal surface of the substrate, the waveguide extending in a first direction; a first electrode disposed on the waveguide, the first electrode being in contact with an upper surface of the waveguide; a first wiring connected to the first electrode, the first wiring extending in a second direction intersecting the first direction; a build-up portion connected to the first wiring; a second wiring connected to the build-up portion, the second wiring extending in a plane parallel to the principal surface of the substrate; and a resin layer disposed on the substrate, the resin layer embedding the first wiring and the build-up portion. The build-up portion extends along a third direction, the third direction intersecting perpendicularly to the principal surface of the substrate. The second wiring is disposed on the resin layer.Type: ApplicationFiled: July 10, 2015Publication date: January 14, 2016Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Takamitsu KITAMURA, Hideki YAGI, Daisuke KIMURA, Hirohiko KOBAYASHI, Masataka WATANABE
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Publication number: 20150269973Abstract: According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.Type: ApplicationFiled: June 5, 2015Publication date: September 24, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Masato SUGITA, Naoki Kimura, Daisuke Kimura
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Publication number: 20150162763Abstract: A secondary protection IC is connected in parallel with a rechargeable battery and controls the charge and discharge of the rechargeable battery separately from a primary protection IC. The secondary protection IC includes a detection circuit that detects an overcharge or overdischarge of the rechargeable battery, a regulator that stabilizes the voltage of the rechargeable battery and outputs the stabilized voltage to the outside of the rechargeable battery, and a control terminal that controls the regulator with a control signal. Each of the detection circuit and the regulator performs a normal operation or stops operating based on the voltage of the rechargeable battery and the control signal.Type: ApplicationFiled: December 2, 2014Publication date: June 11, 2015Applicant: MITSUMI ELECTRIC CO., LTD.Inventors: Daisuke KIMURA, Junji TAKESHITA