Abstract: An insulated wire, having at least one thermosetting resin layer and at least one thermoplastic resin layer in this order, as covering layers, on a conductor having a quadrilateral cross-section, wherein, in a coating thickness of the covering layers, in each side to be formed on 4 sides of the quadrilateral cross-section of said insulated wire, a difference between the maximum value and the minimum value is each 20 ?m or less, and a value of the maximum value divided by the minimum value of the whole sides is 1.3 or more; a motor coil; and an electrical or electronic equipment.

Abstract: An inverter surge-resistant insulated wire comprising a conductor and an enamel resin-insulating laminate that has a foamed region including cells and a non-foamed region including no cells on at least one surface of the foamed region on the conductor, wherein the foamed region is configured such that a non-cell layer including no cells has cell layers formed of closed cells on both surface sides of the non-cell layer, a thickness of the non-cell layer is larger than a thickness of a partition wall among the closed cells, and 5 to 60% of a thickness of the foamed region, and at least 10 the cell layer in the foamed region is formed of a thermosetting resin; an inverter surge-resistant insulated wire having a conductor and the enamel resin-insulating laminate; and electric/electronic equipment.

Abstract: An insulated wire having a thermosetting resin layer on the outer periphery of a conductor and a thermoplastic resin layer on the outer periphery of the thermosetting resin layer, wherein a total thickness of the thermosetting resin layer and the thermoplastic resin layer is 100 ?m or more and 250 ?m or less, and a degree of orientation of a thermoplastic resin in said thermoplastic resin layer, that is calculated by the following Formula 1, is 20% or more and 90% or less; a coil and an electric and electronic equipment each having the insulated wire. Formula 1 Degree of orientation H (%)=[(360??Wn)/360]×100 Wn: A half width of orientation peak in the azimuth angle intensity distribution curve by X-ray diffraction n: the number of orientation peak at a ? angle of 0° or more and 360° or less.

Abstract: An insulated wire having a thermosetting resin layer on the outer periphery of a conductor, and a thermoplastic resin layer on the outer periphery of the thermosetting resin layer, wherein a total thickness of the thermosetting resin layer and the thermoplastic resin layer is 100 ?m or more and 250 ?m or less, and a degree of orientation of a thermoplastic resin in said thermoplastic resin layer, that is calculated by the following Formula 1, is 20% or more and 90% or less; a coil and an electric and electronic equipment each having the insulated wire. Degree of orientation H (%)=[(360-?Wn)/360]×100 ??Formula 1 Wn: A half width of orientation peak in the azimuth angle intensity distribution curve by X-ray diffraction n; the number of orientation peak at a ? angle of 0° or more and 360° or less.

Abstract: Provided is a manufacturing device capable of effectively and sufficiently reducing an edge crown. The wafer support is used in a chemical vapor phase growth device in which an epitaxial film is grown on a main surface of a wafer using a chemical vapor deposition method, the wafer support including: a wafer mounting surface having an upper surface on which a substrate is mounted; and a wafer support portion that rises to surround a wafer to be mounted, in which a height from an apex of the wafer support portion to a main surface of the wafer mounted on the wafer mounting surface is 1 mm or more.

Abstract: Provided is a manufacturing device capable of effectively and sufficiently reducing an edge crown. The wafer support is used in a chemical vapor phase growth device in which an epitaxial film is grown on a main surface of a wafer using a chemical vapor deposition method, the wafer support including: a wafer mounting surface having an upper surface on which a substrate is mounted; and a wafer support portion that rises to surround a wafer to be mounted, in which a height from an apex of the wafer support portion to a main surface of the wafer mounted on the wafer mounting surface is 1 mm or more.

Abstract: An insulated wire, containing: a conductor having a rectangular cross-section; and an insulating coated film having at least two insulating layers laminated together on the conductor, wherein the laminated insulating coated film is composed of: an enamel insulating layer formed from a thermosetting resin on the outer periphery of the conductor, and an extruded insulating layer formed from a thermoplastic resin on the outer side of the enamel insulating layer, wherein the thickness of the enamel insulating layer is 50 ?m or more, and wherein the total thickness (T) and the relative permittivity (?) at 100° C. of the laminated insulating coated film; and the maximum thickness (Tmax), and the maximum value (?max) and the minimum value (?min) of the relative permittivity at 100° C. of one layer among the laminated insulating layers; satisfy all of the following relations: T?100 ?m ??(1.1) Tmax?100 ?m ??(1.2) 1.5???3.5 ??(2.1) 1.0??max/?min?1.2 ??(2.

Abstract: A SiC epitaxial wafer including: a SiC epitaxial layer that is formed on a SiC substrate having an off angle, wherein the surface density of triangular defects, in which a distance from a starting point to an opposite side in a horizontal direction is equal to or greater than (a thickness of the SiC epitaxial layer/tan(x))×90% and equal to or less than (the thickness of the SiC epitaxial layer/tan(x))×110%, in the SiC epitaxial layer is in the range of 0.05 pieces/cm2 to 0.5 pieces/cm2 (where x indicates the off angle).

Abstract: This method of producing a SiC epitaxial wafer having an epitaxial layer on a SiC single crystal substrate, and includes: when performing crystal growth of the epitaxial layer, a step of forming a part of an epitaxial layer under first conditions at an initial stage where the crystal growth is started; and a step of forming a part of a SiC epitaxial layer under second conditions in which a Cl/Si ratio is decreased and a C/Si ratio is increased in comparison to those in the first conditions, wherein the C/Si ratio is equal to or less than 0.6 and the Cl/Si ratio is equal to or more than 5.0 in the first conditions.

Abstract: An insulated wire, having at least one thermosetting resin layer and at least one thermoplastic resin layer in this order, as covering layers, on a conductor having a quadrilateral cross-section, wherein, in a coating thickness of the covering layers, in each side to be formed on 4 sides of the quadrilateral cross-section of said insulated wire, a difference between the maximum value and the minimum value is each 20 ?m or less, and a value of the maximum value divided by the minimum value of the whole sides is 1.3 or more; a motor coil; and an electrical or electronic equipment.

Abstract: An SiC epitaxial wafer having an SiC epitaxial layer formed on an SiC single crystal substrate having an offset angle of 4 degrees or less in a <11-20> direction from a (0001) plane. A trapezoidal defect included in the SiC epitaxial wafer includes an inverted trapezoidal defect in which a length of a lower base on a downstream side of a step flow is equal to or less than a length of an upper base on an upstream side of the step flow. Also disclosed is a method for manufacturing the SiC epitaxial wafer.

Abstract: Provided is a manufacturing device capable of effectively and sufficiently reducing an edge crown. The wafer support is used in a chemical vapor phase growth device in which an epitaxial film is grown on a main surface of a wafer using a chemical vapor deposition method, the wafer support including: a wafer mounting surface having an upper surface on which a substrate is mounted; and a wafer support portion that rises to surround a wafer to he mounted, in which a height from an apex of the wafer support portion to a main surface of the wafer mounted on the wafer mounting surface is 1 mm or more.

Abstract: A SiC epitaxial wafer manufacturing method of the present invention includes: manufacturing a SiC epitaxial wafer including a SiC epitaxial layer on a surface of a SiC single crystal wafer while supplying a raw material gas into a chamber using a SiC epitaxial wafer manufacturing apparatus; and manufacturing a subsequent SiC epitaxial wafer after measuring a surface density of triangular defects originating from a material piece of an internal member of the chamber on the SiC epitaxial layer of the previously manufactured SiC epitaxial wafer.

Abstract: A SiC epitaxial wafer including: a SiC epitaxial layer that is formed on a SiC substrate having an off angle, wherein the surface density of triangular defects, in which a distance from a starting point to an opposite side in a horizontal direction is equal to or greater than (a thickness of the SiC epitaxial layer/tan(x))×90% and equal to or less than (the thickness of the SiC epitaxial layer/tan(x))×110%, in the SiC epitaxial layer is in the range of 0.05 pieces/cm2 to 0.5 pieces/cm2 (where x indicates the off angle).

Abstract: An insulated wire having a conductor, and a multilayer insulating layer composed of two or more layers coating the conductor, wherein the innermost insulating layer of the multilayer insulating layer is an insulating layer formed of a crystalline thermoplastic resin having a storage elastic modulus of 10 MPa or more at 300° C. and outer insulating layer(s) other than the innermost insulating layer include(s) an insulating layer formed of a crystalline thermoplastic resin having a melting point of 260° C. or higher and a storage elastic modulus of 1,000 MPa or more at 25° C., and adjacent insulating layers have a relationship such that the storage elastic modulus at 25° C. of the thermoplastic resin of the outer insulating layer is equal to or smaller than the inner insulating layer; and electric/electronic equipment formed using the insulated wire as a winding and/or lead wire of a transformer that is incorporated into the electric/electronic equipment.

Abstract: Provided is a method of manufacturing a SiC epitaxial wafer including a SiC epitaxial layer on a SiC substrate using a SiC-CVD furnace which is installed in a glove box. The method includes a SiC substrate placement step of placing the SiC substrate in the SiC-CVD furnace while circulating gas in the glove box.

Abstract: An epitaxial wafer manufacturing device, including a shield (12), which in addition to being removably attached inside a chamber, is arranged in close proximity to the lower surface of a top plate (3). The shield has a substrate (12a) having an opening (13) in the central portion thereof that forces a gas inlet (9) to face the inside of a reaction space (K), and a thin film (12b) that covers the lower surface of the substrate. The surface of the thin film has the shape of surface irregularities corresponding to fine surface irregularities formed in the lower surface of the substrate. When the shield has undergone thermal deformation as a result of being heated by heating means (8), deposits deposited on the lower surface of the shield are inhibited from falling off by the shape of the surface irregularities.

Abstract: Provided is an epitaxial wafer manufacturing device (1) that deposits and grows epitaxial layers on the surfaces of wafers W while supplying a raw material gas to a chamber, wherein a shield (12), arranged in close proximity to the lower surface of a top plate (3) so as to prevent deposits from being deposited on the lower surface of the top plate (3), is removably attached inside the chamber, has an opening (13) in the central portion thereof that forces a gas inlet (9) to face the inside of a reaction space K, and has a structure in which it is concentrically divided into a plurality of ring plates (16), (17) and (18) around the opening (13).

Abstract: A SiC epitaxial wafer manufacturing method of the present invention includes: manufacturing a SiC epitaxial wafer including a SiC epitaxial layer on a surface of a SiC single crystal wafer while supplying a raw material gas into a chamber using a SiC epitaxial wafer manufacturing apparatus; and manufacturing a subsequent SiC epitaxial wafer after measuring a surface density of triangular defects originating from a material piece of an internal member of the chamber on the SiC epitaxial layer of the previously manufactured SiC epitaxial wafer.

Abstract: An inverter surge-resistant insulated wire has a baked enamel layer(s) around the outer periphery of a conductor having a rectangular cross-section, an extrusion-coated resin layer(s) around the outer side thereof, and an adhesive layer having a thickness of 2-20 ?m between the baked enamel layer and the extrusion-coated resin layer. A cross-sectional shape of the baked enamel layer and the extrusion-coated resin layer in the cross-section of the wire is rectangular. In the cross-sectional shape formed by the baked enamel layer and the extrusion-coated resin layer surrounding the conductor in a cross-sectional view, at least a pair of two sides of two pairs of two sides opposing at the upper side and the downside or at the right side and the left side with respect to the conductor meet the conditions that a total thickness of the baked enamel layer and the extrusion-coated resin layer is 80 ?m or more.