Patents by Inventor Daisuke Oshida

Daisuke Oshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11965758
    Abstract: An object of the present invention is to provide a Brillouin optical sensing device and an optical sensing method capable of reducing introduction costs. The Brillouin optical sensing device according to the present invention includes: a sensing fiber 90 in which a plurality of optical fibers having Brillouin frequency shift characteristics different from each other are arranged in parallel; an optical measuring instrument 11 that launches an optical pulse into at least two of the optical fibers of the sensing fiber 90 to generate Brillouin scattering lights and measures a beat frequency of a beat signal between the Brillouin scattering lights at any position of the sensing fiber 90; and an arithmetic processing unit 12 that acquires a physical quantity of the sensing fiber 90 at said any position based on the beat frequency acquired by the optical measuring instrument 11.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: April 23, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Atsushi Nakamura, Chihiro Kito, Daisuke Iida, Junichi Kawataka, Hiroyuki Oshida
  • Patent number: 11821795
    Abstract: A semiconductor device according to an embodiment includes a holding circuit including a buffer configured to obtain a heat stress information having a temperature dependency every predetermined period and a stress counter configured to accumulate the heat stress information and hold the accumulated value as a cumulative stress count value, a control circuit including an operation determination threshold value, and a wireless communication circuit. According to the semiconductor device according to the embodiment, while reducing the power consumption, it is possible to wirelessly transmit the cumulative heat stress information.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: November 21, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kan Takeuchi, Yoshio Takazawa, Fumio Tsuchiya, Daisuke Oshida, Naoya Ota, Masaki Shimada, Shinya Konishi
  • Patent number: 11068330
    Abstract: The semiconductor device has a module having a predetermined function, an error information acquisition circuit for acquiring error information about an error occurring in the module, a stress acquisition circuit for acquiring a stress accumulated value as an accumulated value of stress applied to the semiconductor device, and an analysis data storage for storing analysis data as data for analyzing the state of the semiconductor device, the error information and the stress accumulated value at the time of occurrence of the error being associated with each other.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: July 20, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Naoya Ota, Kan Takeuchi, Fumio Tsuchiya, Masaki Shimada, Shinya Konishi, Daisuke Oshida
  • Publication number: 20210080330
    Abstract: A semiconductor device according to an embodiment includes a holding circuit including a buffer configured to obtain a heat stress information having a temperature dependency every predetermined period and a stress counter configured to accumulate the heat stress information and hold the accumulated value as a cumulative stress count value, a control circuit including an operation determination threshold value, and a wireless communication circuit. According to the semiconductor device according to the embodiment, while reducing the power consumption, it is possible to wirelessly transmit the cumulative heat stress information.
    Type: Application
    Filed: September 2, 2020
    Publication date: March 18, 2021
    Inventors: Kan TAKEUCHI, Yoshio TAKAZAWA, Fumio TSUCHIYA, Daisuke OSHIDA, Naoya OTA, Masaki SHIMADA, Shinya KONISHI
  • Patent number: 10944554
    Abstract: In a semiconductor device and an information processing system according to one embodiment, an external device generates external device unique information by using a unique code which is a value unique to the semiconductor device, and generates second information by encrypting the first information with the use of the external device unique information. The semiconductor device stores the second information and generates the principal device unique information independently of the external device, with the use of the unique code of the semiconductor device holding the second information, and decrypts the second information with the use of the principal device unique information to obtain the first information.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: March 9, 2021
    Assignee: Renesas Electronics Corporation
    Inventors: Daisuke Oshida, Shigemasa Shiota
  • Publication number: 20200082128
    Abstract: A semiconductor device included in a computer system, the semiconductor device comprising an acquiring circuit that acquires irreversible data unique to another semiconductor device, and a detecting circuit that verifies whether the irreversible data of another semiconductor device is inconsistent with previously acquired irreversible data of another semiconductor device and detecting an abnormality of the computer system based on the verification result.
    Type: Application
    Filed: August 14, 2019
    Publication date: March 12, 2020
    Inventor: Daisuke OSHIDA
  • Publication number: 20200081757
    Abstract: The semiconductor device has a module having a predetermined function, an error information acquisition circuit for acquiring error information about an error occurring in the module, a stress acquisition circuit for acquiring a stress accumulated value as an accumulated value of stress applied to the semiconductor device, and an analysis data storage for storing analysis data as data for analyzing the state of the semiconductor device, the error information and the stress accumulated value at the time of occurrence of the error being associated with each other.
    Type: Application
    Filed: August 16, 2019
    Publication date: March 12, 2020
    Inventors: Naoya OTA, Kan TAKEUCHI, Fumio TSUCHIYA, Masaki SHIMADA, Shinya KONISHI, Daisuke OSHIDA
  • Patent number: 10505645
    Abstract: To discriminate between a circuit where a failure does not occur and a circuit where a failure might occur, a wireless communication device has tested units which belong to a transmission side circuit, tested units which belong to a reception side circuit, a test signal generation unit for generating a test signal, a test signal reception unit for receiving a test signal, a test signal determination unit for determining whether or not the test signal received by the test signal reception unit is normal, and test signal transfer units for transferring a test signal from the transmission side circuit to the reception side circuit.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: December 10, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Suguru Fujita, Masakatsu Yokota, Daisuke Oshida
  • Patent number: 10469256
    Abstract: Provided is a cryptographic communication system including a first semiconductor device and a second semiconductor device. The first semiconductor device includes a common key generation unit that generates a common key CK(a) by using a unique code UC(a) and correction data CD(a), and an encryption unit that encrypts the common key CK(a) generated in the common key generation unit by using a public key PK(b) of the second semiconductor device. The second semiconductor device includes a secret key generation unit that generates a secret key SK(b) by using a unique code UC(b) and correction data CD(b), and a decryption unit that decrypts the common key CK(a) encrypted in the encryption unit by using the secret key SK(b).
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: November 5, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shigemasa Shiota, Shigeru Furuta, Masayuki Hirokawa, Akira Yamazaki, Daisuke Oshida
  • Patent number: 10411950
    Abstract: In an on-vehicle system, the gateway is duplexed, and a countermeasure table is included. The countermeasure table defines a failure phenomenon occurring in communication, an identification method for identifying a factor on whether the failure phenomenon is caused by a failure of the gateway or caused by a security attack on the gateway, and a corresponding countermeasure method. When it is detected that a failure phenomenon has occurred is communication through the gateway, the on-vehicle system determines a factor of the detected failure phenomenon based on the identification method defined in the countermeasure table, and makes countermeasures in accordance with the corresponding countermeasure method.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: September 10, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shigemasa Shiota, Takeshi Sunada, Akihiro Yamate, Daisuke Oshida
  • Patent number: 10382419
    Abstract: An object of the present invention is to prevent an attack from or via a communication device on an information apparatus in a communication system including the information apparatus, the communication device coupled to the information apparatus in the aftermarket, a server that authenticates the communication device, and a communication unit between the communication device and the server. A communication device includes a first interface that performs first communications with a server, a second interface that performs second communications with an information apparatus, and an information processing unit that performs an information process including a communication protocol process accompanied by the first and second communications.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: August 13, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Daisuke Oshida
  • Patent number: 10374796
    Abstract: Provided is a high-speed and light-weighted authentication system that makes IP address filtering possible and does not impair real-time property even on a network including many and unspecific entities (communication devices). In a communication system that a plurality of communication devices are coupled together such that mutual communication is possible over the network, the communication devices communicate with a server under a secure environment, when authentication has been obtained from the server, random seeds of the same value and individual identifiers are issued to them, each communication device generates the IP address that includes a pseudorandom number and the identifier, and the communication devices establish communication between the communication devices that include the pseudorandom numbers that are mutually the same in their IP addresses.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: August 6, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Daisuke Oshida, Yoshiyuki Sato, Yasuhiro Sagesaka, Takeshi Itome
  • Patent number: 10360991
    Abstract: The disclosed invention can provide a semiconductor device, a lifetime prediction system, and a lifetime prediction method enabling it to notify a user that a semiconductor device is likely to become faulty, before the semiconductor device becomes faulty. A semiconductor device includes functional units and a lifetime prediction circuit. The lifetime prediction circuit acquires a deterioration degree indicating a degree of how each functional unit deteriorates, using a signal that is output from each functional unit. The lifetime prediction circuit executes processing to make a notification that the semiconductor device is close to its lifetime, if the deterioration degree is more than a first threshold.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: July 23, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Takeshi Sunada, Daisuke Oshida, Makoto Yabuuchi
  • Patent number: 10230707
    Abstract: An object of the present invention is to prevent an attack from or via a communication device on an information apparatus in a communication system including the information apparatus, the communication device coupled to the information apparatus in the aftermarket, a server that authenticates the communication device, and a communication unit between the communication device and the server. A communication device includes a first interface that performs first communications with a server, a second interface that performs second communications with an information apparatus, and an information processing unit that performs an information process including a communication protocol process accompanied by the first and second communications.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: March 12, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Daisuke Oshida
  • Patent number: 10216964
    Abstract: To raise confidentiality of the value stored in the ROM, in an IC having a built-in or an externally-attached ROM storing a value (program and/or data) encrypted using a predetermined cryptographic key. The IC includes the ROM storing the encrypted value (program and/or data), a unique code generating unit, and a decrypting unit. The unique code generating unit generates a unique code specifically determined by production variation. The decrypting unit calculates a cryptographic key on the basis of the generated unique code and a correction parameter, and decrypts the encrypted value read out from the ROM by using the calculated cryptographic key. The correction parameter is preliminarily calculated outside the IC, on the basis of an initial unique code generated from the unique code generating unit immediately after production of the IC, and the predetermined cryptographic key used for encryption of the value to be stored in the ROM.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: February 26, 2019
    Assignee: Renesas Electronics Corporation
    Inventor: Daisuke Oshida
  • Publication number: 20180343070
    Abstract: To discriminate between a circuit where a failure does not occur and a circuit where a failure might occur, a wireless communication device has tested units which belong to a transmission side circuit, tested units which belong to a reception side circuit, a test signal generation unit for generating a test signal, a test signal reception unit for receiving a test signal, a test signal determination unit for determining whether or not the test signal received by the test signal reception unit is normal, and test signal transfer units for transferring a test signal from the transmission side circuit to the reception side circuit.
    Type: Application
    Filed: April 17, 2018
    Publication date: November 29, 2018
    Inventors: Suguru FUJITA, Masakatsu YOKOTA, Daisuke OSHIDA
  • Patent number: 10142311
    Abstract: Devices between which packets are transmitted and received include mutually corresponding packet counters. The same random number value is given to the packet counters as their initial values and the packet counters are updated with packet transmission/reception. The transmission-side device generates a MAC value, draws out part thereof on the basis of a counted value of its own packet counter, sets it as a divided MAC value, generates a packet by adding the value to a message and transmits the packet onto a network. The reception-side device generates a MAC value on the basis of the message in the received packet, draws out part thereof on the basis of a counted value of its own packet counter, compares the part with the divided MAC value in the received packet and thereby performs message authentication.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: November 27, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Daisuke Oshida
  • Patent number: 10111264
    Abstract: The communication terminal includes a communication interface for acquiring external time information from outside and a non-volatile memory and operates as described below. The communication terminal periodically acquires external time information, encrypts the internal time information calibrated based on the acquired external time information, and thereafter writes the encrypted internal time information into the non-volatile memory. In an initialization sequence after power-on of the communication terminal, the communication terminal reads and decrypts internal time information that is lastly written to the non-volatile memory before the power-on, newly acquires external time information, and verifies validity of the acquired external time information by comparing the acquired external time information with the read internal time information.
    Type: Grant
    Filed: May 19, 2016
    Date of Patent: October 23, 2018
    Assignee: Renesas Electronics Corporation
    Inventor: Daisuke Oshida
  • Publication number: 20180301033
    Abstract: A stopped vehicle cannot transmit position information about a subject vehicle by disabling communication. The vehicle-to-vehicle communication cannot therefore detect the position information about the stopped vehicle. A safe driving assistance system includes a first vehicle, a second vehicle, and an infrastructure. The second vehicle can transmit and receive position information from the first vehicle each other. The infrastructure includes a roadside unit that can receive position information about the first vehicle and position information about the second vehicle, can transmit position information about the first vehicle to the second vehicle, and can transmit position information about the second vehicle to the first vehicle. The infrastructure detects that the first vehicle stops, based on communication with the first vehicle, and transmits position information about the stopped first vehicle to the second vehicle.
    Type: Application
    Filed: February 20, 2018
    Publication date: October 18, 2018
    Inventor: Daisuke OSHIDA
  • Publication number: 20180241559
    Abstract: In a semiconductor device and an information processing system according to one embodiment, an external device generates external device unique information by using a unique code which is a value unique to the semiconductor device, and generates second information by encrypting the first information with the use of the external device unique information. The semiconductor device stores the second information and generates the principal device unique information independently of the external device, with the use of the unique code of the semiconductor device holding the second information, and decrypts the second information with the use of the principal device unique information to obtain the first information.
    Type: Application
    Filed: April 25, 2018
    Publication date: August 23, 2018
    Inventors: DAISUKE OSHIDA, Shigemasa SHIOTA