Patents by Inventor Daisuke Oshida
Daisuke Oshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9960914Abstract: In a semiconductor device and an information processing system according to one embodiment, an external device generates external device unique information by using a unique code which is a value unique to the semiconductor device, and generates second information by encrypting the first information with the use of the external device unique information. The semiconductor device stores the second information and generates the principal device unique information independently of the external device, with the use of the unique code of the semiconductor device holding the second information, and decrypts the second information with the use of the principal device unique information to obtain the first information.Type: GrantFiled: October 28, 2013Date of Patent: May 1, 2018Assignee: Renesas Electronics CorporationInventors: Daisuke Oshida, Shigemasa Shiota
-
Publication number: 20180096169Abstract: To raise confidentiality of the value stored in the ROM, in an IC having a built-in or an externally-attached ROM storing a value (program and/or data) encrypted using a predetermined cryptographic key. The IC includes the ROM storing the encrypted value (program and/or data), a unique code generating unit, and a decrypting unit. The unique code generating unit generates a unique code specifically determined by production variation. The decrypting unit calculates a cryptographic key on the basis of the generated unique code and a correction parameter, and decrypts the encrypted value read out from the ROM by using the calculated cryptographic key. The correction parameter is preliminarily calculated outside the IC, on the basis of an initial unique code generated from the unique code generating unit immediately after production of the IC, and the predetermined cryptographic key used for encryption of the value to be stored in the ROM.Type: ApplicationFiled: November 10, 2017Publication date: April 5, 2018Inventor: Daisuke OSHIDA
-
Patent number: 9931953Abstract: It is intended to provide a safe non-contact charging environment that enables finding an electronic appliance that remains left in a vehicle before start of charging and preventing trouble that an electronic appliance breaks down by electromagnetic waves generated during charging by means of electromagnetic coupling. A process of checking to see that an electronic appliance remains left inside a vehicle, based on wireless communication information emitted by the electronic appliance left inside the vehicle is performed in advance. When it has been detected that an electronic appliance remains left, a charging current value is controlled according to an allowable current of the detected electronic appliance or an alert is generated to notify that the electronic appliance remains left.Type: GrantFiled: February 11, 2015Date of Patent: April 3, 2018Assignee: RENESAS ELECTRONIC CORPORATIONInventors: Daisuke Oshida, Shigeru Furuta
-
Patent number: 9846788Abstract: To raise confidentiality of the value stored in the ROM, in an IC having a built-in or an externally-attached ROM storing a value (program and/or data) encrypted using a predetermined cryptographic key. The IC includes the ROM storing the encrypted value (program and/or data), a unique code generating unit, and a decrypting unit. The unique code generating unit generates a unique code specifically determined by production variation. The decrypting unit calculates a cryptographic key on the basis of the generated unique code and a correction parameter, and decrypts the encrypted value readout from the ROM by using the calculated cryptographic key. The correction parameter is preliminarily calculated outside the IC, on the basis of an initial unique code generated from the unique code generating unit immediately after production of the IC, and the predetermined cryptographic key used for encryption of the value to be stored in the ROM.Type: GrantFiled: June 26, 2014Date of Patent: December 19, 2017Assignee: RENESAS ELECTRONICS CORPORATIONInventor: Daisuke Oshida
-
Publication number: 20170277455Abstract: The disclosed invention can provide a semiconductor device, a lifetime prediction system, and a lifetime prediction method enabling it to notify a user that a semiconductor device is likely to become faulty, before the semiconductor device becomes faulty. A semiconductor device includes functional units and a lifetime prediction circuit. The lifetime prediction circuit acquires a deterioration degree indicating a degree of how each functional unit deteriorates, using a signal that is output from each functional unit. The lifetime prediction circuit executes processing to make a notification that the semiconductor device is close to its lifetime, if the deterioration degree is more than a first threshold.Type: ApplicationFiled: January 27, 2017Publication date: September 28, 2017Inventors: Takeshi Sunada, Daisuke Oshida, Makoto Yabuuchi
-
Publication number: 20170244594Abstract: In an on-vehicle system, the gateway is duplexed, and a countermeasure table is included. The countermeasure table defines a failure phenomenon occurring in communication, an identification method for identifying a factor on whether the failure phenomenon is caused by a failure of the gateway or caused by a security attack on the gateway, and a corresponding countermeasure method. When it is detected that a failure phenomenon has occurred is communication through the gateway, the on-vehicle system determines a factor of the detected failure phenomenon based on the identification method defined in the countermeasure table, and makes countermeasures in accordance with the corresponding countermeasure method.Type: ApplicationFiled: January 26, 2017Publication date: August 24, 2017Applicant: Renesas Electronics CorporationInventors: Shigemasa SHIOTA, Takeshi SUNADA, Akihiro YAMATE, Daisuke OSHIDA
-
Publication number: 20170155508Abstract: Provided is a cryptographic communication system including a first semiconductor device and a second semiconductor device. The first semiconductor device includes a common key generation unit that generates a common key CK(a) by using a unique code UC(a) and correction data CD(a), and an encryption unit that encrypts the common key CK(a) generated in the common key generation unit by using a public key PK(b) of the second semiconductor device. The second semiconductor device includes a secret key generation unit that generates a secret key SK(b) by using a unique code UC(b) and correction data CD(b), and a decryption unit that decrypts the common key CK(a) encrypted in the encryption unit by using the secret key SK(b).Type: ApplicationFiled: February 14, 2017Publication date: June 1, 2017Inventors: Shigemasa Shiota, Shigeru Furuta, Masayuki Hirokawa, Akira Yamazaki, Daisuke Oshida
-
Patent number: 9667410Abstract: In data processing including high-speed cipher calculation for which it is not appropriate to employ a leveling technique, tamper resistance is improved against an attack to a specific position performed by knowing a layout of functional blocks in a semiconductor chip. Examples of the attack include micro-probing, fault injection, and electromagnetic wave analysis. A semiconductor device, in which a plurality of IC chips that perform the same cipher calculation in parallel are laminated or stacked, performs data processing including the cipher calculation. A chip that compares and verifies results of the cipher calculations performed by the plurality of chips is laminated in an intermediate layer whose element surface is covered by another chip. For example, when three chips are laminated, a chip in the intermediate layer sandwiched by the upper layer and the lower layer has a comparative verification function.Type: GrantFiled: September 3, 2015Date of Patent: May 30, 2017Assignee: Renesas Electronics CorporationInventor: Daisuke Oshida
-
Publication number: 20170092126Abstract: There is provided a communication system including the first communication device (roadside unit), a second communication device, and a data processing device. The first communication device is capable of establishing broadcast-type first communication (V2X communication) with the first communication terminal (vehicle). The second communication device is capable of establishing unicast- or multicast-type second communication with a plurality of moving objects (pedestrians) other than the first communication terminal and acquiring position information about the moving objects (pedestrians). The data processing device permits the second communication device to acquire position information about the moving objects and allows the first communication device (roadside unit) to transmit information (LDM) representative of the acquired position information about the moving objects to the first communication terminal (vehicle).Type: ApplicationFiled: September 21, 2016Publication date: March 30, 2017Inventors: Daisuke OSHIDA, Masakatsu YOKOTA, Yasuhiro SAGESAKA
-
Patent number: 9608818Abstract: Provided is a cryptographic communication system including a first semiconductor device and a second semiconductor device. The first semiconductor device includes a common key generation unit that generates a common key CK(a) by using a unique code UC(a) and correction data CD(a), and an encryption unit that encrypts the common key CK(a) generated in the common key generation unit by using a public key PK(b) of the second semiconductor device. The second semiconductor device includes a secret key generation unit that generates a secret key SK(b) by using a unique code UC(b) and correction data CD(b), and a decryption unit that decrypts the common key CK(a) encrypted in the encryption unit by using the secret key SK(b).Type: GrantFiled: February 4, 2015Date of Patent: March 28, 2017Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Shigemasa Shiota, Shigeru Furuta, Masayuki Hirokawa, Akira Yamazaki, Daisuke Oshida
-
Publication number: 20170034867Abstract: The communication terminal includes a communication interface for acquiring external time information from outside and a non-volatile memory and operates as described below. The communication terminal periodically acquires external time information, encrypts the internal time information calibrated based on the acquired external time information, and thereafter writes the encrypted internal time information into the non-volatile memory. in an initialization sequence after power-on of the communication terminal, the communication terminal reads and decrypts internal time information that is lastly written to the non-volatile memory before the power-on, newly acquires external time information, and verifies validity of the acquired external time information by comparing the acquired external time information with the read internal time information.Type: ApplicationFiled: May 19, 2016Publication date: February 2, 2017Inventor: Daisuke OSHIDA
-
Publication number: 20160255065Abstract: Devices between which packets are transmitted and received include mutually corresponding packet counters. The same random number value is given to the packet counters as their initial values and the packet counters are updated with packet transmission/reception. The transmission-side device generates a MAC value, draws out part thereof on the basis of a counted value of its own packet counter, sets it as a divided MAC value, generates a packet by adding the value to a message and transmits the packet onto a network. The reception-side device generates a MAC value on the basis of the message in the received packet, draws out part thereof on the basis of a counted value of its own packet counter, compares the part with the divided MAC value in the received packet and thereby performs message authentication.Type: ApplicationFiled: December 10, 2015Publication date: September 1, 2016Inventor: Daisuke OSHIDA
-
Publication number: 20160219029Abstract: An object of the present invention is to prevent an attack from or via a communication device on an information apparatus in a communication system including the information apparatus, the communication device coupled to the information apparatus in the aftermarket, a server that authenticates the communication device, and a communication unit between the communication device and the server. A communication device includes a first interface that performs first communications with a server, a second interface that performs second communications with an information apparatus, and an information processing unit that performs an information process including a communication protocol process accompanied by the first and second communications.Type: ApplicationFiled: November 5, 2015Publication date: July 28, 2016Inventor: Daisuke OSHIDA
-
Patent number: 9379055Abstract: A semiconductor device in which misalignment does not cause short-circuiting and inter-wiring capacitance is decreased. Plural wirings are provided in a first interlayer insulating layer. An air gap is made between at least one pair of wirings in the layer. A second interlayer insulating layer lies over the wirings and first interlayer insulating layer. The first bottom face of the second interlayer insulating layer is exposed to the air gap. When a pair of adjacent wirings whose distance is shortest are first wirings, the upper ends of the first interlayer insulating layer between the first wirings are in contact with the first wirings' side faces. The first bottom face is below the first wirings' upper faces. b/a?0.5 holds where a represents the distance between the first wirings and b represents the width of the portion of the first interlayer insulating layer in contact with the first bottom face.Type: GrantFiled: September 18, 2014Date of Patent: June 28, 2016Assignee: Renesas Electronics CorporationInventor: Daisuke Oshida
-
Patent number: 9363082Abstract: Provided is a cryptographic communication system including a first semiconductor device and a second semiconductor device. The first semiconductor device includes a common key generation unit that generates a common key CK(a) by using a unique code UC(a) and correction data CD(a), and an encryption unit that encrypts the common key CK(a) generated in the common key generation unit by using a public key PK(b) of the second semiconductor device. The second semiconductor device includes a secret key generation unit that generates a secret key SK(b) by using a unique code UC(b) and correction data CD(b), and a decryption unit that decrypts the common key CK(a) encrypted in the encryption unit by using the secret key SK(b).Type: GrantFiled: June 13, 2012Date of Patent: June 7, 2016Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Shigemasa Shiota, Shigeru Furuta, Masayuki Hirokawa, Akira Yamazaki, Daisuke Oshida
-
Patent number: 9337093Abstract: The semiconductor device includes an insulating film that is formed using a cyclic siloxane having a six-membered ring structure as a raw material; a trench that is formed in the insulating film; and a interconnect that is configured by a metal film embedded in the trench. In the semiconductor device, a modified layer is formed on a bottom surface of the trench, in which the number of carbon atoms and/or the number of nitrogen atoms per unit volume is larger than that inside the insulating film.Type: GrantFiled: July 14, 2011Date of Patent: May 10, 2016Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Daisuke Oshida, Ippei Kume, Makoto Ueki, Manabu Iguchi, Naoya Inoue, Takuya Maruyama, Toshiji Taiji, Hirokazu Katsuyama
-
Patent number: 9325496Abstract: The first device, which utilize a cipher, generates device unique data by a PUF, and the second device generates one pair of helper data and a device unique ID on the basis of the generated device unique data. The device unique data has fluctuations caused by the generation environment, and regarding the fluctuations as an error to the device unique ID, the helper data serves as correction data for correcting the error. The second device generates a Hash function from the device unique ID and the encryption key. The second device writes one of the helper data and the Hash function to the first device first, and after authenticating the first device by the write, the other of the helper data and the Hash function is written in the first device. Decrypting the encryption key, the first device is allowed to utilize the cipher.Type: GrantFiled: September 23, 2014Date of Patent: April 26, 2016Assignee: Renesas Electronics CorporationInventors: Daisuke Oshida, Tetsuya Fukunaga
-
Patent number: 9300470Abstract: A semiconductor device has: a unique code generating unit generating an initial unique code which is a value unique to a device and includes an error in a random bit; a first error correcting unit correcting an error in the initial unique code to generate an intermediate unique code; a second error correcting unit correcting an error in the intermediate unique code to generate a first determinate unique code; and a decrypting unit decrypting, with the first determinate unique code, transmission data obtained by encrypting confidential information with key information generated on the basis of the intermediate unique code by an external device to generate confidential information.Type: GrantFiled: March 27, 2015Date of Patent: March 29, 2016Assignee: Renesas Electronics CorporationInventors: Daisuke Oshida, Shigeru Furuta, Masayuki Hirokawa, Akira Yamazaki, Takashi Fujimori, Shigemasa Shiota
-
Publication number: 20160072621Abstract: In data processing including high-speed cipher calculation for which it is not appropriate to employ a leveling technique, tamper resistance is improved against an attack to a specific position performed by knowing a layout of functional blocks in a semiconductor chip. Examples of the attack include micro-probing, fault injection, and electromagnetic wave analysis. A semiconductor device, in which a plurality of IC chips that perform the same cipher calculation in parallel are laminated or stacked, performs data processing including the cipher calculation. A chip that compares and verifies results of the cipher calculations performed by the plurality of chips is laminated in an intermediate layer whose element surface is covered by another chip. For example, when three chips are laminated, a chip in the intermediate layer sandwiched by the upper layer and the lower layer has a comparative verification function.Type: ApplicationFiled: September 3, 2015Publication date: March 10, 2016Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Daisuke OSHIDA
-
Publication number: 20160065367Abstract: Provided is a high-speed and light-weighted authentication system that makes IP address filtering possible and does not impair real-time property even on a network including many and unspecific entities (communication devices). In a communication system that a plurality of communication devices are coupled together such that mutual communication is possible over the network, the communication devices communicate with a server under a secure environment, when authentication has been obtained from the server, random seeds of the same value and individual identifiers are issued to them, each communication device generates the IP address that includes a pseudorandom number and the identifier, and the communication devices establish communication between the communication devices that include the pseudorandom numbers that are mutually the same in their IP addresses.Type: ApplicationFiled: August 26, 2015Publication date: March 3, 2016Inventors: Daisuke OSHIDA, Yoshiyuki SATO, Yasuhiro SAGESAKA, Takeshi ITOME