Abstract: The present invention provides a method and apparatus for an atomic layer deposition process. The apparatus includes a chamber adapted to receive a first precursor gas, at least one surface interior to the chamber, and an acoustic wave driver coupled to the at least one surface and adapted to drive acoustic waves along the interior surface.

Abstract: A structure and method are disclosed for forming a capacitor for an integrated circuit. The capacitor includes a rhodium-rich structure, a rhodium oxide layer in direct contact with the rhodium-rich structure, a capacitor dielectric in direct contact with the rhodium oxide layer and a top electrode over the capacitor. The rhodium-rich structure can include rhodium alloys and the capacitor dielectric preferably has a high dielectric constant.

Abstract: A method and apparatus for delivering precursors to a chemical vapor deposition or atomic layer deposition chamber is provided. The apparatus includes a temperature-controlled vessel containing a precursor. An energy source is used to vaporize the precursor at its surface such that substantially no thermal decomposition of the remaining precursor occurs. The energy source may include a carrier gas, a radio frequency coupling device, or an infrared irradiation source. After the precursor is exposed to the energy source, the vaporized portion of the precursor is transported via a temperature-controlled conduit to a chemical vapor deposition or atomic deposition chamber for further processing.

Abstract: The present invention provides a method and apparatus for an atomic layer deposition process. The apparatus includes a chamber adapted to receive a first precursor gas, at least one surface interior to the chamber, and an acoustic wave driver coupled to the at least one surface and adapted to drive acoustic waves along the interior surface.

Abstract: A structure and method are disclosed for forming a capacitor for an integrated circuit. The capacitor includes a rhodium-rich structure, a rhodium oxide layer in direct contact with the rhodium-rich structure, a capacitor dielectric in direct contact with the rhodium oxide layer and a top electrode over the capacitor. The rhodium-rich structure can include rhodium alloys and the capacitor dielectric preferably has a high dielectric constant.

Abstract: A method of forming a coupling dielectric in a memory cell includes forming an oxide on a substrate, forming Ta2O5 on the oxide, oxidizing the Ta2O5 with rapid thermal process (RTP) at a temperature above the crystallization temperature for Ta2O5, forming a cell nitride on the oxidized Ta2O5, and forming a wetgate oxide on the cell nitride.

Abstract: A structure and method are disclosed for forming a capacitor for an integrated circuit. The capacitor includes a rhodium-rich structure, a rhodium oxide layer in direct contact with the rhodium-rich structure, a capacitor dielectric in direct contact with the rhodium oxide layer and a top electrode over the capacitor. The rhodium-rich structure can include rhodium alloys and the capacitor dielectric preferably has a high dielectric constant.

Abstract: A method and apparatus for delivering precursors to a chemical vapor deposition or atomic layer deposition chamber is provided. The apparatus includes a temperature-controlled vessel containing a precursor. An energy source is used to vaporize the precursor at its surface such that substantially no thermal decomposition of the remaining precursor occurs. The energy source may include a carrier gas, a radio frequency coupling device, or an infrared irradiation source. After the precursor is exposed to the energy source, the vaporized portion of the precursor is transported via a temperature-controlled conduit to a chemical vapor deposition or atomic deposition chamber for further processing.

Abstract: A dielectric sandwich for use in a memory device is disclosed. The dielectric sandwich is thin and has at least one high permittivity layer having a thickness of between 140 and 240 angstroms. The dielectric sandwich also has at least one oxide layer formed at a temperature above the crystallization temperature of the high permittivity layer. In a flash memory cell the dielectric sandwich is located between the control gate and the floating gate and provides tight coupling between the control gate and the floating gate.

Abstract: CVD, ALD, and other vapor processes used in processing semiconductor workpieces often require volatilizing a liquid or solid precursor. Certain embodiments of the invention provide improved and/or more consistent volatilization rates by moving a reaction vessel. In one exemplary embodiment, a reaction vessel is rotated about a rotation axis which is disposed at an angle with respect to vertical. This deposits a quantity of the reaction precursor on an interior surface of the vessel's sidewall which is exposed to the headspace as the vessel rotates. Other embodiments employ drivers adapted to move the reaction vessel in other manners, such as a pendulum arm to oscillate the vessel along an arcuate path or a mechanical linkage which moves the vessel along an elliptical path.

Abstract: A method for controlling stoichiometry of dielectric films, e.g., BST films, preferably formed at low deposition temperatures. A deposition process may use an adjustment in oxidizer flow and/or partial pressure, the provision of a hydrogen-containing component, an adjustment in hydrogen-containing component flow and/or partial pressure, an adjustment in deposition pressure, and/or a modification of system component parameters (e.g., heating a shower head or adjusting a distance between a shower head of the deposition system and a wafer upon which the film is to be deposited), to control the characteristics of the dielectric film, e.g., film stoichiometry.

Abstract: A structure and method are disclosed for forming a capacitor for an integrated circuit. The capacitor includes a rhodium-rich structure, a rhodium oxide layer in direct contact with the rhodium-rich structure, a capacitor dielectric in direct contact with the rhodium oxide layer and a top electrode over the capacitor. The rhodium-rich structure can include rhodium alloys and the capacitor dielectric preferably has a high dielectric constant.

Abstract: A method for controlling stoichiometry of dielectric films, e.g., BST films, preferably formed at low deposition temperatures. A deposition process may use an adjustment in oxidizer flow and/or partial pressure, the provision of a hydrogen-containing component, an adjustment in hydrogen-containing component flow and/or partial pressure, an adjustment in deposition pressure, and/or a modification of system component parameters (e.g., heating a shower head or adjusting a distance between a shower head of the deposition system and a wafer upon which the film is to be deposited), to control the characteristics of the dielectric film, e.g., film stoichiometry.

Abstract: An improved dynamic random access memory (DRAM) device with a capacitor having reduced current leakage from the dielectric layer, and materials and methods for fabricating the improved DRAM device are disclosed. The capacitor is formed using an oxygen anneal after a top conducting layer of the capacitor is formed.

Abstract: The present invention provides a method for forming a dielectric film, e.g., a barium-strontium-titanate film, preferably having a thickness of less than about 600 Å. According to the present invention, the dielectric film is preferably formed using a chemical vapor deposition process in which an interfacial layer and a bulk layer are formed. The interfacial layer has an atomic percent of titanium less than or equal to the atomic percent of titanium in the bulk layer. Such films are particularly advantageous for use in memory devices, such as dynamic random access memory (DRAM) devices.

Abstract: A structure and method are disclosed for forming a capacitor for an integrated circuit. The capacitor includes a rhodium-rich structure, a rhodium oxide layer in direct contact with the rhodium-rich structure, a capacitor dielectric in direct contact with the rhodium oxide layer and a top electrode over the capacitor. The rhodium-rich structure can include rhodium alloys and the capacitor dielectric preferably has a high dielectric constant.

Abstract: Titanium boride (TiBx), zirconium boride (ZrBx) and hafnium boride (HfBx) barriers and electrodes for cell dielectrics for integrated circuits, particularly for DRAM cell capacitors. The barriers protect cell dielectrics from diffusion and other interaction with surrounding materials during subsequent thermal processing.

Abstract: A capacitor for a memory device is formed with a conductive oxide for a bottom electrode. The conductive oxide (RuOx) is deposited under low temperatures as an amorphous film. As a result, the film is conformally deposited over a three dimensional, folding structure. Furthermore, a subsequent polishing step is easily performed on the amorphous film, increasing wafer throughput. After deposition and polishing, the film is crystallized in a non-oxidizing ambient.

Abstract: A capacitor has a tantalum oxynitride film. One method for making the film comprises forming a bottom plate electrode and then forming a tantalum oxide film on the bottom plate electrode. Nitrogen is introduced to form a tantalum oxynitride film. A top plate electrode is formed on the tantalum oxynitride film.

Abstract: A capacitor for a memory device is formed with a conductive oxide for a bottom electrode. The conductive oxide (RuOx) is deposited under low temperatures as an amorphous film. As a result, the film is conformally deposited over a three dimensional, folding structure. Furthermore, a subsequent polishing step is easily performed on the amorphous film, increasing wafer throughput. After deposition and polishing, the film is crystallized in a non-oxidizing ambient.