Patents by Inventor Dan Moy
Dan Moy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8841208Abstract: An electronic fuse structure including a first Mx metal comprising a conductive cap, an Mx+1 metal located above the Mx metal, wherein the Mx+1 metal does not comprise a conductive cap, and a via, wherein the via electrically connects the Mx metal to the Mx+1 metal in a vertical orientation.Type: GrantFiled: July 18, 2012Date of Patent: September 23, 2014Assignee: International Business Machines CorporationInventors: Junjing Bao, Elbert Emin Huang, Yan Zun Li, Dan Moy
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Publication number: 20140021578Abstract: An electronic fuse structure including a first Mx metal comprising a conductive cap, an Mx+1 metal located above the Mx metal, wherein the Mx+1 metal does not comprise a conductive cap, and a via, wherein the via electrically connects the Mx metal to the Mx+1 metal in a vertical orientation.Type: ApplicationFiled: July 18, 2012Publication date: January 23, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Junjing Bao, Elbert Emin Huang, Yan Zun Li, Dan Moy
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Patent number: 8629049Abstract: A fabrication method for fabricating an electrically programmable fuse method includes depositing a polysilicon layer on a substrate, patterning an anode contact region, a cathode contact region and a fuse link conductively connecting the cathode contact region with the anode contact region, which is programmable by applying a programming current, depositing a silicide layer on the polysilicon layer, and forming a plurality of anisometric contacts on the silicide layer of the cathode contact region and the anode contact region in a predetermined configuration, respectively.Type: GrantFiled: March 15, 2012Date of Patent: January 14, 2014Assignee: International Business Machines CorporationInventors: Chandrasekharan Kothandaraman, Dan Moy, Norman W. Robson, John M. Safran
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Patent number: 8569755Abstract: An antifuse has first and second semiconductor regions having one conductivity type and a third semiconductor region therebetween having an opposite conductivity type. A conductive region contacting the first region has a long dimension in a second direction transverse to the direction of a long dimension of a gate. An antifuse anode is spaced apart from the first region in the second direction and a contact is connected with the second region. Applying a programming voltage between the anode and the contact with gate bias sufficient to fully turn on field effect transistor operation of the antifuse heats the first region to drive a dopant outwardly, causing an edge of the first region to move closer to an edge of the second region and reduce electrical resistance between the first and second regions by an one or more orders of magnitude.Type: GrantFiled: September 13, 2012Date of Patent: October 29, 2013Assignee: International Business Machines CorporationInventors: Yan Zun Li, Chandrasekharan Kothandaraman, Dan Moy, Norman W. Robson, John M. Safran
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Patent number: 8519507Abstract: An electrically programmable fuse that includes an anode contact region and a cathode contact region are formed of a polysilicon layer having a silicide layer formed thereon, and a fuse link conductively connecting the cathode contact region with the anode contact region, which is programmable by applying a programming current, and a plurality of anisometric contacts formed on the silicide layer of the cathode contact region or on both the silicide layer of the cathode contact region and the anode contact region in a predetermined configuration, respectively.Type: GrantFiled: June 29, 2009Date of Patent: August 27, 2013Assignee: International Business Machines CorporationInventors: Chandrasekharan Kothandaraman, Dan Moy, Norman W. Robson, John M. Safran
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Publication number: 20130176073Abstract: A BEOL e-fuse is disclosed which reliably blows in the via and can be formed even in the tightest pitch BEOL layers. The BEOL e-fuse can be formed utilizing a line first dual damascene process to create a sub-lithographic via to be the programmable link of the e-fuse. The sub-lithographic via can be patterned using standard lithography and the cross section of the via can be tuned to match the target programming current.Type: ApplicationFiled: January 11, 2012Publication date: July 11, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Junjing Bao, Griselda Bonilla, Kaushik Chanda, Samuel S. Choi, Ronald Filippi, Stephan Grunow, Naftali E. Lustig, Dan Moy, Andrew H. Simon
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Patent number: 8445362Abstract: An apparatus and method for programming an electronically programmable semiconductor fuse applies a programming current to a fuse link as a series of multiple pulses. Application of the programming current as a series of multiple short pulses provides a level of programming current sufficiently high to ensure reliable and effective electromigration while avoiding exceeding temperature limits of the fuse link.Type: GrantFiled: October 11, 2006Date of Patent: May 21, 2013Assignee: International Business Machines CorporationInventors: Dan Moy, Stephen Wu, Peter Wang, Brian W. Messenger, Edwin Soler, Gabriel Chiulli
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Publication number: 20130063202Abstract: An antifuse has first and second semiconductor regions having one conductivity type and a third semiconductor region therebetween having an opposite conductivity type. A conductive region contacting the first region has a long dimension in a second direction transverse to the direction of a long dimension of a gate. An antifuse anode is spaced apart from the first region in the second direction and a contact is connected with the second region. Applying a programming voltage between the anode and the contact with gate bias sufficient to fully turn on field effect transistor operation of the antifuse heats the first region to drive a dopant outwardly, causing an edge of the first region to move closer to an edge of the second region and reduce electrical resistance between the first and second regions by an one or more orders of magnitude.Type: ApplicationFiled: September 13, 2012Publication date: March 14, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Yan Zun Li, Chandrasekharan Kothandaraman, Dan Moy, Norman W. Robson, John M. Safran
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Patent number: 8350264Abstract: An antifuse is provided having a unitary monocrystalline semiconductor body including first and second semiconductor regions each having the same first conductivity type, and a third semiconductor region between the first and second semiconductor regions which has a second conductivity type opposite from the first conductivity type. An anode and a cathode can be electrically connected with the first semiconductor region. A conductive region including a metal, a conductive compound of a metal or an alloy of a metal can contact the first semiconductor region and extend between the cathode and the anode. The antifuse can further include a contact electrically connected with the second semiconductor region.Type: GrantFiled: July 14, 2010Date of Patent: January 8, 2013Assignee: International Businesss Machines CorporationInventors: Yan Zun Li, Chandrasekharan Kothandaraman, Dan Moy, Norman W. Robson, John M. Safran
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Publication number: 20120171857Abstract: A fabrication method for fabricating an electrically programmable fuse method includes depositing a polysilicon layer on a substrate, patterning an anode contact region, a cathode contact region and a fuse link conductively connecting the cathode contact region with the anode contact region, which is programmable by applying a programming current, depositing a silicide layer on the polysilicon layer, and forming a plurality of anisometric contacts on the silicide layer of the cathode contact region and the anode contact region in a predetermined configuration, respectively.Type: ApplicationFiled: March 15, 2012Publication date: July 5, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Chandrasekharan Kothandaraman, Dan Moy, Norman W. Robson, John M. Safran
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Publication number: 20120161855Abstract: An apparatus for programming an electronically programmable semiconductor fuse applies a programming current to a fuse link as a series of multiple pulses. Application of the programming current as a series of multiple short pulses provides a level of programming current sufficiently high to ensure reliable and effective electromigration while avoiding exceeding temperature limits of the fuse link.Type: ApplicationFiled: March 6, 2012Publication date: June 28, 2012Applicant: International Business Machines CorporationInventors: Dan Moy, Stephen Wu, Peter Wang, Brian W. Messenger, Edwin Soler, Gabriel Chiulli
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Patent number: 8159040Abstract: A semiconductor structure and a method for fabricating the semiconductor structure provide a field effect device located and formed upon an active region of a semiconductor substrate and at least one of a fuse structure, an anti-fuse structure and a resistor structure located and formed at least in part simultaneously upon an isolation region laterally separated from the active region within the semiconductor substrate. The field effect device includes a gate dielectric comprising a high dielectric constant dielectric material and a gate electrode comprising a metal material. The at least one of the fuse structure, anti-fuse structure and resistor structure includes a pad dielectric comprising the same material as the gate dielectric, and optionally, also a fuse, anti-fuse or resistor that may comprise the same metal material as the gate electrode.Type: GrantFiled: May 13, 2008Date of Patent: April 17, 2012Assignee: International Business Machines CorporationInventors: Douglas D. Coolbaugh, Ebenezer E. Eshun, Ephrem G. Gebreselasie, Zhong-Xiang He, Herbert Lei Ho, Deok-kee Kim, Chandrasekharan Kothandaraman, Dan Moy, Robert Mark Rassel, John Matthew Safran, Kenneth Jay Stein, Norman Whitelaw Robson, Ping-Chuan Wang, Hongwen Yan
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Publication number: 20120012977Abstract: An antifuse is provided having a unitary monocrystalline semiconductor body including first and second semiconductor regions each having the same first conductivity type, and a third semiconductor region between the first and second semiconductor regions which has a second conductivity type opposite from the first conductivity type. An anode and a cathode can be electrically connected with the first semiconductor region. A conductive region including a metal, a conductive compound of a metal or an alloy of a metal can contact the first semiconductor region and extend between the cathode and the anode. The antifuse can further include a contact electrically connected with the second semiconductor region.Type: ApplicationFiled: July 14, 2010Publication date: January 19, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Yan Zun Li, Chandrasekharan Kothandaraman, Dan Moy, Norman W. Robson, John M. Safran
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Patent number: 8004060Abstract: A metal layer and a semiconductor layer are sequentially deposited on a substrate. The semiconductor layer and the metal layer are lithographically patterned to form a stack of a semiconductor portion and a metal gate portion, which is preferably performed concurrently with formation of at least one metal gate stack. In one embodiment, the size of the semiconductor portion is reduced and a metal semiconductor alloy portion is formed on the semiconductor portion by metallization. In a first electrical antifuse formed thereby, the metal semiconductor alloy portion may be electromigrated to form a short between the metal semiconductor alloy portion and the metal gate portion. In another embodiment, two disjoined metal semiconductor alloy portions are formed on the semiconductor portion. In a second electrical antifuse formed thereby, the metal semiconductor alloy portion may be electromigrated to form a short between the two previously disjoined metal semiconductor alloy portions.Type: GrantFiled: November 29, 2007Date of Patent: August 23, 2011Assignee: International Business Machines CorporationInventors: Deok-kee Kim, Chandrasekharan Kothandaraman, Dan Moy, Norman W. Robson, John M. Safran, Kenneth J. Stein
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Publication number: 20100327399Abstract: An electrically programmable fuse that includes an anode contact region and a cathode contact region are formed of a polysilicon layer having a silicide layer formed thereon, and a fuse link conductively connecting the cathode contact region with the anode contact region, which is programmable by applying a programming current, and a plurality of anisometric contacts formed on the silicide layer of the cathode contact region or on both the silicide layer of the cathode contact region and the anode contact region in a predetermined configuration, respectively.Type: ApplicationFiled: June 29, 2009Publication date: December 30, 2010Applicant: International Business Machines CorporationInventors: CHANDRASEKHARAN KOTHANDARAMAN, DAN MOY, NORMAN W. ROBSON, JOHN M. SAFRAN
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Patent number: 7757200Abstract: A design structure for an apparatus for programming an electronically programmable semiconductor fuse. The apparatus applies a programming current to a fuse link as a series of multiple pulses. Application of the programming current as a series of multiple short pulses provides a level of programming current sufficiently high to ensure reliable and effective electromigration while avoiding exceeding temperature limits of the fuse link.Type: GrantFiled: November 16, 2007Date of Patent: July 13, 2010Assignee: International Business Machines CorporationInventors: Dan Moy, Stephen Wu, Peter Wang, Brian W. Messenger, Edwin Soler, Gabriel Chiulli
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Publication number: 20090283840Abstract: A semiconductor structure and a method for fabricating the semiconductor structure provide a field effect device located and formed upon an active region of a semiconductor substrate and at least one of a fuse structure, an anti-fuse structure and a resistor structure located and formed at least in part simultaneously upon an isolation region laterally separated from the active region within the semiconductor substrate. The field effect device includes a gate dielectric comprising a high dielectric constant dielectric material and a gate electrode comprising a metal material. The at least one of the fuse structure, anti-fuse structure and resistor structure includes a pad dielectric comprising the same material as the gate dielectric, and optionally, also a fuse, anti-fuse or resistor that may comprise the same metal material as the gate electrode.Type: ApplicationFiled: May 13, 2008Publication date: November 19, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Douglas D. Coolbaugh, Ebenezer E. Eshun, Ephrem G. Gebreselasie, Zhong-Xiang He, Herbert Lei Ho, Deok-kee Kim, Chandrasekharan Kothandaraman, Dan Moy, Robert Mark Rassel, John Matthew Safran, Kenneth Jay Stein, Norman Whitelaw Robson, Ping-Chuan Wang, Hongwen Yan
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Publication number: 20090141533Abstract: A metal layer and a semiconductor layer are sequentially deposited on a substrate. The semiconductor layer and the metal layer are lithographically patterned to form a stack of a semiconductor portion and a metal gate portion, which is preferably performed concurrently with formation of at least one metal gate stack. In one embodiment, the size of the semiconductor portion is reduced and a metal semiconductor alloy portion is formed on the semiconductor portion by metallization. In a first electrical antifuse formed thereby, the metal semiconductor alloy portion may be electromigrated to form a short between the metal semiconductor alloy portion and the metal gate portion. In another embodiment, two disjoined metal semiconductor alloy portions are formed on the semiconductor portion. In a second electrical antifuse formed thereby, the metal semiconductor alloy portion may be electromigrated to form a short between the two previously disjoined metal semiconductor alloy portions.Type: ApplicationFiled: November 29, 2007Publication date: June 4, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Deok-kee Kim, Chandrasekharan Kothandaraman, Dan Moy, Norman W. Robson, John M. Safran, Kenneth J. Stein
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Publication number: 20090128225Abstract: A design structure for an apparatus for programming an electronically programmable semiconductor fuse. The apparatus applies a programming current to a fuse link as a series of multiple pulses. Application of the programming current as a series of multiple short pulses provides a level of programming current sufficiently high to ensure reliable and effective electromigration while avoiding exceeding temperature limits of the fuse link.Type: ApplicationFiled: November 16, 2007Publication date: May 21, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Dan Moy, Stephen Wu, Peter Wang, Brian W. Messenger, Edwin Soler, Gabriel Chiulli
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Patent number: 7492008Abstract: A method for forming a semiconductor-on-insulator (SOI) substrate is described incorporating the steps of heating a substrate, implanting oxygen into a heated substrate, cooling the substrate, implanting into a cooled substrate and annealing. The steps of implanting may be at several energies to provide a plurality of depths and corresponding buried damaged regions. Prior to implanting, the step of cleaning the substrate surface and/or forming a patterned mask thereon may be performed. The invention overcomes the problem of raising the quality of buried oxide and its properties such as surface roughness, uniform thickness and breakdown voltage Vbd.Type: GrantFiled: July 22, 2004Date of Patent: February 17, 2009Assignee: International Business Machines CorporationInventors: Stephen Richard Fox, Neena Garg, Kenneth John Giewont, Junedong Lee, Siegfried Lutz Maurer, Dan Moy, Maurice Heathcote Norcott, Devendra Kumar Sadana