Patents by Inventor Daniel C. Worledge

Daniel C. Worledge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150372222
    Abstract: A magnetic logic cell includes a first electrode portion, a magnetic portion arranged on the first electrode, the magnetic portion including an anti-ferromagnetic material or a ferrimagnetic material, a dielectric portion arranged on the magnetic portion, and a second electrode portion arranged on the dielectric portion.
    Type: Application
    Filed: January 29, 2015
    Publication date: December 24, 2015
    Inventors: Marcin J. Gajek, Daniel C. Worledge, William H. Butler
  • Patent number: 9214625
    Abstract: A mechanism is provided for a thermally assisted magnetoresistive random access memory device (TAS-MRAM). A non-magnetic heating structure is formed of a barrier seed layer disposed on a buffer layer. A non-magnetic tunnel barrier is disposed on the barrier seed layer. A barrier cap layer is disposed on the non-magnetic tunnel barrier. A top buffer layer is disposed on the barrier cap layer. An antiferromagnetic layer is disposed on the top buffer layer of the non-magnetic heating structure. A magnetic tunnel junction is disposed on the antiferromagnetic layer. The magnetic tunnel junction includes a ferromagnetic storage layer disposed on the antiferromagnetic layer, a non-magnetic active tunnel barrier disposed on the ferromagnetic storage layer, and a ferromagnetic sense layer disposed on the non-magnetic active tunnel barrier.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: December 15, 2015
    Assignee: International Business Machines Corporation
    Inventors: Anthony J. Annunziata, Philip L. Trouilloud, Daniel C. Worledge
  • Publication number: 20150294708
    Abstract: A mechanism is provided for a thermally assisted magnetoresistive random access memory device (TAS-MRAM). A storage layer has an anisotropic axis, in which the storage layer is configured to store a state in off axis positions and on axis positions. The off axis positions are not aligned with the anisotropic axis. A tunnel barrier is disposed on top of the storage layer. A ferromagnetic sense layer is disposed on top of the tunnel barrier.
    Type: Application
    Filed: December 29, 2014
    Publication date: October 15, 2015
    Inventors: Anthony J. Annunziata, Lucian Prejbeanu, Philip L. Trouilloud, Daniel C. Worledge
  • Publication number: 20150295165
    Abstract: A mechanism is provided for fabricating a thermally assisted magnetoresistive random access memory device. A bottom thermal barrier is formed on a bottom contact. A magnetic tunnel junction is formed on the bottom thermal barrier. The magnetic tunnel junction includes a top ferromagnetic layer formed on a tunnel barrier. The tunnel barrier is formed on a bottom ferromagnetic layer. A top thermal barrier is formed on the top ferromagnetic layer. A top contact is formed on the top thermal barrier. The top contact is reduced to a first diameter. The tunnel barrier and the bottom ferromagnetic layer each have a second diameter. The first diameter of the top contact is smaller than the second diameter.
    Type: Application
    Filed: December 29, 2014
    Publication date: October 15, 2015
    Inventors: Anthony J. Annunziata, Lucian Prejbeanu, Philip L. Trouilloud, Daniel C. Worledge
  • Publication number: 20150270478
    Abstract: A mechanism is provided for a thermally assisted magnetoresistive random access memory device (TAS-MRAM). A non-magnetic heating structure is formed of a barrier seed layer disposed on a buffer layer. A non-magnetic tunnel barrier is disposed on the barrier seed layer. A barrier cap layer is disposed on the non-magnetic tunnel barrier. A top buffer layer is disposed on the barrier cap layer. An antiferromagnetic layer is disposed on the top buffer layer of the non-magnetic heating structure. A magnetic tunnel junction is disposed on the antiferromagnetic layer. The magnetic tunnel junction includes a ferromagnetic storage layer disposed on the antiferromagnetic layer, a non-magnetic active tunnel barrier disposed on the ferromagnetic storage layer, and a ferromagnetic sense layer disposed on the non-magnetic active tunnel barrier.
    Type: Application
    Filed: March 18, 2014
    Publication date: September 24, 2015
    Applicant: International Business Machines Corporation
    Inventors: Anthony J. Annunziata, Philip L. Trouilloud, Daniel C. Worledge
  • Publication number: 20150236252
    Abstract: Embodiments are directed to STT MRAM devices. One embodiment of an STT MRAM device includes a reference layer, a tunnel barrier layer, a free layer and one or more conductive vias. The reference layer is configured to have a fixed magnetic moment. In addition, the tunnel barrier layer is configured to enable electrons to tunnel between the reference layer and the free layer through the tunnel barrier layer. The free layer is disposed beneath the tunnel barrier layer and is configured to have an adaptable magnetic moment for the storage of data. The conductive via is disposed beneath the free layer and is connected to an electrode. Further, the conductive via has a width that is smaller than a width of the free layer such that a width of an active STT area for the storage of data in the free layer is defined by the width of the conductive via.
    Type: Application
    Filed: April 29, 2015
    Publication date: August 20, 2015
    Inventors: MICHAEL C. GAIDIS, JANUSZ J. NOWAK, DANIEL C. WORLEDGE
  • Patent number: 9082963
    Abstract: Embodiments are directed to STT MRAM devices. One embodiment of an STT MRAM device includes a reference layer, a tunnel barrier layer, a free layer and one or more conductive vias. The reference layer is configured to have a fixed magnetic moment. In addition, the tunnel barrier layer is configured to enable electrons to tunnel between the reference layer and the free layer through the tunnel barrier layer. The free layer is disposed beneath the tunnel barrier layer and is configured to have an adaptable magnetic moment for the storage of data. The conductive via is disposed beneath the free layer and is connected to an electrode. Further, the conductive via has a width that is smaller than a width of the free layer such that a width of an active STT area for the storage of data in the free layer is defined by the width of the conductive via.
    Type: Grant
    Filed: December 1, 2014
    Date of Patent: July 14, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael C. Gaidis, Janusz J. Nowak, Daniel C. Worledge
  • Publication number: 20150129946
    Abstract: A mechanism is provided for a thermally assisted magnetoresistive random access memory device (TAS-MRAM) with reduced power for reading and writing. A tunnel barrier is disposed adjacent to a ferromagnetic sense layer and a ferromagnetic storage layer, such that the tunnel barrier is sandwiched between the ferromagnetic sense layer and the ferromagnetic storage layer. An antiferromagnetic pinning layer is disposed adjacent to the ferromagnetic storage layer. The pinning layer pins a magnetic moment of the storage layer until heating is applied. The storage layer includes a non-magnetic material to reduce a storage layer magnetization as compared to not having the non-magnetic material. The sense layer includes the non-magnetic material to reduce a sense layer magnetization as compared to not having the non-magnetic material.
    Type: Application
    Filed: September 29, 2014
    Publication date: May 14, 2015
    Inventors: Anthony J. Annunziata, Sebastien Bandiera, Lucien Lombard, Lucian Prejbeanu, Philip L. Trouilloud, Daniel C. Worledge
  • Publication number: 20150087080
    Abstract: Embodiments are directed to STT MRAM devices. One embodiment of an STT MRAM device includes a reference layer, a tunnel barrier layer, a free layer and one or more conductive vias. The reference layer is configured to have a fixed magnetic moment. In addition, the tunnel barrier layer is configured to enable electrons to tunnel between the reference layer and the free layer through the tunnel barrier layer. The free layer is disposed beneath the tunnel barrier layer and is configured to have an adaptable magnetic moment for the storage of data. The conductive via is disposed beneath the free layer and is connected to an electrode. Further, the conductive via has a width that is smaller than a width of the free layer such that a width of an active STT area for the storage of data in the free layer is defined by the width of the conductive via.
    Type: Application
    Filed: December 1, 2014
    Publication date: March 26, 2015
    Inventors: Michael C. Gaidis, Janusz J. Nowak, Daniel C. Worledge
  • Patent number: 8947915
    Abstract: A thermal spin torque transfer magnetoresistive random access memory (MRAM) apparatus includes a magnetic tunnel junction and a tunnel junction programming circuit. The magnetic tunnel junction includes a reference layer having a fixed magnetic polarity, a tunnel barrier layer, and a free layer on an opposite side of the tunnel barrier layer from the reference layer. The free layer includes a first layer having a first Curie temperature and a second layer having a second Curie temperature different from the first Curie temperature. The tunnel junction programming circuit is configured to apply a current through the magnetic tunnel junction to generate a write temperature in the magnetic tunnel junction and to write to the free layer of the magnetic tunnel junction.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: February 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Daniel C. Worledge, Guohan Hu
  • Patent number: 8947917
    Abstract: A thermal spin torque transfer magnetoresistive random access memory (MRAM) apparatus includes a magnetic tunnel junction and a tunnel junction programming circuit. The magnetic tunnel junction includes a reference layer having a fixed magnetic polarity, a tunnel barrier layer, and a free layer on an opposite side of the tunnel barrier layer from the reference layer. The free layer includes a first layer having a first Curie temperature and a second layer having a second Curie temperature different from the first Curie temperature. The tunnel junction programming circuit is configured to apply a current through the magnetic tunnel junction to generate a write temperature in the magnetic tunnel junction and to write to the free layer of the magnetic tunnel junction.
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: February 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Daniel C. Worledge, Guohan Hu
  • Patent number: 8928100
    Abstract: Embodiments are directed to STT MRAM devices. One embodiment of an STT MRAM device includes a reference layer, a tunnel barrier layer, a free layer and one or more conductive vias. The reference layer is configured to have a fixed magnetic moment. In addition, the tunnel barrier layer is configured to enable electrons to tunnel between the reference layer and the free layer through the tunnel barrier layer. The free layer is disposed beneath the tunnel barrier layer and is configured to have an adaptable magnetic moment for the storage of data. The conductive via is disposed beneath the free layer and is connected to an electrode. Further, the conductive via has a width that is smaller than a width of the free layer such that a width of an active STT area for the storage of data in the free layer is defined by the width of the conductive via.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: January 6, 2015
    Assignee: International Business Machines Corporation
    Inventors: Michael C. Gaidis, Janusz J. Nowak, Daniel C. Worledge
  • Patent number: 8912614
    Abstract: Semiconductor stack structures such as magnetic tunnel junction structures having a magnetic free layer that is grown on composite, obliquely deposited seed layers to induce an increased in-plane magnetic anisotropy Hk of the magnetic free layer. In one aspect, a semiconductor device includes a composite seed layer formed on a substrate, and a magnetic layer formed on the composite seed layer. The composite seed layer includes a first seed layer obliquely formed with an incident angle from a surface normal of the substrate along a first direction of the substrate, and a second seed layer obliquely formed with the incident angle on the first seed layer along a second direction of the substrate, opposite the first direction.
    Type: Grant
    Filed: November 11, 2011
    Date of Patent: December 16, 2014
    Assignee: International Business Machines Corporation
    Inventors: Francesco A. VetrĂ², Daniel C. Worledge
  • Patent number: 8871531
    Abstract: A thermally assisted magnetic memory cell device includes a substrate, a first electrode disposed on the substrate, a magnetic tunnel junction disposed on the first electrode, a second electrode disposed on the magnetic tunnel junction, a conductive hard mask disposed on the second electrode and a parallel shunt path coupled to the magnetic tunnel junction, thereby electrically coupling the first and second electrodes.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: October 28, 2014
    Assignee: International Business Machines Corporation
    Inventors: David W. Abraham, John K. De Brosse, Philip L. Trouilloud, Daniel C. Worledge
  • Patent number: 8866207
    Abstract: A magnetic tunnel junction (MTJ) includes a magnetic free layer, having a variable magnetization direction; an insulating tunnel barrier located adjacent to the free layer; a magnetic fixed layer having an invariable magnetization direction, the fixed layer disposed adjacent the tunnel barrier such that the tunnel barrier is located between the free layer and the fixed layer, wherein the free layer and the fixed layer have perpendicular magnetic anisotropy; and one or more of: a composite fixed layer, the composite fixed layer comprising a dusting layer, a spacer layer, and a reference layer; a synthetic antiferromagnetic (SAF) fixed layer structure, the SAF fixed layer structure comprising a SAF spacer located between the fixed layer and a second fixed magnetic layer; and a dipole layer, wherein the free layer is located between the dipole layer and the tunnel barrier.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: October 21, 2014
    Assignee: International Business Machines Corporation
    Inventors: Guohan Hu, Janusz J. Nowak, Philip L. Trouilloud, Daniel C. Worledge
  • Patent number: 8852762
    Abstract: A synthetic antiferromagnetic device includes a reference layer having a first and second ruthenium layer, a magnesium oxide spacer layer disposed on the reference layer, a cobalt iron boron layer disposed on the magnesium oxide spacer layer and a third ruthenium layer disposed on the cobalt iron boron layer, the third ruthenium layer having a thickness of approximately 0 angstroms to 18 angstroms.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: October 7, 2014
    Assignee: International Business Machines Corporation
    Inventors: David W. Abraham, Michael C. Gaidis, Janusz J. Nowak, Daniel C. Worledge
  • Patent number: 8852677
    Abstract: A method for fabricating a synthetic antiferromagnetic device, includes depositing a magnesium oxide spacer layer on a reference layer having a first and second ruthenium layer, depositing a cobalt iron boron layer on the magnesium oxide spacer layer; and depositing a third ruthenium layer on the cobalt iron boron layer, the third ruthenium layer having a thickness of approximately 0-18 angstroms.
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: October 7, 2014
    Assignee: International Business Machines Corporation
    Inventors: David W. Abraham, Michael C. Gaidis, Janusz J. Nowak, Daniel C. Worledge
  • Publication number: 20140273282
    Abstract: A thermally assisted magnetic memory cell device includes a substrate, a first electrode disposed on the substrate, a magnetic tunnel junction disposed on the first electrode, a second electrode disposed on the magnetic tunnel junction, a conductive hard mask disposed on the second electrode and a parallel shunt path coupled to the magnetic tunnel junction, thereby electrically coupling the first and second electrodes.
    Type: Application
    Filed: August 20, 2013
    Publication date: September 18, 2014
    Applicant: International Business Machines Corporation
    Inventors: David W. Abraham, John K. De Brosse, Philip L. Trouilloud, Daniel C. Worledge
  • Publication number: 20140264664
    Abstract: A thermally assisted magnetic memory cell device includes a substrate, a first electrode disposed on the substrate, a magnetic tunnel junction disposed on the first electrode, a second electrode disposed on the magnetic tunnel junction, a conductive hard mask disposed on the second electrode and a parallel shunt path coupled to the magnetic tunnel junction, thereby electrically coupling the first and second electrodes.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: International Business Machines Corporation
    Inventors: David W. Abraham, John K. De Brosse, Philip L. Trouilloud, Daniel C. Worledge
  • Patent number: 8835889
    Abstract: A thermally assisted magnetic memory cell device includes a substrate, a first electrode disposed on the substrate, a magnetic tunnel junction disposed on the first electrode, a second electrode disposed on the magnetic tunnel junction, a conductive hard mask disposed on the second electrode and a parallel shunt path coupled to the magnetic tunnel junction, thereby electrically coupling the first and second electrodes.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: September 16, 2014
    Assignee: International Business Machines Corporation
    Inventors: David W. Abraham, John K. De Brosse, Philip L. Trouilloud, Daniel C. Worledge