Patents by Inventor Daniel F. Moertl

Daniel F. Moertl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10942659
    Abstract: Techniques for persisting a logical address-to-virtual address table in a solid state storage device are presented. An example method includes receiving a request to write data to a logical block address (LBA) in a memory component of the solid state storage device. The data is written to a location identified by a virtual block address (VBA) in the solid state storage device. The VBA is stored in a rotating dump table in a reserved logical unit of the solid state storage device. A mapping between the LBA and the VBA is stored in a rotating journal table located in the reserved logical unit. The rotating journal table is buffered such that a number of journal entries are stored in a buffer until a threshold number of journal entries are committed to the rotating journal table. A pointer to a current address in the rotating journal is stored in the buffer.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: March 9, 2021
    Assignee: International Business Machines Corporation
    Inventors: Daniel F. Moertl, Andrew K. Martin, Damir A. Jamsek, Robert E. Galbraith, Rick A. Weckwerth
  • Publication number: 20200379915
    Abstract: Techniques for persisting a logical address-to-virtual address table in a solid state storage device are presented. An example method includes receiving a request to write data to a logical block address (LBA) in a memory component of the solid state storage device. The data is written to a location identified by a virtual block address (VBA) in the solid state storage device. The VBA is stored in a rotating dump table in a reserved logical unit of the solid state storage device. A mapping between the LBA and the VBA is stored in a rotating journal table located in the reserved logical unit. The rotating journal table is buffered such that a number of journal entries are stored in a buffer until a threshold number of journal entries are committed to the rotating journal table. A pointer to a current address in the rotating journal is stored in the buffer.
    Type: Application
    Filed: June 3, 2019
    Publication date: December 3, 2020
    Inventors: Daniel F. MOERTL, Andrew K. MARTIN, Damir A. JAMSEK, Robert E. GALBRAITH, Rick A. WECKWERTH
  • Patent number: 10467150
    Abstract: Disclosed are embodiments for supporting dynamic tier remapping of data stored in a hybrid storage system. One embodiment includes a storage controller and firmware, where the firmware maintains a plurality of mapping elements, where each mapping element includes a plurality of group identifiers, where each group identifier is configured to indicate a mapping of a logical block addresses, and where the storage controller performs: receiving a read command including a logical block address; parsing the logical block address to determine a mapping element and a group identifier; determining, for a particular mapping element of the plurality of elements, whether the particular mapping element is locked, wherein the particular mapping element corresponds to the mapping element of the logical block address; and dependent upon the particular mapping element, queuing the read command for firmware processing or remapping the logical block address.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: November 5, 2019
    Assignee: International Business Machines Corporation
    Inventors: Joseph R. Edwards, Robert Galbraith, Adrian C. Gerhard, Daniel F. Moertl, Gowrisankar Radhakrishnan, Rick A. Weckwerth
  • Patent number: 10437667
    Abstract: A method for operating a storage system RAID storage devices includes receiving a first data block to write to the storage system. The method further includes compressing the first data block to generate a second data block, the second data block including the first data block in compressed form and a data value indicating that the second data block is compressed. The method further includes storing the second data block in memory. The method additionally includes retrieving the second data block from memory and executing RAID operations to write the data block to the RAID storage devices, the set of operations including: generating, based on the second data block, redundant data for performing at least one of an error detection and an error correction operation on the second data block; writing the second data block to the RAID storage devices; writing the redundant data block to the RAID storage devices.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: October 8, 2019
    Assignee: International Business Machines Corporation
    Inventors: Adrian C. Gerhard, Daniel F. Moertl
  • Patent number: 10372368
    Abstract: Operating a RAID array with unequal stripes, the RAID array comprising N number of drives, where each RAID stripe includes P number of parity drives and N-P number of data drives, including buffering, by a RAID controller, write operations received from a host, each write operation specifying data to be written to the RAID array; distributing, by the RAID controller, the data to be written amongst N-P write groups, including: dividing the data into chunks of a sub-stripe size, wherein the sub-stripe size is less than a parity stripe size; and assigning the chunks, in round-robin order, to the N-P write groups; calculating parity from the N-P write groups; and writing the N-P write groups and the calculated parity as a first RAID stripe to the RAID array.
    Type: Grant
    Filed: October 13, 2016
    Date of Patent: August 6, 2019
    Assignee: International Business Machines Corporation
    Inventors: Robert Galbraith, Adrian C. Gerhard, Daniel F. Moertl
  • Patent number: 10282104
    Abstract: A storage subsystem records a copy of a data object on a plurality of storage devices. The storage subsystem receives a read request to read a data object. Under certain utilization conditions of the storage subsystem, a resource utilization condition satisfies a split-read criterion. In response to the resource utilization condition satisfying the split-read criterion, the storage subsystem reads at least a portion of the data object from each of the storage devices having a copy of the data object.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: May 7, 2019
    Assignee: International Business Machines Corporation
    Inventors: Clark A. Anderson, Adrian C. Gerhard, Daniel F. Moertl, Rick A. Weckwerth
  • Patent number: 10268589
    Abstract: Caching data in a redundant array of independent disks (RAID) storage system including receiving an operation instruction targeting a location in an attached memory of the RAID storage system, wherein the attached memory temporarily stores data for storage on RAID storage devices, and wherein the operation instruction is one selected from a group consisting of a read instruction and a write instruction; redirecting, based on a content of the operation instruction, the operation instruction from the attached memory to the embedded memory on the RAID storage system; and servicing the operation instruction by accessing a portion of the embedded memory corresponding to the location in the attached memory of the RAID storage system.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: April 23, 2019
    Assignee: International Business Machines Corporation
    Inventors: Robert Galbraith, Adrian C. Gerhard, Daniel F. Moertl
  • Patent number: 10261907
    Abstract: Caching data in a redundant array of independent disks (RAID) storage system including receiving an operation instruction targeting a location in an attached memory of the RAID storage system, wherein the attached memory temporarily stores data for storage on RAID storage devices, and wherein the operation instruction is one selected from a group consisting of a read instruction and a write instruction; redirecting, based on a content of the operation instruction, the operation instruction from the attached memory to the embedded memory on the RAID storage system; and servicing the operation instruction by accessing a portion of the embedded memory corresponding to the location in the attached memory of the RAID storage system.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: April 16, 2019
    Assignee: International Business Machines Corporation
    Inventors: Robert Galbraith, Adrian C. Gerhard, Daniel F. Moertl
  • Patent number: 10169605
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization model processing in Coherent Accelerator Processor Interface (CAPI) adapters. The CAPI adapter includes an authorization table and a file system authorization function to authenticate data access for a client at an extent granularity and to prevent an application from accessing unauthorized data in the CAPI adapter. Each authorization table entry provides for the CAPI client, a CAPI client identification (ID), a CAPI server register space assigning resource ownership to the CAPI client with a CAPI set of allowed functions.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: January 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Patent number: 10169140
    Abstract: A mechanism is provided for loading a phase-locked loop (PLL) configuration into a PLL module using Flash memory. A Flash data image configuration from the Flash memory is loaded into a set of holding registers in response to the PLL module locking a current PLL configuration from a set of current configuration registers. The Flash data image configuration in the set of holding registers is compared to the current PLL configuration in the set of current configuration registers in response to the Flash data image configuration failing to be corrupted. The Flash data image configuration onto a PLL module input in response to the Flash data image configuration differing from the current PLL configuration. The Flash data image configuration is loaded in the set of holding registers into the set of current configuration registers in response to the PLL module locking the Flash data image configuration.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: January 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Gerald M. Grabowski, Daniel F. Moertl, Michael J. Palmer, Kelvin Wong
  • Publication number: 20180267902
    Abstract: Disclosed are embodiments for supporting dynamic tier remapping of data stored in a hybrid storage system. One embodiment includes a storage controller and firmware, where the firmware maintains a plurality of mapping elements, where each mapping element includes a plurality of group identifiers, where each group identifier is configured to indicate a mapping of a logical block addresses, and where the storage controller performs: receiving a read command including a logical block address; parsing the logical block address to determine a mapping element and a group identifier; determining, for a particular mapping element of the plurality of elements, whether the particular mapping element is locked, wherein the particular mapping element corresponds to the mapping element of the logical block address; and dependent upon the particular mapping element, queuing the read command for firmware processing or remapping the logical block address.
    Type: Application
    Filed: May 16, 2018
    Publication date: September 20, 2018
    Inventors: JOSEPH R. EDWARDS, ROBERT GALBRAITH, ADRIAN C. GERHARD, DANIEL F. MOERTL, GOWRISANKAR RADHAKRISHNAN, RICK A. WECKWERTH
  • Patent number: 10078595
    Abstract: A method and controller for implementing storage adapter enhanced write cache management, and a design structure on which the subject controller circuit resides are provided. The controller includes a hardware write cache engine implementing hardware acceleration for storage write cache management. The hardware write cache engine monitors cache levels used for managing cache destage rates and thresholds for destages from storage write cache substantially without using firmware for greatly enhancing performance.
    Type: Grant
    Filed: November 26, 2017
    Date of Patent: September 18, 2018
    Assignee: International Business Machines Corporation
    Inventors: Brian E. Bakke, Joseph R. Edwards, Robert E. Galbraith, Adrian C. Gerhard, Daniel F. Moertl, Gowrisankar Radhakrishnan, Rick A. Weckwerth
  • Publication number: 20180260328
    Abstract: Caching data in a redundant array of independent disks (RAID) storage system including receiving an operation instruction targeting a location in an attached memory of the RAID storage system, wherein the attached memory temporarily stores data for storage on RAID storage devices, and wherein the operation instruction is one selected from a group consisting of a read instruction and a write instruction; redirecting, based on a content of the operation instruction, the operation instruction from the attached memory to the embedded memory on the RAID storage system; and servicing the operation instruction by accessing a portion of the embedded memory corresponding to the location in the attached memory of the RAID storage system.
    Type: Application
    Filed: March 9, 2017
    Publication date: September 13, 2018
    Inventors: ROBERT GALBRAITH, ADRIAN C. GERHARD, DANIEL F. MOERTL
  • Publication number: 20180260329
    Abstract: Caching data in a redundant array of independent disks (RAID) storage system including receiving an operation instruction targeting a location in an attached memory of the RAID storage system, wherein the attached memory temporarily stores data for storage on RAID storage devices, and wherein the operation instruction is one selected from a group consisting of a read instruction and a write instruction; redirecting, based on a content of the operation instruction, the operation instruction from the attached memory to the embedded memory on the RAID storage system; and servicing the operation instruction by accessing a portion of the embedded memory corresponding to the location in the attached memory of the RAID storage system.
    Type: Application
    Filed: November 20, 2017
    Publication date: September 13, 2018
    Inventors: ROBERT GALBRAITH, ADRIAN C. GERHARD, DANIEL F. MOERTL
  • Patent number: 10067880
    Abstract: Disclosed are embodiments for supporting dynamic tier remapping of data stored in a hybrid storage system. One embodiment includes a storage controller and firmware, where the firmware maintains a plurality of mapping elements, where each mapping element includes a plurality of group identifiers, where each group identifier is configured to indicate a mapping of a logical block addresses, and where the storage controller performs: receiving a read command including a logical block address; parsing the logical block address to determine a mapping element and a group identifier; determining, for a particular mapping element of the plurality of elements, whether the particular mapping element is locked, wherein the particular mapping element corresponds to the mapping element of the logical block address; and dependent upon the particular mapping element, queuing the read command for firmware processing or remapping the logical block address.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: September 4, 2018
    Assignee: International Business Machines Corporation
    Inventors: Joseph R. Edwards, Robert Galbraith, Adrian C. Gerhard, Daniel F. Moertl, Gowrisankar Radhakrishnan, Rick A. Weckwerth
  • Patent number: 10055573
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization and deauthorization processing for a Coherent Accelerator Processor Interface (CAPI) adapter. The Application Client, such as an Application Child Client sends a Delete Authorizations command to the CAPI Adapter via the Client CAPI Server Registers assigned to the specific Application Client. The CAPI Adapter deletes the Authorizations in all Lists in the Delete Authorizations command.
    Type: Grant
    Filed: November 11, 2017
    Date of Patent: August 21, 2018
    Assignee: International Business Machines Corporation
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Patent number: 10055606
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization model processing in Coherent Accelerator Processor Interface (CAPI) adapters. The CAPI adapter includes an authorization table and a file system authorization function to authenticate data access for a client at an extent granularity and to prevent an application from accessing unauthorized data in the CAPI adapter. Each authorization table entry provides for the CAPI client, a CAPI client identification (ID), a CAPI server register space assigning resource ownership to the CAPI client with a CAPI set of allowed functions.
    Type: Grant
    Filed: June 25, 2017
    Date of Patent: August 21, 2018
    Assignee: International Business Machines Corporation
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Patent number: 10055574
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization processing for a Coherent Accelerator Processor Interface (CAPI) adapter. An Application Client requests authorization to a File from a system processor file system. The file system validates the request, determines the location of each Extent that comprises the File, and requests authorization to each Extent from a System CAPI Authorization manager. The System CAPI Authorization manager requests the CAPI Client manager to assign a Child Client ID and CAPI Server Register range to the requesting Application Client and requests a previously authorized CAPI Parent Client to authorize the Child ID to the list of Extents. The CAPI Parent Client sends a Create Authorizations command to the CAPI Adapter via the Parent's CAPI Server Registers.
    Type: Grant
    Filed: November 11, 2017
    Date of Patent: August 21, 2018
    Assignee: International Business Machines Corporation
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Patent number: 10055156
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization command flow processing for a Coherent Accelerator Processor Interface (CAPI) adapter. An Application Client builds a command including start LBA and number of LBAs and Child Authorization Handle. The Application Client sends the command directly to the CAPI Adapter via the Application Clients CAPI Server Registers assigned to the specific Application Client. The CAPI adapter validate that the requesting Client is authorized to perform the command using the Authorization Handle and the receiving CAPI Server Register address. The CAPI Adapter executes the validated command and sends completion back to the Application Client.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: August 21, 2018
    Assignee: International Business Machines Corporation
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Patent number: 10043028
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization processing for a Coherent Accelerator Processor Interface (CAPI) adapter. An Application Client requests authorization to a File from a system processor file system. The file system validates the request, determines the location of each Extent that comprises the File, and requests authorization to each Extent from a System CAPI Authorization manager. The System CAPI Authorization manager requests the CAPI Client manager to assign a Child Client ID and CAPI Server Register range to the requesting Application Client and requests a previously authorized CAPI Parent Client to authorize the Child ID to the list of Extents. The CAPI Parent Client sends a Create Authorizations command to the CAPI Adapter via the Parent's CAPI Server Registers.
    Type: Grant
    Filed: November 11, 2017
    Date of Patent: August 7, 2018
    Assignee: International Business Machines Corporation
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl