Patents by Inventor Daniel F. Moertl

Daniel F. Moertl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170132154
    Abstract: A method and controller for implementing storage adapter enhanced write cache management, and a design structure on which the subject controller circuit resides are provided. The controller includes a hardware write cache engine implementing hardware acceleration for storage write cache management.
    Type: Application
    Filed: November 12, 2015
    Publication date: May 11, 2017
    Inventors: Brian E. Bakke, Joseph R. Edwards, Robert E. Galbraith, Adrian C. Gerhard, Daniel F. Moertl, Gowrisankar Radhakrishnan, Rick A. Weckwerth
  • Publication number: 20170132151
    Abstract: A method and controller for implementing storage adapter enhanced write cache management, and a design structure on which the subject controller circuit resides are provided. The controller includes a hardware write cache engine implementing hardware acceleration for storage write cache management. The hardware write cache engine performs destage operations from storage write cache with minimal firmware involvement to enhance performance.
    Type: Application
    Filed: November 12, 2015
    Publication date: May 11, 2017
    Inventors: Brian E. Bakke, Joseph R. Edwards, Robert E. Galbraith, Adrian C. Gerhard, Daniel F. Moertl, Gowrisankar Radhakrishnan, Rick A. Weckwerth
  • Patent number: 9600642
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization processing for a Coherent Accelerator Processor Interface (CAPI) adapter. An Application Client requests authorization to a File from a system processor file system. The file system validates the request, determines the location of each Extent that comprises the File, and requests authorization to each Extent from a System CAPI Authorization manager. The System CAPI Authorization manager requests the CAPI Client manager to assign a Child Client ID and CAPI Server Register range to the requesting Application Client and requests a previously authorized CAPI Parent Client to authorize the Child ID to the list of Extents. The CAPI Parent Client sends a Create Authorizations command to the CAPI Adapter via the Parent's CAPI Server Registers.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: March 21, 2017
    Assignee: International Business Machines Corporation
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Patent number: 9600428
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization command flow processing for a Coherent Accelerator Processor Interface (CAPI) adapter. An Application Client builds a command including start LBA and number of LBAs and Child Authorization Handle. The Application Client sends the command directly to the CAPI Adapter via the Application Clients CAPI Server Registers assigned to the specific Application Client. The CAPI adapter validate that the requesting Client is authorized to perform the command using the Authorization Handle and the receiving CAPI Server Register address. The CAPI Adapter executes the validated command and sends completion back to the Application Client.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: March 21, 2017
    Assignee: International Business Machines Corporation
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Patent number: 9600654
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization and deauthorization processing for a Coherent Accelerator Processor Interface (CAPI) adapter. The Application Client, such as an Application Child Client sends a Delete Authorizations command to the CAPI Adapter via the Client CAPI Server Registers assigned to the specific Application Client. The CAPI Adapter deletes the Authorizations in all Lists in the Delete Authorizations command.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: March 21, 2017
    Assignee: International Business Machines Corporation
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Patent number: 9594710
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization command flow processing for a Coherent Accelerator Processor Interface (CAPI) adapter. An Application Client builds a command including start LBA and number of LBAs and Child Authorization Handle. The Application Client sends the command directly to the CAPI Adapter via the Application Clients CAPI Server Registers assigned to the specific Application Client. The CAPI adapter validate that the requesting Client is authorized to perform the command using the Authorization Handle and the receiving CAPI Server Register address. The CAPI Adapter executes the validated command and sends completion back to the Application Client.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: March 14, 2017
    Assignee: International Business Machines Corporation
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Patent number: 9582426
    Abstract: A computing element, system, and method for implementing control structures for a compressed cache in hardware. Embodiments provide a first engine configured to allocate and deallocate virtual memory pages and physical memory pages from pools of available pages to store received data to the compressed cache, a second engine configured to compress received data and store the compressed data. Embodiments also provide for embedding data within the virtual and physical memory pages to indicate page size, type, and data compression.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: February 28, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert Galbraith, Adrian C. Gerhard, Daniel F. Moertl
  • Patent number: 9582659
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization and deauthorization processing for a Coherent Accelerator Processor Interface (CAPI) adapter. The Application Client, such as an Application Child Client sends a Delete Authorizations command to the CAPI Adapter via the Client CAPI Server Registers assigned to the specific Application Client. The CAPI Adapter deletes the Authorizations in all Lists in the Delete Authorizations command.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: February 28, 2017
    Assignee: International Business Machines Corporation
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Patent number: 9582651
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization processing for a Coherent Accelerator Processor Interface (CAPI) adapter. An Application Client requests authorization to a File from a system processor file system. The file system validates the request, determines the location of each Extent that comprises the File, and requests authorization to each Extent from a System CAPI Authorization manager. The System CAPI Authorization manager requests the CAPI Client manager to assign a Child Client ID and CAPI Server Register range to the requesting Application Client and requests a previously authorized CAPI Parent Client to authorize the Child ID to the list of Extents. The CAPI Parent Client sends a Create Authorizations command to the CAPI Adapter via the Parent's CAPI Server Registers.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: February 28, 2017
    Assignee: International Business Machines Corporation
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Publication number: 20170031759
    Abstract: Embodiments described herein include a PSL engine that includes various memory elements that permit the engine to grant locks on particular portions of data in a stripe in a RAID storage system. The PSL engine can assign (or lock) different blocks of the stripe for different operations. The PSL engine can grant locks to multiple operations for the same stripe if the operations access mutually exclusive blocks of the stripe. Each time a new operation is requested, the PSL engine determines whether the operation would affect a stripe data block that is currently assigned to another operation. If the new operation corresponds to a block of data in the stripe that includes data locked by another operation, the PSL engine assigns the new operation to a wait list. In one embodiment, the PSL engine maintains a wait list for each of the stripes in the RAID system.
    Type: Application
    Filed: August 24, 2015
    Publication date: February 2, 2017
    Inventors: Robert GALBRAITH, Adrian C. GERHARD, Daniel F. MOERTL
  • Publication number: 20170031758
    Abstract: Embodiments described herein include a PSL engine that includes various memory elements that permit the engine to grant locks on particular portions of data in a stripe in a RAID storage system. The PSL engine can assign (or lock) different blocks of the stripe for different operations. The PSL engine can grant locks to multiple operations for the same stripe if the operations access mutually exclusive blocks of the stripe. Each time a new operation is requested, the PSL engine determines whether the operation would affect a stripe data block that is currently assigned to another operation. If the new operation corresponds to a block of data in the stripe that includes data locked by another operation, the PSL engine assigns the new operation to a wait list. In one embodiment, the PSL engine maintains a wait list for each of the stripes in the RAID system.
    Type: Application
    Filed: August 24, 2015
    Publication date: February 2, 2017
    Inventors: Robert GALBRAITH, Adrian C. GERHARD, Daniel F. MOERTL
  • Publication number: 20170031757
    Abstract: Embodiments described herein include a PSL engine that includes various memory elements that permit the engine to grant locks on particular portions of data in a stripe in a RAID storage system. The PSL engine can assign (or lock) different blocks of the stripe for different operations. The PSL engine can grant locks to multiple operations for the same stripe if the operations access mutually exclusive blocks of the stripe. Each time a new operation is requested, the PSL engine determines whether the operation would affect a stripe data block that is currently assigned to another operation. If the new operation corresponds to a block of data in the stripe that includes data locked by another operation, the PSL engine assigns the new operation to a wait list. In one embodiment, the PSL engine maintains a wait list for each of the stripes in the RAID system.
    Type: Application
    Filed: July 30, 2015
    Publication date: February 2, 2017
    Inventors: Robert GALBRAITH, Adrian C. GERHARD, Daniel F. MOERTL
  • Publication number: 20170031596
    Abstract: Embodiments described herein include a PSL engine that includes various memory elements that permit the engine to grant locks on particular portions of data in a stripe in a RAID storage system. The PSL engine can assign (or lock) different blocks of the stripe for different operations. The PSL engine can grant locks to multiple operations for the same stripe if the operations access mutually exclusive blocks of the stripe. Each time a new operation is requested, the PSL engine determines whether the operation would affect a stripe data block that is currently assigned to another operation. If the new operation corresponds to a block of data in the stripe that includes data locked by another operation, the PSL engine assigns the new operation to a wait list. In one embodiment, the PSL engine maintains a wait list for each of the stripes in the RAID system.
    Type: Application
    Filed: July 30, 2015
    Publication date: February 2, 2017
    Inventors: Robert GALBRAITH, Adrian C. GERHARD, Daniel F. MOERTL
  • Publication number: 20160149909
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization model processing in Coherent Accelerator Processor Interface (CAPI) adapters. The CAPI adapter includes an authorization table and a file system authorization function to authenticate data access for a client at an extent granularity and to prevent an application from accessing unauthorized data in the CAPI adapter. Each authorization table entry provides for the CAPI client, a CAPI client identification (ID), a CAPI server register space assigning resource ownership to the CAPI client with a CAPI set of allowed functions.
    Type: Application
    Filed: November 20, 2014
    Publication date: May 26, 2016
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Publication number: 20160148008
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization command flow processing for a Coherent Accelerator Processor Interface (CAPI) adapter. An Application Client builds a command including start LBA and number of LBAs and Child Authorization Handle. The Application Client sends the command directly to the CAPI Adapter via the Application Clients CAPI Server Registers assigned to the specific Application Client. The CAPI adapter validate that the requesting Client is authorized to perform the command using the Authorization Handle and the receiving CAPI Server Register address. The CAPI Adapter executes the validated command and sends completion back to the Application Client.
    Type: Application
    Filed: February 23, 2015
    Publication date: May 26, 2016
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Publication number: 20160148010
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization processing for a Coherent Accelerator Processor Interface (CAPI) adapter. An Application Client requests authorization to a File from a system processor file system. The file system validates the request, determines the location of each Extent that comprises the File, and requests authorization to each Extent from a System CAPI Authorization manager. The System CAPI Authorization manager requests the CAPI Client manager to assign a Child Client ID and CAPI Server Register range to the requesting Application Client and requests a previously authorized CAPI Parent Client to authorize the Child ID to the list of Extents. The CAPI Parent Client sends a Create Authorizations command to the CAPI Adapter via the Parent's CAPI Server Registers.
    Type: Application
    Filed: November 20, 2014
    Publication date: May 26, 2016
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Publication number: 20160148004
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization command flow processing for a Coherent Accelerator Processor Interface (CAPI) adapter. An Application Client builds a command including start LBA and number of LBAs and Child Authorization Handle. The Application Client sends the command directly to the CAPI Adapter via the Application Clients CAPI Server Registers assigned to the specific Application Client. The CAPI adapter validate that the requesting Client is authorized to perform the command using the Authorization Handle and the receiving CAPI Server Register address. The CAPI Adapter executes the validated command and sends completion back to the Application Client.
    Type: Application
    Filed: November 20, 2014
    Publication date: May 26, 2016
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Publication number: 20160148007
    Abstract: A method, system and computer program product are provided for implementing and processing a block extent granularity authorization mechanism for a Coherent Accelerator Processor Interface (CAPI) adapter. The CAPI adapter generates an authorization table with multiple authorization entries, each authorization entry including an Authorization Handle with CAPI server registers identification (ID) including a start Logical Block Address of the extent and range of Logical Block Addresses for each extent. When a command is received an authentication process uses the Authorization Handle contained in the received command and an Authorization Entry in the Authorization Table indexed by the Authorization Handle to authenticate the received command to prevent unauthorized data access.
    Type: Application
    Filed: February 23, 2015
    Publication date: May 26, 2016
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Publication number: 20160147985
    Abstract: A method, system and computer program product are provided for implementing block extent granularity authorization processing for a Coherent Accelerator Processor Interface (CAPI) adapter. An Application Client requests authorization to a File from a system processor file system. The file system validates the request, determines the location of each Extent that comprises the File, and requests authorization to each Extent from a System CAPI Authorization manager. The System CAPI Authorization manager requests the CAPI Client manager to assign a Child Client ID and CAPI Server Register range to the requesting Application Client and requests a previously authorized CAPI Parent Client to authorize the Child ID to the list of Extents. The CAPI Parent Client sends a Create Authorizations command to the CAPI Adapter via the Parent's CAPI Server Registers.
    Type: Application
    Filed: February 23, 2015
    Publication date: May 26, 2016
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl
  • Publication number: 20160148005
    Abstract: A method, system and computer program product are provided for implementing and processing a block extent granularity authorization mechanism for a Coherent Accelerator Processor Interface (CAPI) adapter. The CAPI adapter generates an authorization table with multiple authorization entries, each authorization entry including an Authorization Handle with CAPI server registers identification (ID) including a start Logical Block Address of the extent and range of Logical Block Addresses for each extent. When a command is received an authentication process uses the Authorization Handle contained in the received command and an Authorization Entry in the Authorization Table indexed by the Authorization Handle to authenticate the received command to prevent unauthorized data access.
    Type: Application
    Filed: November 20, 2014
    Publication date: May 26, 2016
    Inventors: Brian E. Bakke, Adrian C. Gerhard, Daniel F. Moertl