Patents by Inventor Daniel J. Allen
Daniel J. Allen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240102811Abstract: A first input to a mobile device indicates a first navigation destination at a first level of specificity. The mobile device initiates navigation towards a first location corresponding to the first navigation destination. While navigation towards the first location corresponding to the first navigation destination is ongoing and before reaching the first location, in accordance with a determination that one or more first criteria are satisfied, the mobile device prompts for an input for determination a second location corresponding to a second navigation destination with a second level of specificity, the second level of specificity more specific than the first level of specificity. The mobile device receives a second input in response to the prompt. In accordance with a determination that the second input satisfies one or more second criteria, the mobile device initiates navigation towards the second location corresponding to the second navigation destination.Type: ApplicationFiled: September 1, 2023Publication date: March 28, 2024Inventors: Kevin M. LYNCH, Matthew J. ALLEN, David A. KRIMSLEY, Christopher P. FOSS, Daniel DE ROCHA ROSARIO, Andrew S. KIM, Arian BEHZADI, Stephen B. LYNCH
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Publication number: 20240093221Abstract: This disclosure provides recombinant DNA constructs and transgenic plants having enhanced traits such as increased yield, increased nitrogen use efficiency, and enhanced drought tolerance or water use efficiency. Transgenic plants may include field crops as well as plant propagules and progeny of such transgenic plants. Methods of making and using such transgenic plants are also provided. This disclosure also provides methods of producing seed from such transgenic plants, growing such seed, and selecting progeny plants with enhanced traits. Also disclosed are transgenic plants with altered phenotypes which are useful for screening and selecting transgenic events for the desired enhanced trait.Type: ApplicationFiled: December 1, 2023Publication date: March 21, 2024Inventors: Edwards M. Allen, Bettina Darveaux, Stephen M. Duff, Mary Fernandes, Barry S. Goldman, Cara L. Griffith, Balasulojini Karunanandaa, Saritha V. Kuriakose, Paul J. Loida, Linda L. Lutfiyya, Robert J. Meister, Monnanda S. Rajani, Dhanalakshmi Ramachandra, Elena A. Rice, Daniel Ruzicka, Anagha M. Sant, Jon J. Schmuke, Rebecca L. Thompson, Srikanth Babu Venkatachalayya, Tyamagondlu V. Venkatesh, Huai Wang, Xiao Yang, Qin Zeng, Jianmin Zhao
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Patent number: 10566989Abstract: A system may comprise a high-pass filter having an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a switched-capacitor resistor coupled between the output and a reference voltage, and control circuitry configured to control the reference voltage to cancel current leakage into a circuit coupled to the output. The input, the output, the capacitor, and the switched-capacitor resistor may be arranged to generate the output signal as a high-pass filtered version of the input signal and the high-pass filter may be configured to operate in a plurality of modes comprising at least a high-impedance mode and a low-impedance mode in which the resistance of the switched-capacitor resistor is significantly smaller than the resistance when in the high-impedance mode.Type: GrantFiled: October 23, 2018Date of Patent: February 18, 2020Assignee: Cirrus Logic, Inc.Inventors: Ramin Zanbaghi, Daniel J. Allen, John L. Melanson, Aniruddha Satoskar, Akshay Godbole
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Patent number: 10545561Abstract: A system may include a plurality of processing paths and a controller. The processing paths may include a first processing path configured to generate a first digital signal based on an analog input signal and one or more other processing paths each configured to consume a smaller amount of power than the first processing path, and each configured to generate a respective digital signal based on the analog input signal, wherein one of the other processing paths has a noise floor based on fidelity characteristics of the analog input signal or subsequent processing requirements of a digital output signal generated from at least one of the first digital signal and the respective digital signals. The controller may be configured to select one of the first digital signal and the respective digital signals as the digital output signal of the processing system based on a magnitude of the analog input signal.Type: GrantFiled: August 10, 2016Date of Patent: January 28, 2020Assignee: Cirrus Logic, Inc.Inventors: Edmund Mark Schneider, Daniel J. Allen, Saurabh Singh, Aniruddha Satoskar
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Patent number: 10541701Abstract: An analog conditioning circuit and a corresponding method for processing an analog input signal provide a conditioned analog signal for input into an analog processing circuit. The analog conditioning circuit comprises a main signal path between an input for receiving the analog input signal and an output for outputting the conditioned analog signal, wherein the transfer function of the main signal path is constrained by a transfer function requirement associated with the analog processing circuit; and a feedforward signal path comprising a first filtering block configured to attenuate desired frequencies of a first signal derived from the analog input signal to provide a filtered analog signal; wherein the feedforward signal path is configured to input the filtered analog signal into the main signal path such that the filtered analog signal is subtracted from a second signal derived from the analog input signal to provide the conditioned analog signal.Type: GrantFiled: September 7, 2018Date of Patent: January 21, 2020Assignee: Cirrus Logic, Inc.Inventors: Saurabh Singh, Edmund Mark Schneider, Eric Kimball, Daniel J. Allen
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Patent number: 10284217Abstract: In accordance with embodiments of the present disclosure, a processing system may include multiple selectable processing paths for processing an analog signal in order to reduce noise and increase dynamic range. Techniques are employed to transition between processing paths and calibrate operational parameters of the two paths in order to reduce or eliminate artifacts caused by switching between processing paths.Type: GrantFiled: January 29, 2018Date of Patent: May 7, 2019Assignee: Cirrus Logic, Inc.Inventors: Edmund Mark Schneider, Daniel J. Allen, Aniruddha Satoskar, Seyedeh Maryam Mortazavi Zanjani, Brian P. Chesney, John C. Tucker, Christophe J. Amadi
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Patent number: 10263630Abstract: In accordance with embodiments of the present disclosure, a processing system may include a plurality of processing paths and a controller. The plurality of processing paths may include a static processing path configured to generate a first digital signal based on an analog input signal and a dynamic processing path configured to generate a second digital signal based on the analog input signal, wherein a parameter of the dynamic processing path is determined based on a characteristic of the analog input signal. The controller may be configured to select the first digital signal as a digital output signal of the processing system when a change is occurring to the characteristic and select the second digital signal as the digital output signal in the absence of change occurring to the characteristic.Type: GrantFiled: August 11, 2016Date of Patent: April 16, 2019Assignee: Cirrus Logic, Inc.Inventors: Edmund Mark Schneider, Daniel J. Allen, Saurabh Singh, Aniruddha Satoskar
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Publication number: 20190058484Abstract: A system may comprise a high-pass filter having an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a switched-capacitor resistor coupled between the output and a reference voltage, and control circuitry configured to control the reference voltage to cancel current leakage into a circuit coupled to the output. The input, the output, the capacitor, and the switched-capacitor resistor may be arranged to generate the output signal as a high-pass filtered version of the input signal and the high-pass filter may be configured to operate in a plurality of modes comprising at least a high-impedance mode and a low-impedance mode in which the resistance of the switched-capacitor resistor is significantly smaller than the resistance when in the high-impedance mode.Type: ApplicationFiled: October 23, 2018Publication date: February 21, 2019Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Ramin ZANBAGHI, Daniel J. ALLEN, John L. MELANSON, Aniruddha SATOSKAR, Akshay GODBOLE
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Patent number: 10141946Abstract: A system may include an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a variable resistor coupled to the output and having a plurality of modes including a first mode in which the variable resistor has a first resistance and a second mode in which the variable resistor has a second resistance, and control circuitry configured to determine a difference between the input signal and the output signal and switch between modes of the plurality of modes when the difference is less than a predetermined threshold.Type: GrantFiled: August 18, 2017Date of Patent: November 27, 2018Assignee: Cirrus Logic, Inc.Inventors: Ramin Zanbaghi, Daniel J. Allen, John L. Melanson, Aniruddha Satoskar, Akshay Godbole
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Patent number: 10069483Abstract: A system may comprise a high-pass filter having an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a switched-capacitor resistor coupled between the output and a reference voltage, and control circuitry configured to control the reference voltage to cancel current leakage into a circuit coupled to the output. The input, the output, the capacitor, and the switched-capacitor resistor may be arranged to generate the output signal as a high-pass filtered version of the input signal and the high-pass filter may be configured to operate in a plurality of modes comprising at least a high-impedance mode and a low-impedance mode in which the resistance of the switched-capacitor resistor is significantly smaller than the resistance when in the high-impedance mode.Type: GrantFiled: August 18, 2017Date of Patent: September 4, 2018Assignee: Cirrus Logic, Inc.Inventors: Ramin Zanbaghi, Siladitya Dey, Daniel J. Allen, John L. Melanson, Aniruddha Satoskar
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Patent number: 10009039Abstract: A system may comprise a high-pass filter having an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a switched-capacitor resistor coupled between the output and a reference voltage, and control circuitry configured to control the reference voltage to cancel current leakage into a circuit coupled to the output. The input, the output, the capacitor, and the switched-capacitor resistor may be arranged to generate the output signal as a high-pass filtered version of the input signal and the high-pass filter may be configured to operate in a plurality of modes comprising at least a high-impedance mode and a low-impedance mode in which the resistance of the switched-capacitor resistor is significantly smaller than the resistance when in the high-impedance mode.Type: GrantFiled: August 18, 2017Date of Patent: June 26, 2018Assignee: Cirrus Logic, Inc.Inventors: Ramin Zanbaghi, Daniel J. Allen, John L. Melanson, Aniruddha Satoskar
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Patent number: 9959856Abstract: In accordance with embodiments of the present disclosure, a processing system may include multiple selectable processing paths for processing an analog signal in order to reduce noise, increase dynamic range, and mask audio artifacts associated with a change in noise floor. Techniques are employed to transition between processing paths and calibrate operational parameters of the two paths in order to reduce or eliminate artifacts caused by switching between processing paths.Type: GrantFiled: June 15, 2015Date of Patent: May 1, 2018Assignee: Cirrus Logic, Inc.Inventors: Aniruddha Satoskar, Daniel J. Allen, Edmund Mark Schneider
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Publication number: 20180046239Abstract: A system may include a plurality of processing paths and a controller. The processing paths may include a first processing path configured to generate a first digital signal based on an analog input signal and one or more other processing paths each configured to consume a smaller amount of power than the first processing path, and each configured to generate a respective digital signal based on the analog input signal, wherein one of the other processing paths has a noise floor based on fidelity characteristics of the analog input signal or subsequent processing requirements of a digital output signal generated from at least one of the first digital signal and the respective digital signals. The controller may be configured to select one of the first digital signal and the respective digital signals as the digital output signal of the processing system based on a magnitude of the analog input signal.Type: ApplicationFiled: August 10, 2016Publication date: February 15, 2018Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Edmund Mark SCHNEIDER, Daniel J. ALLEN, Saurabh SINGH, Aniruddha SATOSKAR
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Publication number: 20180048325Abstract: In accordance with embodiments of the present disclosure, a processing system may include a plurality of processing paths and a controller. The plurality of processing paths may include a static processing path configured to generate a first digital signal based on an analog input signal and a dynamic processing path configured to generate a second digital signal based on the analog input signal, wherein a parameter of the dynamic processing path is determined based on a characteristic of the analog input signal. The controller may be configured to select the first digital signal as a digital output signal of the processing system when a change is occurring to the characteristic and select the second digital signal as the digital output signal in the absence of change occurring to the characteristic.Type: ApplicationFiled: August 11, 2016Publication date: February 15, 2018Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Edmund Mark SCHNEIDER, Daniel J. ALLEN, Saurabh SINGH, Aniruddha SATOSKAR
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Patent number: 9880802Abstract: A processing path may include a controller and a plurality of processing paths including a first processing path and a second processing path. The first path may be configured to generate a first digital signal based on an analog input signal and the second path may be configured to generate a second digital signal based on the analog input signal, wherein the first path has a lower gain and a higher noise floor than the second path. The controller may be configured to determine that a transition between the first path and the second path needs to occur based on the analog input signal crossing a threshold or a prediction that the input signal will cross the threshold and in response to determining the transition between the first path and the second path needs to occur, blend the transition during or near zero cross points of the analog input signal.Type: GrantFiled: January 21, 2016Date of Patent: January 30, 2018Assignee: Cirrus Logic, Inc.Inventors: Aniruddha Satoskar, Daniel J. Allen, Edmund Mark Schneider, Tejasvi Das, Ku He, John L. Melanson
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Patent number: 9780800Abstract: A method may include processing an analog input signal with a first processing path configured to generate a first digital signal based on the analog input signal; processing the analog input signal with a second processing path configured to generate a second digital signal based on the analog input signal, and adapting a response of an adaptive filter configured to generate a filtered digital signal from the second digital signal to reduce a difference between the filtered digital signal and the first digital signal. The method may additionally or alternatively include determining nonlinearities present in the second processing path based on comparison of the first digital signal and the second digital signal, and applying a linear correction to the second digital signal to generate a corrected second digital signal with decreased nonlinearity from that of the second digital signal.Type: GrantFiled: September 19, 2016Date of Patent: October 3, 2017Assignee: Cirrus Logic, Inc.Inventors: Aniruddha Satoskar, Daniel J. Allen, Edmund Mark Schneider, Saurabh Singh, John L. Melanson
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Patent number: 9774342Abstract: In accordance with embodiments of the present disclosure, a processing system may include multiple selectable processing paths for processing an analog signal in order to reduce noise and increase dynamic range. Techniques are employed to transition between processing paths and calibrate operational parameters of the two paths in order to reduce or eliminate artifacts caused by switching between processing paths.Type: GrantFiled: January 14, 2015Date of Patent: September 26, 2017Assignee: Cirrus Logic, Inc.Inventors: Edmund Mark Schneider, Aniruddha Satoskar, Daniel J. Allen, Seyedeh Maryam Mortazavi Zanjani
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Patent number: 9762257Abstract: An analog-to-digital converter (ADC) may include capability to sense and/or compensate for undesired effects when receiving input from a microphone. For example, a sense node may be provided between differential inputs, and that sense node separated from the differential inputs by two or more switches. The sense node may allow for a measurement of an average voltage of the differential inputs. The average voltage may be obtained activating the switches to sample the sampling capacitors coupled to the differential inputs. That average voltage may be used as common mode (CM) data. A controller may receive the CM data, along with differential mode (DM) data, and use the CM and DM data to determine undesired effects, such as DC or AC mismatch at the microphone interface. The controller may then generate a signal for applying compensation to the differential inputs to reduce or eliminate the undesired effects.Type: GrantFiled: August 12, 2016Date of Patent: September 12, 2017Assignee: Cirrus Logic, Inc.Inventors: Ramin Zanbaghi, Aaron Brennan, Daniel J. Allen, John L. Melanson
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Patent number: 9762255Abstract: A method may include processing an analog input signal to generate a first digital signal in accordance with a first analog gain, processing the analog input signal to generate a second digital signal in accordance with a second analog gain, and generating a digital output signal of the processing system from one or both of the first digital signal and the second digital signal based on a magnitude of the analog input signal and setting the first analog gain based on the magnitude of the analog input when the digital output signal is generated from the second digital signal.Type: GrantFiled: September 19, 2016Date of Patent: September 12, 2017Assignee: Cirrus Logic, Inc.Inventors: Aniruddha Satoskar, Daniel J. Allen, Edmund Mark Schneider, Saurabh Singh
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Publication number: 20170212721Abstract: A processing path may include a controller and a plurality of processing paths including a first processing path and a second processing path. The first path may be configured to generate a first digital signal based on an analog input signal and the second path may be configured to generate a second digital signal based on the analog input signal, wherein the first path has a lower gain and a higher noise floor than the second path. The controller may be configured to determine that a transition between the first path and the second path needs to occur based on the analog input signal crossing a threshold or a prediction that the input signal will cross the threshold and in response to determining the transition between the first path and the second path needs to occur, blend the transition during or near zero cross points of the analog input signal.Type: ApplicationFiled: January 21, 2016Publication date: July 27, 2017Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Aniruddha Satoskar, Daniel J. Allen, Edmund Mark Schneider, Tejasvi Das, Ku He, John L. Melanson