Patents by Inventor Darin Edward Gerhart

Darin Edward Gerhart has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190227920
    Abstract: An arrangement is disclosed comprising a memory arrangement configured to store and retrieve data; an interface to allow data to be received and transmitted by the arrangement from a host and a processor configured to dynamically conduct automatic performance tuning for the memory arrangement.
    Type: Application
    Filed: January 19, 2018
    Publication date: July 25, 2019
    Inventors: Darin Edward GERHART, Cory LAPPI, Nicholas Edward ORTMEIER
  • Publication number: 20190205535
    Abstract: A method and arrangement for providing warnings based upon potential security compromising actions is discussed. Monitoring of system changes, temperature, humidity, power levels and reconfiguration of system components is performed and compared to threshold levels, with warning generated when monitored conditions fall outside of expected bounds.
    Type: Application
    Filed: January 2, 2018
    Publication date: July 4, 2019
    Inventor: Darin Edward GERHART
  • Publication number: 20190187912
    Abstract: A method for control of latency information through logical block addressing is described comprising receiving a computer command, performing a read flow operation on a computer buffer memory based on the computer command; populating at least one metadata frame with data based on logical block address latency information; initiating a serial attached data path transfer for one of transmitting and receiving data to the computer drive and transmitting data to a host based on the second latency.
    Type: Application
    Filed: December 18, 2017
    Publication date: June 20, 2019
    Inventors: Darin Edward GERHART, Nicholas Edward ORTMEIER, Mark David ERICKSON
  • Publication number: 20180337855
    Abstract: Embodiments of the present disclosure generally relate to managing phys of a data storage target device. In one embodiment, a method of managing phys of a data storage target device includes waiting to receive a host address on a target phy and transmitting a target phy address for the target phy after waiting to receive the host address on the target phy. In another embodiment, a method of managing phys of a data storage target device includes configuring a target port comprising a first target phy and reconfiguring the target port comprising a first target phy and a second target phy.
    Type: Application
    Filed: May 19, 2017
    Publication date: November 22, 2018
    Inventors: Darin Edward GERHART, Nicholas Edward ORTMEIER, Xin CHEN
  • Publication number: 20180335941
    Abstract: Embodiments of the present disclosure generally relate to managing phys of a data storage target device. In one embodiment, a method of automatically managing phys of a data storage target device by a controller of the data storage device across a link reset includes transmitting a common target phy address for a plurality of target phys during a first link reset, storing the common target phy address in a non-volatile memory of the data storage device, resetting the target phys, and transmitting the stored common target phy address for the plurality of target phys during a second link reset. In another embodiment, a method of automatically managing phys of a data storage target device by a controller of the data storage device includes matching a received host address for a plurality of target phys and configuring the plurality of target phys into a wide port for the plurality of target phys with the matched received host address.
    Type: Application
    Filed: May 19, 2017
    Publication date: November 22, 2018
    Inventors: Darin Edward GERHART, Nicholas Edward ORTMEIER, Xin CHEN
  • Publication number: 20180293177
    Abstract: A memory device including at least one memory location for storing information representing data written using a first encryption/decryption method, and a read channel using a second encryption/decryption method for reading and decrypting information as written. The memory device also includes an apparatus that prevents the reading of the at least one memory location using the second encryption/decryption method, in response to an indication that the at least one memory location was written using the first encryption/decryption method. In another embodiment, a reading of all zeroes is returned in response to an indication of another encryption/decryption method.
    Type: Application
    Filed: April 30, 2018
    Publication date: October 11, 2018
    Inventors: Darin Edward GERHART, Cory LAPPI, Daniel Robert LIPPS, William Jared WALKER
  • Publication number: 20180253250
    Abstract: A controller of a storage device is described for handling communications with a host device. In some examples, the storage device includes a wide port comprising a plurality of phys. The wide port is configured to receive, via a first phy of the plurality of phys, a signal. The controller is configured to select, based on a respective power factor associated with each respective phy of the plurality of phys and a respective performance factor associated with each respective phy of the plurality of phys, a second phy of the plurality of phys to utilize for performing an operation associated with the received signal. In such examples, the wide port is further configured to perform, using the second phy, the operation associated with the received signal.
    Type: Application
    Filed: April 30, 2018
    Publication date: September 6, 2018
    Inventors: Darin Edward GERHART, Nicholas Edward ORTMEIER
  • Patent number: 10042585
    Abstract: A method is described that includes generating, by a controller of a storage device, operating statistics associated with an operating state of the storage device. The method includes receiving, by the controller and from a host device, a non-interrupt command frame that requests transfer of data blocks between the storage device and the host device. The method further includes, in response to receiving the non-interrupt command frame, generating, by the controller, a response frame associated with the non-interrupt command frame, wherein the response frame includes the operating statistics. The method includes transmitting, by the controller and to the host device, the response frame.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: August 7, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Mark David Erickson, Darin Edward Gerhart, Nicholas Edward Ortmeier
  • Patent number: 10025664
    Abstract: A data storage device may include a volatile memory device and a controller. The volatile memory device may include a plurality of sections. The controller may be configured to cause data to be stored to a section of the volatile memory device. The controller may also be configured to apply data protection to the data in response to determining that the data comprises a first type of data. The controller may also be configured to refrain from applying data protection to the data in response to determining that the data comprises a second type of data.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: July 17, 2018
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Darin Edward Gerhart, Nicholas Edward Ortmeier, Yasunobu Suginaka
  • Publication number: 20180173293
    Abstract: The present disclosure generally relates to a method for intelligent device initiated SAS Phy PM. Using device internal phy characteristics and future phy usage queue, the device determines optimal SAS Phy PM usage based on a predetermined configuration preference of power versus performance. The device achieves optimal SAS Phy PM Usage by implementing a state machine to manage phy PM states and transitions between the PM states. The device state machine includes capabilities to proactively initiate transitions to partial or slumber PM states, start early wake-up from partial or slumber PM states to mask the associated latency impacts of exiting partial or slumber PM states, and selectively reject host requests to enter a partial or slumber PM state.
    Type: Application
    Filed: December 19, 2016
    Publication date: June 21, 2018
    Inventors: Mark David ERICKSON, Darin Edward GERHART, Nicholas Edward ORTMEIER, Yasunobu SUGINAKA
  • Patent number: 9959218
    Abstract: A memory device including at least one memory location for storing information representing data written using a first encryption/decryption method, and a read channel using a second encryption/decryption method for reading and decrypting information as written. The memory device also includes an apparatus that prevents the reading of the at least one memory location using the second encryption/decryption method, in response to an indication that the at least one memory location was written using the first encryption/decryption method. In another embodiment, a reading of all zeroes is returned in response to an indication of another encryption/decryption method.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: May 1, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Darin Edward Gerhart, Cory Lappi, Daniel Robert Lipps, William Jared Walker
  • Patent number: 9959068
    Abstract: A controller of a storage device is described for handling communications with a host device. In some examples, the storage device includes a wide port comprising a plurality of phys. The wide port is configured to receive, via a first phy of the plurality of phys, a signal. The controller is configured to select, based on a respective power factor associated with each respective phy of the plurality of phys and a respective performance factor associated with each respective phy of the plurality of phys, a second phy of the plurality of phys to utilize for performing an operation associated with the received signal. In such examples, the wide port is further configured to perform, using the second phy, the operation associated with the received signal.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: May 1, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Darin Edward Gerhart, Nicholas Edward Ortmeier
  • Publication number: 20180088860
    Abstract: A method is described that includes generating, by a controller of a storage device, operating statistics associated with an operating state of the storage device. The method includes receiving, by the controller and from a host device, a non-interrupt command frame that requests transfer of data blocks between the storage device and the host device. The method further includes, in response to receiving the non-interrupt command frame, generating, by the controller, a response frame associated with the non-interrupt command frame, wherein the response frame includes the operating statistics. The method includes transmitting, by the controller and to the host device, the response frame.
    Type: Application
    Filed: September 27, 2016
    Publication date: March 29, 2018
    Inventors: Mark David Erickson, Darin Edward Gerhart, Nicholas Edward Ortmeier
  • Patent number: 9927999
    Abstract: A storage device may include a data storage portion, including a plurality of blocks of data, and a controller. The controller may be configured to receive a command that includes an inherent trim request for the plurality of blocks of data. The controller may be configured to perform a trim operation on a first set of trim blocks from the plurality of blocks of data, which may include fewer than all blocks of the plurality of blocks of data and may include trim blocks on which the controller can complete the trim operation within a predetermined time. The controller may be configured to update a pending trim table to include an indication of a second set of trim blocks on which trim is to be performed, which may include blocks of data on which the controller cannot complete the trim operation within the predetermined time.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: March 27, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Darin Edward Gerhart, Timothy Glen Hallett, Daniel Robert Lipps, Nicholas Edward Ortmeier
  • Publication number: 20180074708
    Abstract: A storage device may include a data storage portion, including a plurality of blocks of data, and a controller. The controller may be configured to receive a command that includes an inherent trim request for the plurality of blocks of data. The controller may be configured to perform a trim operation on a first set of trim blocks from the plurality of blocks of data, which may include fewer than all blocks of the plurality of blocks of data and may include trim blocks on which the controller can complete the trim operation within a predetermined time. The controller may be configured to update a pending trim table to include an indication of a second set of trim blocks on which trim is to be performed, which may include blocks of data on which the controller cannot complete the trim operation within the predetermined time.
    Type: Application
    Filed: September 9, 2016
    Publication date: March 15, 2018
    Inventors: Darin Edward Gerhart, Timothy Glen Hallett, Daniel Robert Lipps, Nicholas Edward Ortmeier
  • Publication number: 20180018287
    Abstract: A memory device including at least one memory location for storing information representing data written using a first encryption/decryption method, and a read channel using a second encryption/decryption method for reading and decrypting information as written is disclosed. The memory device also includes an apparatus that prevents the reading of the at least one memory location using the second encryption/decryption method, in response to an indication that the at least one memory location was written using the first encryption/decryption method. In another embodiment, a reading of a predefined or custom code is returned in response to an indication of another encryption/decryption method.
    Type: Application
    Filed: September 14, 2017
    Publication date: January 18, 2018
    Inventors: William Jared WALKER, Cory LAPPI, Darin Edward GERHART, Daniel Robert LIPPS
  • Publication number: 20170255414
    Abstract: A controller of a storage device is described for handling communications with a host device. In some examples, the storage device includes a wide port comprising a plurality of phys. The wide port is configured to receive, via a first phy of the plurality of phys, a signal. The controller is configured to select, based on a respective power factor associated with each respective phy of the plurality of phys and a respective performance factor associated with each respective phy of the plurality of phys, a second phy of the plurality of phys to utilize for performing an operation associated with the received signal. In such examples, the wide port is further configured to perform, using the second phy, the operation associated with the received signal.
    Type: Application
    Filed: March 4, 2016
    Publication date: September 7, 2017
    Inventors: Darin Edward Gerhart, Nicholas Edward Ortmeier
  • Publication number: 20170177241
    Abstract: A method includes receiving, by a hardware controller of a storage device and from a host device, a command to read data from or write data to a non-volatile memory device of the storage device. The method includes, responsive to receiving the command: initializing, by firmware executing at a processor of the hardware controller, a command to retrieve data from or write data to the non-volatile memory device; determining, by circuit logic of the hardware controller, a time indicative of when the firmware initialized the command; determining, by the circuit logic, a time indicative of when the command terminated; and storing, by the circuit logic and at a latency monitoring cache of the storage device, a timestamp associated with the time indicative of when the command was initialized and a timestamp associated with the time indicative of when the command terminated.
    Type: Application
    Filed: December 21, 2015
    Publication date: June 22, 2017
    Inventors: Mark David Erickson, Adam Christopher Geml, Darin Edward Gerhart, Nicholas Edward Ortmeier
  • Publication number: 20170177438
    Abstract: A data storage device may include a volatile memory device and a controller. The volatile memory device may include a plurality of sections. The controller may be configured to cause data to be stored to a section of the volatile memory device. The controller may also be configured to apply data protection to the data in response to determining that the data comprises a first type of data. The controller may also be configured to refrain from applying data protection to the data in response to determining that the data comprises a second type of data.
    Type: Application
    Filed: December 22, 2015
    Publication date: June 22, 2017
    Inventors: Darin Edward Gerhart, Nicholas Edward Ortmeier, Yasunobu Suginaka
  • Publication number: 20170031837
    Abstract: A memory device including at least one memory location for storing information representing data written using a first encryption/decryption method, and a read channel using a second encryption/decryption method for reading and decrypting information as written. The memory device also includes an apparatus that prevents the reading of the at least one memory location using the second encryption/decryption method, in response to an indication that the at least one memory location was written using the first encryption/decryption method. In another embodiment, a reading of all zeroes is returned in response to an indication of another encryption/decryption method.
    Type: Application
    Filed: August 2, 2016
    Publication date: February 2, 2017
    Inventors: Darin Edward Gerhart, Cory Lappi, Daniel Robert Lipps, William Jared Walker