Patents by Inventor Darin Edward Gerhart

Darin Edward Gerhart has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9508399
    Abstract: In some examples, a method includes determining, by a processor of a controller of a data storage device, that a voltage level of a capacitor in the data storage device is above a threshold voltage value, wherein the data storage device includes a capacitor circuit, and wherein the capacitor circuit includes the capacitor. The method further includes controlling, by the processor, the capacitor circuit to cause the capacitor to provide power to circuitry associated with memory devices of the data storage device along with power provided by a host device operably connected to the data storage device.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: November 29, 2016
    Assignee: HGST Netherlands B.V.
    Inventors: Kraig Bottemiller, Darin Edward Gerhart, Cory Lappi, William Jared Walker
  • Patent number: 9436618
    Abstract: A memory device including at least one memory location for storing information representing data written using a first encryption/decryption method, and a read channel using a second encryption/decryption method for reading and decrypting information as written. The memory device also includes an apparatus that prevents the reading of the at least one memory location using the second encryption/decryption method, in response to an indication that the at least one memory location was written using the first encryption/decryption method. In another embodiment, a reading of all zeroes is returned in response to an indication of another encryption/decryption method.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: September 6, 2016
    Assignee: HGST Netherlands B.V.
    Inventors: Darin Edward Gerhart, Cory Lappi, Daniel Robert Lipps, William Jared Walker
  • Publication number: 20160170909
    Abstract: A memory device including at least one memory location for storing information representing data written using a first encryption/decryption method, and a read channel using a second encryption/decryption method for reading and decrypting information as written. The memory device also includes an apparatus that prevents the reading of the at least one memory location using the second encryption/decryption method, in response to an indication that the at least one memory location was written using the first encryption/decryption method. In another embodiment, a reading of all zeroes is returned in response to an indication of another encryption/decryption method.
    Type: Application
    Filed: February 23, 2016
    Publication date: June 16, 2016
    Inventors: Darin Edward Gerhart, Cory Lappi, Daniel Robert Lipps, William Jared Walker
  • Patent number: 9298647
    Abstract: A memory device including at least one memory location for storing information representing data written using a first encryption/decryption method, and a read channel using a second encryption/decryption method for reading and decrypting information as written. The memory device also includes an apparatus that prevents the reading of the at least one memory location using the second encryption/decryption method, in response to an indication that the at least one memory location was written using the first encryption/decryption method. In another embodiment, a reading of all zeroes is returned in response to an indication of another encryption/decryption method.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: March 29, 2016
    Assignee: HGST Netherlands B.V.
    Inventors: Darin Edward Gerhart, Cory Lappi, Daniel Robert Lipps, William Jared Walker
  • Publication number: 20160055101
    Abstract: A memory device including at least one memory location for storing information representing data written using a first encryption/decryption method, and a read channel using a second encryption/decryption method for reading and decrypting information as written. The memory device also includes an apparatus that prevents the reading of the at least one memory location using the second encryption/decryption method, in response to an indication that the at least one memory location was written using the first encryption/decryption method. In another embodiment, a reading of all zeroes is returned in response to an indication of another encryption/decryption method.
    Type: Application
    Filed: August 25, 2014
    Publication date: February 25, 2016
    Inventors: Darin Edward GERHART, Cory LAPPI, Daniel Robert LIPPS, William Jared WALKER
  • Patent number: 6785752
    Abstract: A method, which may be embodied upon a computer readable medium and executed by a processor, for dynamically adjusting engine startup parameters for a hard disk drive system. The method includes determining if a drive catch-up condition or a host catch-up condition has occurred and adjusting at least one of a read pad and a write pad if a drive catch-up condition is determined. The method further calculating a pad parameter and an optimal delay parameter if a host catch-up condition is determined. Thereafter, the method includes adjusting the optimal delay parameter with the pad parameter if a host catch-up condition is determined.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: August 31, 2004
    Assignee: International Business Machines Corporation
    Inventor: Darin Edward Gerhart
  • Patent number: 6766388
    Abstract: A method, which may be embodied upon a computer readable medium and executed by a processor, for dynamically adjusting buffer utilization ratios for a hard disk drive system. The method establishes and dynamically adjusts a host transfer goal, which targets the amount of data transferred between host catch-up conditions for a current command. The actual amount of data transferred between host catch-up conditions is compared against the host transfer goal, and the buffer utilization ratios are adjusted when the actual amount of transferred data does not exceed the transfer goal. The host transfer goal is established by a number of operational characteristics, including drive transfer speed, host transfer speed, and track switch locations.
    Type: Grant
    Filed: July 27, 2001
    Date of Patent: July 20, 2004
    Assignee: International Business Machines Corporation
    Inventor: Darin Edward Gerhart
  • Publication number: 20030023790
    Abstract: A method, which may be embodied upon a computer readable medium and executed by a processor, for dynamically adjusting buffer utilization ratios for a hard disk drive system. The method establishes and dynamically adjusts a host transfer goal, which targets the amount of data transferred between host catch-up conditions for a current command. The actual amount of data transferred between host catch-up conditions is compared against the host transfer goal, and the buffer utilization ratios are adjusted when the actual amount of transferred data does not exceed the transfer goal. The host transfer goal is established by a number of operational characteristics, including drive transfer speed, host transfer speed, and track switch locations.
    Type: Application
    Filed: July 27, 2001
    Publication date: January 30, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Darin Edward Gerhart
  • Publication number: 20020138692
    Abstract: A method, which may be embodied upon a computer readable medium and executed by a processor, for dynamically adjusting engine startup parameters for a hard disk drive system. The method includes determining if a drive catch-up condition or a host catch-up condition has occurred and adjusting at least one of a read pad and a write pad if a drive catch-up condition is determined. The method further calculating a pad parameter and an optimal delay parameter if a host catch-up condition is determined. Thereafter, the method includes adjusting the optimal delay parameter with the pad parameter if a host catch-up condition is determined.
    Type: Application
    Filed: March 23, 2001
    Publication date: September 26, 2002
    Applicant: International Business Machines Corporation
    Inventor: Darin Edward Gerhart