Abstract: A method and structure for improving a coating on a substrate comprises a chamber further comprising a rotatable holder, which holds the substrate; a supply of coating material for coating the substrate in the chamber; a window in the wall of the chamber; and a supply of liquid for coating at least a portion of the window on the interior side of the chamber. The chamber is preferably adapted to house the window in multiple configurations. A camera (or other optical detector), which is positioned outside of the chamber, monitors the substrate through the window.

Abstract: A diffusion barrier that has a low dielectric constant, k, yet resistant to oxygen and/or moisture permeability is provided. The diffusion barrier includes a dielectric stack having at least two or more dielectric films, each film having a dielectric constant of about 8 or less, wherein the dielectric stack comprises alternating films composed of a high-permeability material and a low-permeability material. A semiconductor structure including substrate having at least one wiring region and the inventive diffusion barrier formed on a surface of the substrate is also provided.

Abstract: A metal layer is formed at high deposition rate over severe topography by a two step process including formation of a seed layer by cold deposition followed by a second portion of the metal layer deposited at a temperature approximating but below a temperature at which metal from a lower metal layer can extrude through vias reaching thereto. The seed layer is preferably limited to a thickness at which the conformality of the cold-deposited metal will not significantly increase severity of surface topography, generally about one-fourth the thickness of the hot-deposited layer. Via connections are formed without voids and a more planar metal layer surface is formed which allows formation of a protective/anti-reflective layer with good integrity while enhancing subsequent lithographic patterning, thereby eliminating alteration of metal surface chemistry by resist developers and resultant residual metal included within the severe topography.

Abstract: A cooling structure and a reinforcing structure are described for use with a radio-frequency coil in an ionized physical vapor deposition apparatus. The cooling structure includes a portion for carrying coolant and is proximate to the RF coil along the outer circumference thereof. The cooling structure is shaped relative to the RF coil so that thermal expansion of the RF coil brings the RF coil into close contact with the cooling structure, thereby facilitating heat transfer from the RF coil to the coolant. The reinforcing structure is similarly shaped, and may be integrated with the cooling structure. In addition, the RF coil or cooling/reinforcing structure may be mounted to the wall of the process chamber with telescoping mounting posts, which permit the RF coil to maintain its shape while undergoing thermal expansion. The parasitic inductance of the RF coil leads is reduced by arranging those leads coaxially, thereby minimizing power losses in the RF coil.

Abstract: Improvements are described for a wafer clamp ring used in an IPVD apparatus to provide cooling for the wafer clamp ring, to protect the wafer clamp ring from ion bombardment, and to prevent damage to the wafer. The wafer clamp ring is placed on a cooling fixture when not required for a deposition process. The fixture is annular in shape and in close thermal contact with a circulating coolant and is thereby cooled below ambient temperature. The cooling line and the cooling fixture are fixed relative to the IPVD device, so that problems associated with flexible cooling lines are avoided. An annular grounded shield may be provided between the plasma and clamp ring to protect the clamp ring against ion bombardment during the deposition process. The wafer clamp ring may have a portion which overhangs the wafer during a deposition process, and which has a ridge portion extending downwards therefrom and tapering to a knife edge.

Abstract: A method of depositing a fluorinated borophosphosilicate glass (FBPSG) on a semiconductor device as either a final or interlayer dielectric film. Gaps having aspect ratios greater than 6:1 are filled with a substantially void-free FBPSG film at a temperature of about 480.degree. C. at sub-atmospheric pressures of about 200 Torr. Preferably, gaseous reactants used in the method comprise TEOS, FTES, TEPO and TEB with an ozone/oxygen mixture. Dopant concentrations of boron and phosphorus are sufficiently low such that surface crystallite defects and hygroscopicity are avoided. The as-deposited films at lower aspect ratio gaps are substantially void-free such that subsequent anneal of the film is not required. Films deposited into higher aspect ratio gaps are annealed at or below about 750.degree. C., well within the thermal budget for most DRAM, logic and merged logic-DRAM chips. The resultant FBPSG layer contains less than or equal to about 5.0 wt % boron, less than about 4.0 wt % phosphorus, and about 0.

Abstract: A metal layer is formed at high deposition rate over severe topography by a two step process including formation of a seed layer by cold deposition followed by a second portion of the metal layer deposited at a temperature approximating but below a temperature at which metal from a lower metal layer can extrude through vias reaching thereto. The seed layer is preferably limited to a thickness at which the conformality of the cold-deposited metal will not significantly increase severity of surface topography, generally about one-fourth the thickness of the hot-deposited layer. Via connections are formed without voids and a more planar metal layer surface is formed which allows formation of a protective/anti-reflective layer with good integrity while enhancing subsequent lithographic patterning, thereby eliminating alteration of metal surface chemistry by resist developers and resultant residual metal included within the severe topography.