Abstract: A method of fabricating a printed circuit board (PCB) is presented. The PCB includes a glass security layer. The method includes forming the glass security layer upon a PCB wiring layer. The method includes optically attaching an optical electromagnetic radiation (EM) emitter upon the glass security layer. The method includes optically attaching an optical EM receiver upon the glass security layer. The method further includes electrically connecting an optical monitor device to the optical EM receiver.

Abstract: A method and apparatus are provided for implementing customized printed circuit board (PCB) via creation through use of magnetic capture pads. At least one magnetic capture pad is rendered before aqueous seed and plate processing in the PCB manufacture. The magnetic capture pad selectively provides seed material rendering copper in at least one selected region of the via.

Abstract: A security matrix layer between a first and second conductive shorting layers are located within a printed circuit board (PCB) that carries out cryptographic data handling functions. The security matrix layer includes at least two microcapsules each containing one or more reactants. When the security matrix layer is accessed, drilled, or otherwise damaged, the microcapsules rupture and the reactants react to form at least an electrically conductive material. The electrically conductive material contacts and shorts the first and second conductive shorting layers. A monitoring device that monitors whether the first and second conductive shorting layers have shorted detects the short and passes a tamper signal that is received by one or more computer system devices to respond to the unauthorized physical access attempt.

Abstract: A security apparatus that can detect unauthorized alterations of physical arrangement of a computing system or unauthorized movements of a computing system through the use of acoustic signals is designed. Modules of a computing system including the security apparatus are able to generate acoustic measurements from received returned acoustic signals. Also, the modules are able to derive baseline acoustic measurements based on stored acoustic profiles. If, for any module of the computing system, its generated acoustic measurements do not substantially match its baseline acoustic measurements, the mismatch may indicate that there is an unauthorized alteration of physical arrangement of the computing system or an unauthorized movement of the computing system. Thus, the security apparatus in the module may take actions to prevent access to the sensitive data stored in the module.

Abstract: An apparatus comprises a plurality of conductive elements arranged within at least a first conductive layer and a dielectric layer comprising a plurality of microcapsules. The first conductive layer is arranged on a first side of the dielectric layer. The apparatus further comprises monitoring circuitry coupled with the plurality of conductive elements and configured to detect a change in an electrical parameter for at least a first conductive element of the plurality of conductive elements. The change in the electrical parameter indicates a physical intrusion of the dielectric layer that causes a rupture of one or more microcapsules of the plurality of microcapsules.

Abstract: A removable backrest is attached to a cooler in such a manner that does not interfere with the opening or closing of the lid nor does it interfere with the sealing mechanism of the cooler. The removable backrest inserts into existing slots positioned in the walls of certain commercially available coolers. The angle of the frame permits a user to sit on the complete lid of the cooler and lean against the backrest. While the backrest is in position, the lid may be opened or closed at the user's convenience.

Abstract: In some embodiments, a tamper-respondent system includes a PCB having a coating on a surface thereof, wherein the coating includes spinel-based, non-conductive metal oxide mixed into a non-conductive supporting material. The tamper-respondent system also includes a conductive track writing unit, a sensor, and an enclosure substantially enclosing the PCB, conductive track writing unit, and sensor. Responsive to a determination that a signal output from the sensor is indicative of tampering, the conductive track writing unit writes a conductive track within a predetermined portion of the coating by irradiating the predetermined portion of the coating to reduce the spinel-based, non-conductive metal oxide in the predetermined portion of the coating to metal nuclei. In some embodiments, the conductive track may modify circuit paths of the PCB and/or create electrical features on the PCB detectable by monitoring agents.

Abstract: Systems and methods to safeguard data and hardware may include a memory configured to store a first image and sensitive data, and an optical sensor configured to capture a second image. A sensor signal comprising the captured second image may be generated. A controller having access to the memory may be configured to receive the sensor signal. The controller may be further configured to compare the stored first image to the captured second image, and based on the comparison, to determine whether the sensitive data is accessible.

Abstract: Systems and methods to safeguard data and hardware may include a memory configured to store a first image and sensitive data, and an optical sensor configured to capture a second image. A sensor signal comprising the captured second image may be generated. A controller having access to the memory may be configured to receive the sensor signal. The controller may be further configured to compare the stored first image to the captured second image, and based on the comparison, to determine whether the sensitive data is accessed.

Abstract: A lane within a processor bus that communicatively connects a transmitter and a receiver is dynamically assigned as a clock lane. The clock lane subsequently transmits a reference clock signal to coordinate data communications from the transmitter to the receiver. The clock lane may be assigned by determining signal margins of various lanes of the processor bus. The signal margins are determined by the transmitter sending a test pattern upon the various lanes and analyzing the received test pattern at the receiver. A dynamically assigned clock lane results increased overall signal integrity of communications between the transmitter and receiver. Further, a dynamically assigned clock lane may result in different lanes being assigned as the clock lane at distinct boot up instances, adding to the complexity of the unauthorized user determining the operational logic of the transmitter.

Abstract: A lane within a processor bus that communicatively connects a transmitter and a receiver is dynamically assigned as a clock lane. The clock lane subsequently transmits a reference clock signal to coordinate data communications from the transmitter to the receiver. The clock lane may be assigned by determining signal margins of various lanes of the processor bus. The signal margins are determined by the transmitter sending a test pattern upon the various lanes and analyzing the received test pattern at the receiver. A dynamically assigned clock lane results increased overall signal integrity of communications between the transmitter and receiver. Further, a dynamically assigned clock lane may result in different lanes being assigned as the clock lane at distinct boot up instances, adding to the complexity of the unauthorized user determining the operational logic of the transmitter.

Abstract: A method of fabricating a printed circuit board (PCB) is presented. The PCB includes a glass security layer. The method includes forming the glass security layer upon a PCB wiring layer. The method includes optically attaching an optical electromagnetic radiation (EM) emitter upon the glass security layer. The method includes optically attaching an optical EM receiver upon the glass security layer. The method further includes electrically connecting an optical monitor device to the optical EM receiver.

Abstract: An optical electromagnetic radiation (EM) emitter and receiver are located upon a printed circuit board (PCB) glass security layer. A predetermined reference flux or interference pattern, respectively, is an expected flux or reflection pattern of EM emitted from the EM emitter, transmitted by the glass security layer, and received by the EM receiver. When the PCB is subject to an unauthorized access thereof the optical EM transmitted by glass security layer is altered. An optical monitoring device that monitors the flux or interference pattern of the optical EM received by the EM receiver detects a change in flux or interference pattern, in relation to the reference flux or reference interference pattern, respectively, and passes a tamper signal to one or more computer system devices to respond to the unauthorized access. For example, one or more cryptographic adapter card or computer system functions or secured crypto components may be disabled.

Abstract: A lane within a processor bus that communicatively connects a transmitter and a receiver is dynamically assigned as a clock lane. The clock lane subsequently transmits a reference clock signal to coordinate data communications from the transmitter to the receiver. The clock lane may be assigned by determining signal margins of various lanes of the processor bus. The signal margins are determined by the transmitter sending a test pattern upon the various lanes and analyzing the received test pattern at the receiver. A dynamically assigned clock lane results increased overall signal integrity of communications between the transmitter and receiver. Further, a dynamically assigned clock lane may result in different lanes being assigned as the clock lane at distinct boot up instances, adding to the complexity of the unauthorized user determining the operational logic of the transmitter.

Abstract: A lane within a processor bus that communicatively connects a transmitter and a receiver is dynamically assigned as a clock lane. The clock lane subsequently transmits a reference clock signal to coordinate data communications from the transmitter to the receiver. The clock lane may be assigned by determining signal margins of various lanes of the processor bus. The signal margins are determined by the transmitter sending a test pattern upon the various lanes and analyzing the received test pattern at the receiver. A dynamically assigned clock lane results increased overall signal integrity of communications between the transmitter and receiver. Further, a dynamically assigned clock lane may result in different lanes being assigned as the clock lane at distinct boot up instances, adding to the complexity of the unauthorized user determining the operational logic of the transmitter.

Abstract: A security apparatus that can detect unauthorized alterations of physical arrangement of a computing system or unauthorized movements of a computing system through the use of acoustic signals is designed. Modules of a computing system including the security apparatus are able to generate acoustic measurements from received returned acoustic signals. Also, the modules are able to derive baseline acoustic measurements based on stored acoustic profiles. If, for any module of the computing system, its generated acoustic measurements do not substantially match its baseline acoustic measurements, the mismatch may indicate that there is an unauthorized alteration of physical arrangement of the computing system or an unauthorized movement of the computing system. Thus, the security apparatus in the module may take actions to prevent access to the sensitive data stored in the module.

Abstract: A bus communicates bits in parallel between a transmitter and receiver. A selected set of bits has its bits scrambled. Scrambling the bits includes assigning two or more bits of the selected set of bits to atypical lanes of the bus. By scrambling the bits, the order in which the bits of the selected set of bits are ready by a processer are obscured. The set of bits is transmitted to the receiver with one or more delays. The delays are on one or more of the lanes of the bus. The delays indicate the order of the bits. The receiver is configured to use the delays to identify the order of the bits and unscramble the set of bits.

Abstract: A conductor on glass security layer may be located within a printed circuit board (PCB) of a crypto adapter card or within a daughter card upon the crypto adapter card. The conductor on glass security layer includes a glass dielectric layer that remains intact in the absence of point force loading and shatters when a point load punctures or otherwise contacts the glass dielectric layer. The conductor on glass security layer also includes a conductive security trace upon the glass dielectric layer. A physical access attempt shatters a majority of the glass dielectric layer, which in turn fractures the security trace. A monitoring circuit that monitors the resistance of the conductive security trace detects the resultant open circuit or change in security trace resistance and initiates a tamper signal that which may be received by one or more computer system devices to respond to the unauthorized attempt of physical access.

Abstract: An optical electromagnetic radiation (EM) emitter and receiver are located upon a printed circuit board (PCB) glass security layer. A predetermined reference flux or interference pattern, respectively, is an expected flux or reflection pattern of EM emitted from the EM emitter, transmitted by the glass security layer, and received by the EM receiver. When the PCB is subject to an unauthorized access thereof the optical EM transmitted by glass security layer is altered. An optical monitoring device that monitors the flux or interference pattern of the optical EM received by the EM receiver detects a change in flux or interference pattern, in relation to the reference flux or reference interference pattern, respectively, and passes a tamper signal to one or more computer system devices to respond to the unauthorized access. For example, one or more cryptographic adapter card or computer system functions or secured crypto components may be disabled.

Abstract: A security matrix layer between a first and second conductive shorting layers are located within a printed circuit board (PCB) that carries out cryptographic data handling functions. The security matrix layer includes at least two microcapsules each containing one or more reactants. When the security matrix layer is accessed, drilled, or otherwise damaged, the microcapsules rupture and the reactants react to form at least an electrically conductive material. The electrically conductive material contacts and shorts the first and second conductive shorting layers. A monitoring device that monitors whether the first and second conductive shorting layers have shorted detects the short and passes a tamper signal that is received by one or more computer system devices to respond to the unauthorized physical access attempt.