Patents by Inventor Darryl J. Becker
Darryl J. Becker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9488690Abstract: A stub of a via formed in a printed circuit board is backdrilled to a predetermined depth. A capacitance probe is positioned within the via. Then the capacitance probe is used to obtain a test capacitance measurement. The test capacitance measurement is compared to a predetermined baseline capacitance measurement. Residual conductive plating material in the backdrilled stub causes the test capacitance measurement to exceed the predetermined baseline capacitance measurement. An indication is made that the predetermined baseline capacitance measurement has been exceeded.Type: GrantFiled: August 19, 2014Date of Patent: November 8, 2016Assignee: International Business Machines CorporationInventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Philip R. Germann, Mark O. Maxson
-
Publication number: 20160320443Abstract: A stub of a via formed in a printed circuit board is backdrilled to a predetermined depth. A capacitance probe is positioned within the via. Then the capacitance probe is used to obtain a test capacitance measurement. The test capacitance measurement is compared to a predetermined baseline capacitance measurement. Residual conductive plating material in the backdrilled stub causes the test capacitance measurement to exceed the predetermined baseline capacitance measurement. An indication is made that the predetermined baseline capacitance measurement has been exceeded.Type: ApplicationFiled: July 8, 2016Publication date: November 3, 2016Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Philip R. Germann, Mark O. Maxson
-
Publication number: 20160321815Abstract: Aspects of the present disclosure are directed towards environmental based location monitoring. Environmental based location monitoring can include collecting, a first set of image data that corresponds to a first set of environmental characteristics existing within a bounded area encompassing a hardware element of the computer and determining an environmental difference based on a difference between a first location corresponding to a geographic position of the hardware element relative to the first set of environmental characteristics and a second location corresponding to an approved geographic position of the hardware element. Environmental based location monitoring can include determining that the environmental difference does not satisfy a threshold and executing a reaction sequence in the computer, in response to determining that the environmental difference does not satisfy the threshold.Type: ApplicationFiled: July 22, 2016Publication date: November 3, 2016Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark O. Maxson
-
Publication number: 20160321440Abstract: Systems and methods to safeguard data and hardware may include a memory configured to store a first image and sensitive data, and an optical sensor configured to capture a second image. A sensor signal comprising the captured second image may be generated. A controller having access to the memory may be configured to receive the sensor signal. The controller may be further configured to compare the stored first image to the captured second image, and based on the comparison, to determine whether the sensitive data is accessed.Type: ApplicationFiled: December 15, 2014Publication date: November 3, 2016Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark O. Maxson
-
Publication number: 20160285887Abstract: Aspects of the present disclosure are directed towards environmental based location monitoring. Environmental based location monitoring can include collecting, a first set of image data that corresponds to a first set of environmental characteristics existing within a bounded area encompassing a hardware element of the computer and determining an environmental difference based on a difference between a first location corresponding to a geographic position of the hardware element relative to the first set of environmental characteristics and a second location corresponding to an approved geographic position of the hardware element. Environmental based location monitoring can include determining that the environmental difference does not satisfy a threshold and executing a reaction sequence in the computer, in response to determining that the environmental difference does not satisfy the threshold.Type: ApplicationFiled: December 21, 2015Publication date: September 29, 2016Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark O. Maxson
-
Publication number: 20160283823Abstract: Aspects of the present disclosure are directed towards environmental based location monitoring. Environmental based location monitoring can include collecting, a first set of image data that corresponds to a first set of environmental characteristics existing within a bounded area encompassing a hardware element of the computer and determining an environmental difference based on a difference between a first location corresponding to a geographic position of the hardware element relative to the first set of environmental characteristics and a second location corresponding to an approved geographic position of the hardware element. Environmental based location monitoring can include determining that the environmental difference does not satisfy a threshold and executing a reaction sequence in the computer, in response to determining that the environmental difference does not satisfy the threshold.Type: ApplicationFiled: March 23, 2015Publication date: September 29, 2016Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark O. Maxson
-
Patent number: 9438606Abstract: Aspects of the present disclosure are directed towards environmental based location monitoring. Environmental based location monitoring can include collecting, a first set of image data that corresponds to a first set of environmental characteristics existing within a bounded area encompassing a hardware element of the computer and determining an environmental difference based on a difference between a first location corresponding to a geographic position of the hardware element relative to the first set of environmental characteristics and a second location corresponding to an approved geographic position of the hardware element. Environmental based location monitoring can include determining that the environmental difference does not satisfy a threshold and executing a reaction sequence in the computer, in response to determining that the environmental difference does not satisfy the threshold.Type: GrantFiled: December 21, 2015Date of Patent: September 6, 2016Assignee: International Business Machines CorporationInventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark O. Maxson
-
Publication number: 20160174388Abstract: Systems and methods to obstruct analysis of a microchip may include an electrical component of a microchip and a photodetector positioned within the microchip. The photodetector may be configured to sense electromagnetic radiation. Circuitry in electrical communication with the photodetector may be configured to initiate an action to obstruct analysis of the electrical component in response to a change in a level of the electromagnetic radiation.Type: ApplicationFiled: December 15, 2014Publication date: June 16, 2016Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark O. Maxson
-
Publication number: 20160173105Abstract: Systems and methods to obstruct analysis of a microchip may include an electrical component of a microchip and a photodetector positioned within the microchip. The photodetector may be configured to sense electromagnetic radiation. Circuitry in electrical communication with the photodetector may be configured to initiate an action to obstruct analysis of the electrical component in response to a change in a level of the electromagnetic radiation.Type: ApplicationFiled: December 18, 2014Publication date: June 16, 2016Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark O. Maxson
-
Patent number: 9341670Abstract: A stub of a via formed in a printed circuit board is backdrilled to a predetermined depth. A capacitance probe is positioned within the via. Then the capacitance probe is used to obtain a test capacitance measurement. The test capacitance measurement is compared to a predetermined baseline capacitance measurement. Residual conductive plating material in the backdrilled stub causes the test capacitance measurement to exceed the predetermined baseline capacitance measurement. An indication is made that the predetermined baseline capacitance measurement has been exceeded.Type: GrantFiled: May 20, 2014Date of Patent: May 17, 2016Assignee: International Business Machines CorporationInventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Philip R. Germann, Mark O. Maxson
-
Patent number: 9312199Abstract: An integrated circuit (IC) stack device for thermal management is disclosed. The IC stack device can include a primary IC having a first set of cores with a ratio of first enabled cores and first disabled cores. The IC stack device can also have a supplementary IC interfaced with the primary IC, and having a second set of cores with a second ratio of second enabled cores and second disabled cores, with the second ratio being less than the first ratio. The integrated circuit stack device can also include a cooling element located such that the primary integrated circuit is between the cooling element and the supplementary integrated circuit. The cooling element can be designed to facilitate heat dissipation of the first and second enabled cores of the primary integrated circuit and the supplementary integrated circuit.Type: GrantFiled: December 5, 2013Date of Patent: April 12, 2016Assignee: International Business Machines CorporationInventors: Gerald K. Bartley, Darryl J. Becker, Philip R. Germann, William P. Hovis
-
Patent number: 9310827Abstract: An integrated circuit (IC) stack device for multiple active vertically stacked cores is disclosed. The IC stack device can include a primary IC having a first set of cores, and a supplementary IC interfaced with the primary IC having a second set of cores. The IC stack device can also include a peripheral component connection located such that the primary IC is between the peripheral component connection and the supplemental IC. The IC stack device can include control logic configured to route, in a primary mode, signals from a particular core of the first set of cores to a data bus. The control logic can route, in a secondary mode, signals from a particular core of the second set of cores to a data bus. The control logic can route, in a dual mode, signals from both of the particular cores to a data bus.Type: GrantFiled: May 15, 2014Date of Patent: April 12, 2016Assignee: International Business Machines CorporationInventors: Gerald K. Bartley, Darryl J. Becker, William P. Hovis
-
Patent number: 9281261Abstract: An integrated circuit (IC) stack device for thermal management is disclosed. The IC stack device can include a primary IC having a first set of cores with a ratio of first enabled cores and first disabled cores. The IC stack device can also have a supplementary IC interfaced with the primary IC, and having a second set of cores with a second ratio of second enabled cores and second disabled cores, with the second ratio being less than the first ratio. The integrated circuit stack device can also include a cooling element located such that the primary integrated circuit is between the cooling element and the supplementary integrated circuit. The cooling element can be designed to facilitate heat dissipation of the first and second enabled cores of the primary integrated circuit and the supplementary integrated circuit.Type: GrantFiled: May 15, 2014Date of Patent: March 8, 2016Assignee: International Business Machines CorporationInventors: Gerald K. Bartley, Darryl J. Becker, Philip R. Germann, William P. Hovis
-
Publication number: 20150338457Abstract: A stub of a via formed in a printed circuit board is backdrilled to a predetermined depth. A capacitance probe is positioned within the via. Then the capacitance probe is used to obtain a test capacitance measurement. The test capacitance measurement is compared to a predetermined baseline capacitance measurement. Residual conductive plating material in the backdrilled stub causes the test capacitance measurement to exceed the predetermined baseline capacitance measurement. An indication is made that the predetermined baseline capacitance measurement has been exceeded.Type: ApplicationFiled: August 19, 2014Publication date: November 26, 2015Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Philip R. Germann, Mark O. Maxson
-
Publication number: 20150342057Abstract: A stub of a via formed in a printed circuit board is backdrilled to a predetermined depth. A capacitance probe is positioned within the via. Then the capacitance probe is used to obtain a test capacitance measurement. The test capacitance measurement is compared to a predetermined baseline capacitance measurement. Residual conductive plating material in the backdrilled stub causes the test capacitance measurement to exceed the predetermined baseline capacitance measurement. An indication is made that the predetermined baseline capacitance measurement has been exceeded.Type: ApplicationFiled: May 20, 2014Publication date: November 26, 2015Applicant: International Business Machines CorporationInventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Philip R. Germann, Mark O. Maxson
-
Publication number: 20150162250Abstract: An integrated circuit (IC) stack device for thermal management is disclosed. The IC stack device can include a primary IC having a first set of cores with a ratio of first enabled cores and first disabled cores. The IC stack device can also have a supplementary IC interfaced with the primary IC, and having a second set of cores with a second ratio of second enabled cores and second disabled cores, with the second ratio being less than the first ratio. The integrated circuit stack device can also include a cooling element located such that the primary integrated circuit is between the cooling element and the supplementary integrated circuit. The cooling element can be designed to facilitate heat dissipation of the first and second enabled cores of the primary integrated circuit and the supplementary integrated circuit.Type: ApplicationFiled: May 15, 2014Publication date: June 11, 2015Applicant: International Business Machines CorporationInventors: Gerald K. Bartley, Darryl J. Becker, Philip R. Germann, William P. Hovis
-
Publication number: 20150162311Abstract: An integrated circuit (IC) stack device for multiple active vertically stacked cores is disclosed. The IC stack device can include a primary IC having a first set of cores, and a supplementary IC interfaced with the primary IC having a second set of cores. The IC stack device can also include a peripheral component connection located such that the primary IC is between the peripheral component connection and the supplemental IC. The IC stack device can include control logic configured to route, in a primary mode, signals from a particular core of the first set of cores to a data bus. The control logic can route, in a secondary mode, signals from a particular core of the second set of cores to a data bus. The control logic can route, in a dual mode, signals from both of the particular cores to a data bus.Type: ApplicationFiled: December 5, 2013Publication date: June 11, 2015Applicant: International Business Machines CorporationInventors: Gerald K. Bartley, Darryl J. Becker, William P. Hovis
-
Publication number: 20150160685Abstract: An integrated circuit (IC) stack device for multiple active vertically stacked cores is disclosed. The IC stack device can include a primary IC having a first set of cores, and a supplementary IC interfaced with the primary IC having a second set of cores. The IC stack device can also include a peripheral component connection located such that the primary IC is between the peripheral component connection and the supplemental IC. The IC stack device can include control logic configured to route, in a primary mode, signals from a particular core of the first set of cores to a data bus. The control logic can route, in a secondary mode, signals from a particular core of the second set of cores to a data bus. The control logic can route, in a dual mode, signals from both of the particular cores to a data bus.Type: ApplicationFiled: May 15, 2014Publication date: June 11, 2015Applicant: International Business Machines CorporationInventors: Gerald K. Bartley, Darryl J. Becker, William P. Hovis
-
Publication number: 20150162259Abstract: An integrated circuit (IC) stack device for thermal management is disclosed. The IC stack device can include a primary IC having a first set of cores with a ratio of first enabled cores and first disabled cores. The IC stack device can also have a supplementary IC interfaced with the primary IC, and having a second set of cores with a second ratio of second enabled cores and second disabled cores, with the second ratio being less than the first ratio. The integrated circuit stack device can also include a cooling element located such that the primary integrated circuit is between the cooling element and the supplementary integrated circuit. The cooling element can be designed to facilitate heat dissipation of the first and second enabled cores of the primary integrated circuit and the supplementary integrated circuit.Type: ApplicationFiled: December 5, 2013Publication date: June 11, 2015Applicant: International Business Machines CorporationInventors: Gerald K. Bartley, Darryl J. Becker, Philip R. Germann, William P. Hovis
-
Patent number: 9003559Abstract: Apparatus, method and program product detect an attempt to tamper with a microchip by determining that an electrical path comprising one or more connections and a metal plate attached to the backside of a microchip has become disconnected or otherwise altered. A tampering attempt may also be detected in response to the presence of an electrical path that should not be present, as may result from the microchip being incorrectly reconstituted. Actual and/or deceptive paths may be automatically selected and monitored to further confound a reverse engineering attempt.Type: GrantFiled: July 29, 2008Date of Patent: April 7, 2015Assignee: International Business Machines CorporationInventors: Gerald K. Bartley, Darryl J. Becker, Paul E. Dahlen, Philip R. Germann, Andrew B. Maki, Mark O. Maxson, Carl-Otto Nilsen