Patents by Inventor David D. Smith

David D. Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10505068
    Abstract: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: December 10, 2019
    Assignee: SunPower Corporation
    Inventors: Kieran Mark Tracy, David D. Smith, Venkatasubramani Balu, Asnat Masad, Ann Waldhauer
  • Patent number: 10490685
    Abstract: Solar cells having emitter regions composed of wide bandgap semiconductor material are described. In an example, a method includes forming, in a process tool having a controlled atmosphere, a thin dielectric layer on a surface of a semiconductor substrate of the solar cell. The semiconductor substrate has a bandgap. Without removing the semiconductor substrate from the controlled atmosphere of the process tool, a semiconductor layer is formed on the thin dielectric layer. The semiconductor layer has a bandgap at least approximately 0.2 electron Volts (eV) above the bandgap of the semiconductor substrate.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: November 26, 2019
    Assignee: SunPower Corporation
    Inventors: Richard M. Swanson, Marius M. Bunea, Michael C. Johnson, David D. Smith, Yu-Chen Shen, Peter J. Cousins, Tim Dennis
  • Publication number: 20190267505
    Abstract: A method of fabricating a solar cell is disclosed. The method can include forming a dielectric region on a surface of a solar cell structure and forming a metal layer on the dielectric layer. The method can also include configuring a laser beam with a particular shape and directing the laser beam with the particular shape on the metal layer, where the particular shape allows a contact to be formed between the metal layer and the solar cell structure.
    Type: Application
    Filed: May 9, 2019
    Publication date: August 29, 2019
    Inventors: Matthieu Moors, David D. Smith, Gabriel Harley, Taeseok Kim
  • Publication number: 20190267499
    Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell can include a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed over an exposed outer portion of the first polycrystalline silicon emitter region and is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region.
    Type: Application
    Filed: March 4, 2019
    Publication date: August 29, 2019
    Inventors: David D. Smith, Timothy Weidman, Scott Harrington, Venkatasubramani Balu
  • Patent number: 10396230
    Abstract: A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: August 27, 2019
    Assignee: SUNPOWER CORPORATION
    Inventor: David D. Smith
  • Publication number: 20190245099
    Abstract: The formation of solar cell contacts using a laser is described. A method of fabricating a back-contact solar cell includes forming a poly-crystalline material layer above a single-crystalline substrate. The method also includes forming a dielectric material stack above the poly-crystalline material layer. The method also includes forming, by laser ablation, a plurality of contacts holes in the dielectric material stack, each of the contact holes exposing a portion of the poly-crystalline material layer; and forming conductive contacts in the plurality of contact holes.
    Type: Application
    Filed: February 14, 2019
    Publication date: August 8, 2019
    Applicant: SunPower Corporation
    Inventors: Gabriel HARLEY, David D. SMITH, Peter John COUSINS
  • Publication number: 20190207041
    Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type region architectures fabricated using an etch paste, and the resulting solar cells, are described herein. In an example, a solar cell includes a plurality of P-type polycrystalline silicon regions is disposed on a first thin dielectric layer disposed on a back surface of an N-type semiconductor substrate. A plurality of N-type polycrystalline silicon regions is disposed on a second thin dielectric layer disposed in a corresponding one of a plurality of trenches interleaving the plurality of P-type polycrystalline silicon regions in the back surface of the N-type semiconductor substrate. A plurality of conductive contact structures is electrically connected to the P-type polycrystalline silicon regions and the N-type polycrystalline silicon regions.
    Type: Application
    Filed: December 29, 2017
    Publication date: July 4, 2019
    Inventors: Seung Bum RIM, David D. SMITH
  • Publication number: 20190189813
    Abstract: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
    Type: Application
    Filed: February 25, 2019
    Publication date: June 20, 2019
    Inventors: Kieran Mark Tracy, David D. Smith, Venkatasubramani Balu, Asnat Masad, Ann Waldhauer
  • Patent number: 10304972
    Abstract: Solar cells with silicon oxynitride dielectric layers and methods of forming silicon oxynitride dielectric layers for solar cell fabrication are described. For example, an emitter region of a solar cell includes a portion of a substrate having a back surface opposite a light receiving surface. A silicon oxynitride (SiOxNy, 0<x, y) dielectric layer is disposed on the back surface of the portion of the substrate. A semiconductor layer is disposed on the silicon oxynitride dielectric layer.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: May 28, 2019
    Assignee: SunPower Corporation
    Inventors: Michael Shepherd, David D. Smith
  • Patent number: 10290758
    Abstract: A method of fabricating a solar cell is disclosed. The method can include forming a dielectric region on a surface of a solar cell structure and forming a metal layer on the dielectric layer. The method can also include configuring a laser beam with a particular shape and directing the laser beam with the particular shape on the metal layer, where the particular shape allows a contact to be formed between the metal layer and the solar cell structure.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: May 14, 2019
    Assignees: SunPower Corporation, Total Marketing Services
    Inventors: Matthieu Moors, David D. Smith, Gabriel Harley, Taeseok Kim
  • Publication number: 20190131477
    Abstract: Solar cells having emitter regions composed of wide bandgap semiconductor material are described. In an example, a method includes forming, in a process tool having a controlled atmosphere, a thin dielectric layer on a surface of a semiconductor substrate of the solar cell. The semiconductor substrate has a bandgap. Without removing the semiconductor substrate from the controlled atmosphere of the process tool, a semiconductor layer is formed on the thin dielectric layer. The semiconductor layer has a bandgap at least approximately 0.2 electron Volts (eV) above the bandgap of the semiconductor substrate.
    Type: Application
    Filed: December 21, 2018
    Publication date: May 2, 2019
    Inventors: Richard M. Swanson, Marius M. Bunea, Michael C. Johnson, David D. Smith, Yu-Chen Shen, Peter J. Cousins, Tim Dennis
  • Publication number: 20190131463
    Abstract: A method of fabricating a solar cell can include forming a dielectric region on a silicon substrate. The method can also include forming an emitter region over the dielectric region and forming a dopant region on a surface of the silicon substrate. In an embodiment, the method can include heating the silicon substrate at a temperature above 900 degrees Celsius to getter impurities to the emitter region and drive dopants from the dopant region to a portion of the silicon substrate.
    Type: Application
    Filed: December 20, 2018
    Publication date: May 2, 2019
    Inventors: David D. Smith, Tim Dennis, Russelle De Jesus Tabajonda
  • Publication number: 20190109560
    Abstract: In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.
    Type: Application
    Filed: November 20, 2018
    Publication date: April 11, 2019
    Applicant: SunPower Corporation
    Inventors: Richard M. SWANSON, Denis DE CEUSTER, Vikas DESAI, Douglas H. ROSE, David D. SMITH, Neil KAMINAR
  • Publication number: 20190097068
    Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type region architectures, and the resulting solar cells, are described herein. In an example, a solar cell includes an N-type semiconductor substrate having a light-receiving surface and a back surface. A plurality of N-type polycrystalline silicon regions is disposed on a first thin dielectric layer disposed on the back surface of the N-type semiconductor substrate. A plurality of P-type polycrystalline silicon regions is disposed on a second thin dielectric layer disposed in a corresponding one of a plurality of trenches interleaving the plurality of N-type polycrystalline silicon regions in the back surface of the N-type semiconductor substrate.
    Type: Application
    Filed: November 26, 2018
    Publication date: March 28, 2019
    Inventors: David D. Smith, Ann Waldhauer, Venkatasubramani Balu, Kieran Mark Tracy
  • Patent number: 10224442
    Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell can include a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed over an exposed outer portion of the first polycrystalline silicon emitter region and is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: March 5, 2019
    Assignee: SunPower Corporation
    Inventors: David D. Smith, Timothy Weidman, Scott Harrington, Venkatasubramani Balu
  • Patent number: 10217878
    Abstract: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: February 26, 2019
    Assignee: SunPower Corporation
    Inventors: Kieran Mark Tracy, David D. Smith, Venkatasubramani Balu, Asnat Masad, Ann Waldhauer
  • Patent number: 10211349
    Abstract: The formation of solar cell contacts using a laser is described. A method of fabricating a back-contact solar cell includes forming a poly-crystalline material layer above a single-crystalline substrate. The method also includes forming a dielectric material stack above the poly-crystalline material layer. The method also includes forming, by laser ablation, a plurality of contacts holes in the dielectric material stack, each of the contact holes exposing a portion of the poly-crystalline material layer; and forming conductive contacts in the plurality of contact holes.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: February 19, 2019
    Assignee: SunPower Corporation
    Inventors: Gabriel Harley, David D. Smith, Peter John Cousins
  • Publication number: 20190044015
    Abstract: A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.
    Type: Application
    Filed: October 10, 2018
    Publication date: February 7, 2019
    Applicant: SunPower Corporation
    Inventor: David D. SMITH
  • Publication number: 20190044006
    Abstract: A solar cell is fabricated by etching one or more of its layers without substantially etching another layer of the solar cell. In one embodiment, a copper layer in the solar cell is etched without substantially etching a topmost metallic layer comprising tin. For example, an etchant comprising sulfuric acid and hydrogen peroxide may be employed to etch the copper layer selective to the tin layer. A particular example of the aforementioned etchant is a Co-Bra Etch® etchant modified to comprise about 1% by volume of sulfuric acid, about 4% by volume of phosphoric acid, and about 2% by volume of stabilized hydrogen peroxide. In one embodiment, an aluminum layer in the solar cell is etched without substantially etching the tin layer. For example, an etchant comprising potassium hydroxide may be employed to etch the aluminum layer without substantially etching the tin layer.
    Type: Application
    Filed: October 8, 2018
    Publication date: February 7, 2019
    Applicant: SunPower Corporation
    Inventors: Douglas H. ROSE, Pongsthorn URALWONG, David D. SMITH
  • Publication number: 20190019900
    Abstract: Approaches for the foil-based metallization of solar cells and the resulting solar cells are described. In an example, a solar cell includes a substrate. A plurality of alternating N-type and P-type semiconductor regions is disposed in or above the substrate. A conductive contact structure is disposed above the plurality of alternating N-type and P-type semiconductor regions. The conductive contact structure includes a plurality of metal seed material regions providing a metal seed material region disposed on each of the alternating N-type and P-type semiconductor regions. A metal foil is disposed on the plurality of metal seed material regions, the metal foil having anodized portions isolating metal regions of the metal foil corresponding to the alternating N-type and P-type semiconductor regions.
    Type: Application
    Filed: August 30, 2018
    Publication date: January 17, 2019
    Inventors: Gabriel Harley, Taeseok Kim, Richard Hamilton Sewell, Michael Morse, David D. Smith, Matthieu Moors, Jens-Dirk Moschner