Abstract: Methods for forming interconnects in blind holes and microelectronic workpieces having such interconnects are disclosed herein. One aspect of the invention is directed toward a method for manufacturing a microelectronic workpiece having microelectronic dies with integrated circuits and terminals electrically coupled to the integrated circuits. In one embodiment, the method includes forming a blind hole in the workpiece. The blind hole extends from a first exterior side of the workpiece to an intermediate depth in the workpiece. The method continues by forming a vent in the workpiece. The vent is in fluid communication with the blind hole. The method further includes constructing an electrically conductive interconnect in at least a portion of the blind hole.

Abstract: A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an internal signal transmission system for the component, and allow the circuit side of the secondary die to be bonded to the back side of the base die. The component also includes an array of terminal contacts on the circuit side of the base die in electrical communication with the conductive vias. The component can also include an encapsulant on the back side of the base die, which substantially encapsulates the secondary die, and a polymer layer on the circuit side of the base die which functions as a protective layer, a rigidifying member and a stencil for forming the terminal contacts. A method for fabricating the component includes the step of bonding singulated secondary dice to base dice on a base wafer, or bonding a secondary wafer to the base wafer, or bonding singulated secondary dice to singulated base dice.

Abstract: A method for fabricating semiconductor components and interconnects includes the steps of providing a substrate, such as a semiconductor die, forming external contacts on opposing sides of the substrate by laser drilling vias through the substrate, and forming conductive members in the vias. The conductive members include enlarged terminal portions that are covered with a non-oxidizing metal. The method can be used to fabricate stackable semiconductor packages having integrated circuits in electrical communication with the external contacts. The method can also be used to fabricate interconnects for electrically engaging packages, dice and wafers for testing or for constructing electronic assemblies.

Abstract: A method for enhancing temporary solder ball connection comprises the application of thermal energy to the solder balls, heating them to a submelting “softening” temperature, whereby the compression force required to connect all balls in a BGA is achieved at much reduced force, avoiding damage to the package, insert, substrate and support apparatus. Several forms of heating apparatus, and temperature measuring apparatus are disclosed.

Abstract: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.

Abstract: Microelectronic imaging devices and methods of packaging microelectronic imaging devices are disclosed herein. In one embodiment, a microelectronic imaging device includes a microelectronic die having an integrated circuit, an image sensor electrically coupled to the integrated circuit, and a plurality of bond-pads electrically coupled to the integrated circuit. The imaging device further includes a cover over the image sensor and a plurality of interconnects in and/or on the cover that are electrically coupled to corresponding bond-pads of the die. The interconnects provide external electrical contacts for the bond-pads of the die. The interconnects can extend through the cover or along a surface of the cover.

Abstract: Methods and apparatuses for transferring heat from stacked microfeature devices are disclosed herein. In one embodiment, a microfeature device assembly comprises a support member having terminals and a first microelectronic die having first external contacts carried by the support member. The first external contacts are operatively coupled to the terminals on the support member. The assembly also includes a second microelectronic die having integrated circuitry and second external contacts electrically coupled to the first external contacts. The first die is between the support member and the second die. The assembly can further include a heat transfer unit between the first die and the second die. The heat transfer unit includes a first heat transfer portion, a second heat transfer portion, and a gap between the first and second heat transfer portions such that the first external contacts and the second external contacts are aligned with the gap.

Abstract: A contactor card assembly for use with a semiconductor substrate. An upper keeper plate and a lower keeper plate each include a number of conductive pins extending therethrough, situated in vias filled with an elastomeric material and extending beyond the keeper plates to contact a substrate for testing. An intermediate keeper plate is situated between the upper and lower keeper plates and includes conductive pivot bars in channels filled with elastomeric material. Each conductive pin contacts a pivot bar on one side thereof to electrically communicate with a corresponding pin on the opposite side. Under compression, variations in the height of contacts on the substrate under test are adjusted for by the movement of the pins and pivoting of the pivot bar in the elastomeric material. Methods and process for creating the keeper plates and semiconductor and testing assemblies are also included in the present invention.

Abstract: Methods of packaging microelectronic imagers and packaged microelectronic imagers. An embodiment of such a method can include providing an imager workpiece having a plurality of imager dies arranged in a die pattern and providing a cover substrate through which a desired radiation can propagate. The imager dies include image sensors and integrated circuitry coupled to the image sensors. The method further includes providing a spacer having a web that includes an adhesive and has openings arranged to be aligned with the image sensors. For example, the web can be a film having an adhesive coating, or the web itself can be a layer of adhesive. The method continues by assembling the imager workpiece with the cover substrate such that (a) the spacer is between the imager workpiece and the cover substrate, and (b) the openings are aligned with the image sensors. The attached web is not cured after the imager workpiece and the cover substrate have both been adhered to the web.

Abstract: Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external contacts operatively coupled to the image sensors. The microelectronic imager assembly further comprises optics supports superimposed relative to the imaging dies. The optics supports can be directly on the substrate or on a cover over the substrate. Individual optics supports can have (a) an opening aligned with one of the image sensors, and (b) a bearing element at a reference distance from the image sensor. The microelectronic imager assembly can further include optical devices mounted or otherwise carried by the optics supports.

Abstract: Materials for use in programmed material consolidation processes, such as stereolithography, include a selectively consolidatable material and a filler. The filler may be included to optimize one or more physical properties of the material. The material is both selectively consolidatable and includes the desired physical property. Examples of physical properties that may optimized in a selectively consolidatable compound by mixing a filler material with a selectively consolidatable material include, without limitation, coefficient of thermal expansion, rigidity, fracture toughness, thermal stability, and strength.

Abstract: A fabrication substrate for use in fabricating integrated circuits and other electronic devices includes a substrate that comprises semiconductor material, as well as a support structure on an active surface of the substrate. The support structure is located at or adjacent to an entire outer peripheral edge of the substrate. The support structure may be configured as a ring-like element or as a member which substantially covers an active surface of the semiconductor substrate and forms a protective structure over each semiconductor device carried by the active surface.

Abstract: A support structure for use with a semiconductor substrate in thinning, or backgrinding, thereof, as well as during post-thinning processing of the semiconductor substrate includes a portion which extends substantially along and around an outer periphery of the semiconductor substrate to impart the thinned semiconductor substrate with rigidity. The support structure may be configured as a ring or as a member which substantially covers an active surface of the semiconductor substrate and forms a protective structure over each semiconductor device carried by the active surface.

Abstract: Methods of manufacturing semiconductor devices using permanent or temporary polymer layers having apertures to expose contact pads and cover the active surfaces of the semiconductor devices.

Abstract: Methods for optimizing physical properties of selectively consolidatable materials, such as photoimageable materials, include mixing filler materials with the selectively consolidatable materials. The resulting compound has the desired physical property, as well as selective consolidatability. Examples of physical properties that may optimized in a selectively consolidatable compound by mixing a filler material with a selectively consolidatable material include, without limitation, coefficient of thermal expansion, rigidity, fracture toughness, thermal stability, and strength.

Abstract: Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In one embodiment, a method comprises providing a microelectronic substrate having a front side and a backside. The substrate has a microelectronic die including an integrated circuit and a terminal operatively coupled to the integrated circuit. The method also includes forming a passage at least partially through the substrate and having an opening at the front side and/or backside of the substrate. The method further includes sealing the opening with a conductive cap that closes one end of the passage while another end of the passage remains open. The method then includes filling the passage with a conductive material.

Abstract: Microelectronic imagers and methods for packaging microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging unit can include a microelectronic die, an image sensor, an integrated circuit electrically coupled to the image sensor, and a bond-pad electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the die and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad with conductive fill material at least partially disposed in the passage. An electrically conductive support member is carried by and projects from the bond-pad. A cover over the image sensor is coupled to the support member.

Abstract: Polymerized materials for forming the underfill and encapsulation structures for semiconductor package are disclosed. A filler constituent, such as boron nitride, silicates, elemental metals, or alloys, may be added to a liquid photopolymer resin to tailor the physical properties thereof upon curing. The filler constituents may be employed to alter the coefficient of thermal expansion, thermal conductivity, or electrical conductivity of the polymerized material. A number of different embodiments are disclosed that employ the above materials in selected regions of the underfill and encapsulation structures of the semiconductor package. The polymerized materials may also be used to form support structures and covers for optically interactive semiconductor devices. Methods for forming the above structures using stereolithography are also disclosed.

Abstract: A compliant contact pin assembly and a contactor card system are provided. The compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin compliantly held suspended within the substrate by a compliant coupling structure. The suspension within the substrate results in a compliant deflection orthogonal to the plane of the substrate. The contact pin assembly is formed by generally thinning the substrate around the contact pin location and then specifically thinning the substrate immediately around the contact pin location for forming a void. The contact pin is compliantly coupled, in one embodiment by compliant coupling material, and in another embodiment by compliantly flexible portions of the substrate.

Abstract: Microelectronic imagers with prefabricated housings and methods of packaging microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imager can include a microelectronic die, an image sensor, and an integrated circuit operatively coupled to the integrated circuit. The microelectronic imager also includes an optic unit having an optic member. The microelectronic imager further includes a prefabricated housing having a first mounting site and a second mounting site. The die is seated within the housing at the first mounting site and the optics unit is seated within the housing at the second mounting site in a fixed, preset position in which the optic member is situated at a desired location relative to the image sensor.