Patents by Inventor David J. McElroy

David J. McElroy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9633714
    Abstract: Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices couple or decouple bias voltage from corresponding digit lines coupled to the sense amplifiers. By coupling and decoupling voltage from the digit lines, the time interval between refresh operations can be increased.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: April 25, 2017
    Assignee: Micron Technology, Inc.
    Inventors: David J. McElroy, Stephen L. Casper
  • Publication number: 20140307516
    Abstract: Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices couple or decouple bias voltage from corresponding digit lines coupled to the sense amplifiers. By coupling and decoupling voltage from the digit lines, the time interval between refresh operations can be increased.
    Type: Application
    Filed: June 26, 2014
    Publication date: October 16, 2014
    Inventors: David J. McElroy, Stephen L. Casper
  • Patent number: 8767496
    Abstract: Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices couple or decouple bias voltage from corresponding digit lines coupled to the sense amplifiers. By coupling and decoupling voltage from the digit lines, the time interval between refresh operations can be increased.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: July 1, 2014
    Assignee: Micron Technology, Inc.
    Inventors: David J. McElroy, Stephen L. Casper
  • Publication number: 20110157962
    Abstract: Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices couple or decouple bias voltage from corresponding digit lines coupled to the sense amplifiers. By coupling and decoupling voltage from the digit lines, the time interval between refresh operations can be increased.
    Type: Application
    Filed: March 2, 2011
    Publication date: June 30, 2011
    Applicant: Micron Technology, Inc.
    Inventors: DAVID J. MCELROY, Stephen L. Casper
  • Patent number: 7903488
    Abstract: Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices couple or decouple bias voltage from corresponding digit lines coupled to the sense amplifiers. By coupling and decoupling voltage from the digit lines, the time interval between refresh operations can be increased.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: March 8, 2011
    Assignee: Micron Technology, Inc.
    Inventors: David J. McElroy, Stephen L. Casper
  • Publication number: 20090323448
    Abstract: Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices couple or decouple bias voltage from corresponding digit lines coupled to the sense amplifiers. By coupling and decoupling voltage from the digit lines, the time interval between refresh operations can be increased.
    Type: Application
    Filed: July 7, 2009
    Publication date: December 31, 2009
    Applicant: Micron Technology, Inc.
    Inventors: David J. McElroy, Stephen L. Casper
  • Patent number: 7567477
    Abstract: Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices couple or decouple bias voltage from corresponding digit lines coupled to the sense amplifiers. By coupling and decoupling voltage from the digit lines, the time interval between refresh operations can be increased.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: July 28, 2009
    Assignee: Micron Technology, Inc.
    Inventors: David J McElroy, Stephen L Casper
  • Patent number: 7297915
    Abstract: Imaging arrays typically include thousands or millions of photodetectors that convert sensed light into corresponding electric signals, which are ultimately converted into digital image signals for recording or viewing. One problem with conventional imaging arrays concerns faulty photodetectors, which produce erroneous image signals that ultimately degrade the quality of resulting images. Accordingly, the present inventors devised new imaging arrays including redundant photodetectors to compensate for faulty ones. One exemplary embodiment includes photodetectors that are substantially smaller than conventional photodetectors and that are arranged into two or more groups, with the photodetectors in each group coupled to produce a single group image signal. If the group image signal for a group falls below some threshold level indicative of a defective or malfunctioning photodetector, the group image signal is amplified to compensate for the loss.
    Type: Grant
    Filed: June 15, 2004
    Date of Patent: November 20, 2007
    Assignee: Micron Technology, Inc.
    Inventors: David J. McElroy, Eugene H. Cloud
  • Patent number: 7129457
    Abstract: Imaging arrays typically include thousands or millions of photodetectors that convert sensed light into corresponding electric signals, which are ultimately converted into digital image signals for recording or viewing. One problem with conventional imaging arrays concerns faulty photodetectors, which produce erroneous image signals that ultimately degrade the quality of resulting images. Accordingly, the present inventors devised new imaging arrays including redundant photodetectors to compensate for faulty ones. One exemplary embodiment includes photodetectors that are substantially smaller than conventional photodetectors and that are arranged into two or more groups, with the photodetectors in each group coupled to produce a single group image signal. If the group image signal for a group falls below some threshold level indicative of a defective or malfunctioning photodetector, the group image signal is amplified to compensate for the loss.
    Type: Grant
    Filed: June 15, 2004
    Date of Patent: October 31, 2006
    Assignee: Micron Technology, Inc.
    Inventors: David J. McElroy, Eugene H. Cloud
  • Patent number: 7072235
    Abstract: Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices couple or decouple bias voltage from corresponding digit lines coupled to the sense amplifiers. By coupling and decoupling voltage from the digit lines, the time interval between refresh operations can be increased.
    Type: Grant
    Filed: June 23, 2004
    Date of Patent: July 4, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Stephen L Casper, David J McElroy
  • Publication number: 20040228195
    Abstract: Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices couple or decouple bias voltage from corresponding digit lines coupled to the sense amplifiers. By coupling and decoupling voltage from the digit lines, the time interval between refresh operations can be increased.
    Type: Application
    Filed: June 23, 2004
    Publication date: November 18, 2004
    Applicant: Micron Technology, Inc.
    Inventors: David J. McElroy, Stephen L. Casper
  • Publication number: 20040222355
    Abstract: Imaging arrays typically include thousands or millions of photodetectors that convert sensed light into corresponding electric signals, which are ultimately converted into digital image signals for recording or viewing. One problem with conventional imaging arrays concerns faulty photodetectors, which produce erroneous image signals that ultimately degrade the quality of resulting images. Accordingly, the present inventors devised new imaging arrays including redundant photodetectors to compensate for faulty ones. One exemplary embodiment includes photodetectors that are substantially smaller than conventional photodetectors and that are arranged into two or more groups, with the photodetectors in each group coupled to produce a single group image signal. If the group image signal for a group falls below some threshold level indicative of a defective or malfunctioning photodetector, the group image signal is amplified to compensate for the loss.
    Type: Application
    Filed: June 15, 2004
    Publication date: November 11, 2004
    Applicant: Micron Technology, Inc.
    Inventors: David J. McElroy, Eugene H. Cloud
  • Publication number: 20040222356
    Abstract: Imaging arrays typically include thousands or millions of photodetectors that convert sensed light into corresponding electric signals, which are ultimately converted into digital image signals for recording or viewing. One problem with conventional imaging arrays concerns faulty photodetectors, which produce erroneous image signals that ultimately degrade the quality of resulting images. Accordingly, the present inventors devised new imaging arrays including redundant photodetectors to compensate for faulty ones. One exemplary embodiment includes photodetectors that are substantially smaller than conventional photodetectors and that are arranged into two or more groups, with the photodetectors in each group coupled to produce a single group image signal. If the group image signal for a group falls below some threshold level indicative of a defective or malfunctioning photodetector, the group image signal is amplified to compensate for the loss.
    Type: Application
    Filed: June 15, 2004
    Publication date: November 11, 2004
    Applicant: Micron Technology, Inc.
    Inventors: David J. McElroy, Eugene H. Cloud
  • Patent number: 6757202
    Abstract: Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices couple or decouple bias voltage from corresponding digit lines coupled to the sense amplifiers. By coupling and decoupling voltage from the digit lines, the time interval between refresh operations can be increased.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: June 29, 2004
    Assignee: Micron Technology, Inc.
    Inventors: David J. McElroy, Stephen L. Casper
  • Patent number: 6756576
    Abstract: Imaging arrays are electronic devices that sense light and output electrical signals representative of the sensed light. An imaging array comprises thousands or millions of photodetectors that convert sensed light into corresponding electric signals, which are ultimately converted into digital image signals for recording or viewing. One problem with conventional imaging arrays concerns defective or malfunctioning photodetectors. Defective photodetectors typically result in erroneous image signals that ultimately degrade the quality of resulting images. Accordingly, the present inventors devised new imaging arrays including redundant photodetectors to compensate for defective photodetectors. One exemplary embodiment includes one or more photodetectors that are substantially smaller than conventional photodetectors, for example about 10 or 25 square microns.
    Type: Grant
    Filed: August 30, 2000
    Date of Patent: June 29, 2004
    Assignee: Micron Technology, Inc.
    Inventors: David J. McElroy, Eugene H. Cloud
  • Publication number: 20040042276
    Abstract: Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices couple or decouple bias voltage from corresponding digit lines coupled to the sense amplifiers. By coupling and decoupling voltage from the digit lines, the time interval between refresh operations can be increased.
    Type: Application
    Filed: August 29, 2002
    Publication date: March 4, 2004
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: David J. McElroy, Stephen L. Casper
  • Patent number: 6456535
    Abstract: Structures and methods involving n-channel flash memories with an ultrathin tunnel oxide thickness, have been provided. Both the write and erase operations are performed by tunneling. According to the teachings of the present invention, the n-channel flash memory cell with thin tunnel oxides will operate on a dynamic basis. The stored data can be refreshed every few seconds as necessary. However, the write and erase operations will however now be orders of magnitude faster than traditional n-channel flash memory and the cell provides a large gain. The present invention further provides structures and methods for n-channel floating gate transistors which avoid n-channel threshold voltage shifts and achieve source side tunneling erase. The n-channel memory cell structure includes a floating gate separated from a channel region by an oxide layer of less than 50 Angstroms (Å).
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: September 24, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Leonard Forbes, Luan C. Tran, Alan R. Reinberg, Joseph E. Geusic, Kie Y. Ahn, Paul A. Farrar, Eugene H. Cloud, David J. McElroy
  • Patent number: 6356500
    Abstract: A memory device and method employing a scheme for reduced power consumption is disclosed. By dividing a memory array sector into memory sub arrays, the memory device can provide power to memory sub arrays that need to be powered up or, in the alternative, powered down. This reduces the power consumption and heat generation associated with high speed and high capacity memory devices.
    Type: Grant
    Filed: August 23, 2000
    Date of Patent: March 12, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Eugene H. Cloud, Kie Y. Ahn, Leonard Forbes, Paul A. Farrar, Kevin G. Donohoe, Alan R. Reinberg, David J. Mcelroy, Luan C. Tran, Joseph Geusic
  • Publication number: 20010053096
    Abstract: Structures and methods involving n-channel flash memories with an ultrathin tunnel oxide thickness, have been provided. Both the write and erase operations are performed by tunneling. According to the teachings of the present invention, the n-channel flash memory cell with thin tunnel oxides will operate on a dynamic basis. The stored data can be refreshed every few seconds as necessary. However, the write and erase operations will however now be orders of magnitude faster than traditional n-channel flash memory and the cell provides a large gain. The present invention further provides structures and methods for n-channel floating gate transistors which avoid n-channel threshold voltage shifts and achieve source side tunneling erase. The n-channel memory cell structure includes a floating gate separated from a channel region by an oxide layer of less than 50 Angstroms (Å).
    Type: Application
    Filed: June 15, 2001
    Publication date: December 20, 2001
    Applicant: Micron Technology, Inc.
    Inventors: Leonard Forbes, Luan C. Tran, Alan R. Reinberg, Joseph E. Geusic, Kie Y. Ahn, Paul A. Farrar, Eugene H. Cloud, David J. McElroy
  • Patent number: 6249460
    Abstract: Structures and methods involving n-channel flash memories with an ultrathin tunnel oxide thickness, have been provided. Both the write and erase operations are performed by tunneling. According to the teachings of the present invention, the n-channel flash memory cell with thin tunnel oxides will operate on a dynamic basis. The stored data can be refreshed every few seconds as necessary. However, the write and erase operations will however now be orders of magnitude faster than traditional n-channel flash memory and the cell provides a large gain. The present invention further provides structures and methods for n-channel floating gate transistors which avoid n-channel threshold voltage shifts and achieve source side tunneling erase. The n-channel memory cell structure includes a floating gate separated from a channel region by an oxide layer of less than 50 Angstroms (Å).
    Type: Grant
    Filed: February 28, 2000
    Date of Patent: June 19, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Leonard Forbes, Luan C. Tran, Alan R. Reinberg, Joseph E. Geusic, Kie Y. Ahn, Paul A. Farrar, Eugene H. Cloud, David J. McElroy