Patents by Inventor David P. Stumbo

David P. Stumbo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7595528
    Abstract: Methods and apparatuses for nanoenabled memory devices and anisotropic charge carrying arrays are described. In an aspect, a memory device includes a substrate, a source region of the substrate, and a drain region of the substrate. A population of nanoelements is deposited on the substrate above a channel region, the population of nanolements in one embodiment including metal quantum dots. A tunnel dielectric layer is formed on the substrate overlying the channel region, and a metal migration barrier layer is deposited over the dielectric layer. A gate contact is formed over the thin film of nanoelements. The nanoelements allow for reduced lateral charge transfer. The memory device may be a single or multistate memory device.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: September 29, 2009
    Assignee: Nanosys, Inc.
    Inventors: Xiangfeng Duan, Calvin Y. H. Chow, David L. Heald, Chunming Niu, J. Wallace Parce, David P. Stumbo
  • Publication number: 20090230380
    Abstract: The present invention relates to methods of forming substrate elements, including semiconductor elements such as nanowires, transistors and other structures, as well as the elements formed by such methods.
    Type: Application
    Filed: December 9, 2008
    Publication date: September 17, 2009
    Applicant: NANOSYS, Inc.
    Inventors: Francisco LEON, Francesco LEMMI, Jeffrey MILLER, David DUTTON, David P. STUMBO
  • Patent number: 7569503
    Abstract: Embodiments of the present invention are provided for improved contact doping and annealing systems and processes. In embodiments, a plasma ion immersion implantation (PIII) process is used for contact doping of nanowires and other nanoelement based thin film devices. According to further embodiments of the present invention, pulsed laser annealing using laser energy at relatively low laser fluences below about 100 mJ/cm2 (e.g., less than about 50 mJ/cm2, e.g., between about 2 and 18 mJ/cm2) is used to anneal nanowire and other nanoelement-based devices on substrates, such as low temperature flexible substrates, e.g., plastic substrates.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: August 4, 2009
    Assignee: Nanosys, Inc.
    Inventors: Yaoling Pan, David P. Stumbo
  • Patent number: 7468315
    Abstract: The present invention relates to a system and process for producing a nanowire-material composite. A substrate having nanowires attached to a portion of at least one surface is provided. A material is deposited over the portion to form the nanowire-material composite. The process further optionally includes separating the nanowire-material composite from the substrate to form a freestanding nanowire-material composite. The freestanding nanowire material composite is optionally further processed into an electronic substrate. A variety of electronic substrates can be produced using the methods described herein. For example, a multi-color light-emitting diode can be produced from multiple, stacked layers of nanowire-material composites, each composite layer emitting light at a different wavelength.
    Type: Grant
    Filed: September 14, 2005
    Date of Patent: December 23, 2008
    Assignee: Nanosys, Inc.
    Inventors: Mihai A. Buretea, Jian Chen, Calvin Y. H. Chow, Chunming Niu, Yaoling Pan, J. Wallace Parce, Linda T. Romano, David P. Stumbo
  • Patent number: 7427328
    Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: September 23, 2008
    Assignee: Nanosys, Inc.
    Inventors: Xiangfeng Duan, Chunming Niu, Stephen A. Empedocles, Linda T. Romano, Jian Chen, Vijendra Sahi, Lawrence A. Bock, David P. Stumbo, J. Wallace Parce, Jay L. Goldman
  • Publication number: 20080224123
    Abstract: The present invention provides methods and systems for nanowire alignment and deposition. Energizing (e.g., an alternating current electric field) is used to align and associate nanowires with electrodes. By modulating the energizing, the nanowires are coupled to the electrodes such that they remain in place during subsequent wash and drying steps. The invention also provides methods for transferring nanowires from one substrate to another in order to prepare various device substrates. The present invention also provides methods for monitoring and controlling the number of nanowires deposited at a particular electrode pair, as well as methods for manipulating nanowires in solution.
    Type: Application
    Filed: November 9, 2007
    Publication date: September 18, 2008
    Inventors: Samuel Martin, Xiangfeng Duan, Katsumasa Fujii, James M. Hamilton, Hiroshi Iwata, Francisco Leon, Jeffrey Miller, Tetsu Negishi, Hiroshi Ohki, J. Wallace Parce, Cheri X.Y. Pereira, Paul John Schuele, Akihide Shibata, David P. Stumbo, Yasunobu Okada
  • Publication number: 20080150165
    Abstract: Methods, systems, and apparatuses for annealing semiconductor nanowires and for fabricating electrical devices are provided. Nanowires are deposited on a substrate. A plurality of electrodes is formed. The nanowires are in electrical contact with the plurality of electrodes. The nanowires are doped. A polarized laser beam is applied to the nanowires to anneal at least a portion of the nanowires. The nanowires may be aligned substantially parallel to an axis. The laser beam may be polarized in various ways to modify absorption of radiation of the applied laser beam by the nanowires. For example, the laser beam may be polarized in a direction substantially parallel to the axis or substantially perpendicular to the axis to enable different nanowire absorption profiles.
    Type: Application
    Filed: November 7, 2007
    Publication date: June 26, 2008
    Applicant: NANOSYS, INC.
    Inventors: David P. Stumbo, Yaoling Pan, Costas P. Grigoropoulos, Nipun Misra
  • Publication number: 20080128688
    Abstract: The present invention is directed to thin film transistors using nanowires (or other nanostructures such as nanoribbons, nanotubes and the like) incorporated in and/or disposed proximal to conductive polymer layer(s), and production scalable methods to produce such transistors. In particular, a composite material comprising a conductive polymeric material such as polyaniline (PANI) or polypyrrole (PPY) and one or more nanowires incorporated therein is disclosed.
    Type: Application
    Filed: January 18, 2008
    Publication date: June 5, 2008
    Applicant: NANOSYS, INC.
    Inventors: Yaoling Pan, Francisco Leon, David P. Stumbo
  • Patent number: 7382017
    Abstract: Methods and apparatuses for nanoenabled memory devices and anisotropic charge carrying arrays are described. In an aspect, a memory device includes a substrate, a source region of the substrate, and a drain region of the substrate. A population of nanoelements is deposited on the substrate above a channel region, the population of nanolements in one embodiment including metal quantum dots. A tunnel dielectric layer is formed on the substrate overlying the channel region, and a metal migration barrier layer is deposited over the dielectric layer. A gate contact is formed over the thin film of nanoelements. The nanoelements allow for reduced lateral charge transfer. The memory device may be a single or multistate memory device.
    Type: Grant
    Filed: April 3, 2007
    Date of Patent: June 3, 2008
    Assignee: Nanosys, Inc
    Inventors: Xiangfeng Duan, Calvin Y. H. Cho, David L. Heald, Chunming Niu, J. Wallace Parce, David P. Stumbo
  • Patent number: 7365395
    Abstract: Artificial dielectrics using nanostructures, such as nanowires, are disclosed. In embodiments, artificial dielectrics using other nanostructures, such as nanorods, nanotubes or nanoribbons and the like are disclosed. The artificial dielectric includes a dielectric material with a plurality of nanowires (or other nanostructures) embedded within the dielectric material. Very high dielectric constants can be achieved with an artificial dielectric using nanostructures. The dielectric constant can be adjusted by varying the length, diameter, carrier density, shape, aspect ratio, orientation and density of the nanostructures. Additionally, a controllable artificial dielectric using nanostructures, such as nanowires, is disclosed in which the dielectric constant can be dynamically adjusted by applying an electric field to the controllable artificial dielectric. A wide range of electronic devices can use artificial dielectrics with nanostructures to improve performance.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: April 29, 2008
    Assignee: Nanosys, Inc.
    Inventors: David P. Stumbo, Stephen A. Empedocles, Francisco Leon, J. Wallace Parce
  • Patent number: 7345307
    Abstract: The present invention is directed to thin film transistors using nanowires (or other nanostructures such as nanoribbons, nanotubes and the like) incorporated in and/or disposed proximal to conductive polymer layer(s), and production scalable methods to produce such transistors. In particular, a composite material comprising a conductive polymeric material such as polyaniline (PANI) or polypyrrole (PPY) and one or more nanowires incorporated therein is disclosed.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: March 18, 2008
    Assignee: Nanosys, Inc.
    Inventors: Yaoling Pan, Francisco Leon, David P. Stumbo
  • Patent number: 7339184
    Abstract: The present invention is directed to methods to harvest, integrate and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides methods for harvesting nanowires that include selectively etching a sacrificial layer placed on a nanowire growth substrate to remove nanowires. The invention also provides methods for integrating nanowires into electronic devices that include placing an outer surface of a cylinder in contact with a fluid suspension of nanowires and rolling the nanowire coated cylinder to deposit nanowires onto a surface. Methods are also provided to deposit nanowires using an ink-jet printer or an aperture to align nanowires. Additional aspects of the invention provide methods for preventing gate shorts in nanowire based transistors. Additional methods for harvesting and integrating nanowires are provided.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: March 4, 2008
    Assignee: Nanosys, Inc
    Inventors: Linda T. Romano, Jian Chen, Xiangfeng Duan, Robert S. Dubrow, Stephen A. Empedocles, Jay L. Goldman, James M. Hamilton, David L. Heald, Francesco Lemmi, Chunming Niu, Yaoling Pan, George Pontis, Vijendra Sahi, Erik C. Scher, David P. Stumbo, Jeffery A. Whiteford
  • Publication number: 20080023693
    Abstract: Methods and systems for depositing nanomaterials onto a receiving substrate and optionally for depositing those materials in a desired orientation, that comprise providing nanomaterials on a transfer substrate and contacting the nanomaterials with an adherent material disposed upon a surface or portions of a surface of a receiving substrate. Orientation is optionally provided by moving the transfer and receiving substrates relative to each other during the transfer process.
    Type: Application
    Filed: September 14, 2005
    Publication date: January 31, 2008
    Applicant: Nanosys, Inc.
    Inventors: Robert S. Dubrow, Linda T. Romano, David P. Stumbo
  • Patent number: 7265829
    Abstract: A reflective light imaging system for use in high-throughput screening of samples disposed in multiple-well plates. The system can include a set of mirrors and lenses. The first mirror has a central aperture through which light from the object passes. The first mirror has a concave reflective surface that faces the image plane. The next element is a second mirror with a convex reflective surface. The system can include an aberration corrective system positioned between the second mirror and the image plane, and an optical sensor near the image plane. Light from an object passes through the central aperture of the first mirror and is reflected off the convex surface of the second mirror. The light then strikes the reflective surface of the first mirror. The light from the first mirror is then collected by the aberration correction system and transmitted toward the image plane.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: September 4, 2007
    Assignee: Molecular Devices Corporation
    Inventors: Wu Jiang, Todd E. French, David P. Stumbo
  • Patent number: 7233041
    Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: June 19, 2007
    Assignee: Nanosys, Inc.
    Inventors: Xiangfeng Duan, Chunming Niu, Stephen A. Empedocles, Linda T. Romano, Jian Chen, Vijendra Sahi, Lawrence A. Bock, David P. Stumbo, Parce J. Wallace, Jay L. Goldman
  • Patent number: 7135728
    Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: November 14, 2006
    Assignee: Nanosys, Inc.
    Inventors: Xiangfeng Duan, Chunming Niu, Stephen A. Empedocles, Linda T. Romano, Jian Chen, Vijendra Sahi, Lawrence A. Bock, David P. Stumbo, Parce J. Wallace, Jay L. Goldman
  • Patent number: 7083104
    Abstract: Macroelectronic substrate materials incorporating nanowires are described. These are used to provide underlying electronic elements (e.g., transistors and the like) for a variety of different applications. Methods for making the macroelectronic substrate materials are disclosed. One application is for transmission an reception of RF signals in small, lightweight sensors. Such sensors can be configured in a distributed sensor network to provide security monitoring. Furthermore, a method and apparatus for a radio frequency identification (RFID) tag is described. The RFID tag includes an antenna and a beam-steering array. The beam-steering array includes a plurality of tunable elements. A method and apparatus for an acoustic cancellation device and for an adjustable phase shifter that are enabled by nanowires are also described.
    Type: Grant
    Filed: September 14, 2005
    Date of Patent: August 1, 2006
    Assignee: Nanosys, Inc.
    Inventors: Stephen A. Empedocles, David P. Stumbo, Chunming Niu, Xiangfeng Duan
  • Patent number: 7064372
    Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: June 20, 2006
    Assignee: Nanosys, Inc.
    Inventors: Xiangfeng Duan, Chunming Niu, Stephen Empedocles, Linda T. Romano, Jian Chen, Vijendra Sahi, Lawrence A. Bock, David P. Stumbo, J. Wallace Parce, Jay L. Goldman
  • Patent number: 7051945
    Abstract: Macroelectronic substrate materials incorporating nanowires are described. These are used to provide underlying electronic elements (e.g., transistors and the like) for a variety of different applications. Methods for making the macroelectronic substrate materials are disclosed. One application is for transmission an reception of RF signals in small, lightweight sensors. Such sensors can be configured in a distributed sensor network to provide security monitoring. Furthermore, a method and apparatus for a radio frequency identification (RFID) tag is described. The RFID tag includes an antenna and a beam-steering array. The beam-steering array includes a plurality of tunable elements. A method and apparatus for an acoustic cancellation device and for an adjustable phase shifter that are enabled by nanowires are also described.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: May 30, 2006
    Assignee: Nanosys, Inc
    Inventors: Stephen Empedocles, David P. Stumbo, Chunming Niu, Xianfeng Duan
  • Patent number: 6992761
    Abstract: Broad-range light-detection systems, including components and methods of use thereof. These systems may include apparatus and methods for detecting light with increased speed and/or detection efficiency, particularly in applications involving repeated analysis of the same sample and/or successive analysis of different samples, and particularly when the sample or samples have a wide range of light intensities. These systems also may include apparatus and methods for detecting light with increased accuracy over a broad range of intensities. These systems also may include vapparatus and methods for automatically scaling detection range to improve detection based on the intensity of the detected light.
    Type: Grant
    Filed: May 22, 2003
    Date of Patent: January 31, 2006
    Assignee: Molecular Devices Corporation
    Inventors: Douglas N. Modlin, David P. Stumbo, Rick V. Stellmacher, Jonathan F. Petersen, Todd E. French