Patents by Inventor David Piede

David Piede has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090162013
    Abstract: A plasma-based etching process is used to specifically shape the endface of an optical substrate supporting an optical waveguide into a contoured facet which will improve coupling efficiency between the waveguide and a free space optical signal. The ability to use standard photolithographic techniques to pattern and etch the optical endface facet allows for virtually any desired facet geometry to be formed—and replicated across the surface of a wafer for the entire group of assemblies being fabricated. A lens may be etched into the endface using a properly-defined photolithographic mask, with the focal point of the lens selected with respect to the parameters of the optical waveguide and the propagating free space signal. Alternatively, an angled facet may be formed along the endface, with the angle sufficient to re-direct reflected/scattered signals away from the optical axis.
    Type: Application
    Filed: December 11, 2008
    Publication date: June 25, 2009
    Inventors: Mark Webster, Vipulkumar Patel, Mary Nadeau, Prakash Gothoskar, David Piede
  • Publication number: 20090135861
    Abstract: A silicon-on-insulator (SOI)-based tunable laser is formed to include the gain medium (such as a semiconductor optical amplifier) disposed within a cavity formed within the SOI substrate. A tunable wavelength reflecting element and associated phase matching element are formed on the surface of the SOI structure, with optical waveguides formed in the surface SOI layer providing the communication between these components. The tunable wavelength element is controlled to adjust the optical wavelength. Separate discrete lensing elements may be disposed in the cavity with the gain medium, providing efficient coupling of the optical signal into the SOI waveguides. Alternatively, the gain medium itself may be formed to include spot converting tapers on its endfaces, the tapers used to provide mode matching into the associated optical waveguides.
    Type: Application
    Filed: November 6, 2008
    Publication date: May 28, 2009
    Inventors: Mark Webster, David Piede, Prakash Gothoskar
  • Publication number: 20090123114
    Abstract: One or more nanotaper coupling waveguides formed within an optical substrate allows for straightforward, reproducible offset launch conditions to be achieved between an incoming signal and the core region of a multimode fiber (which may be disposed along an alignment fixture formed in the optical substrate), fiber array or other multimode waveguiding structure. Offset launching of a single mode signal into a multimode fiber couples the signal into favorable spatial modes which reduce the presence of differential mode dispersion along the fiber. This approach to providing single mode signal coupling into legacy multimode fiber is considered to be an improvement over the prior art which required the use of an interface element between a single mode fiber and multimode fiber, limiting the number of propagating signals and applications for the legacy multimode fiber. An optical switch may be used to select the specific nanotaper(s) for coupling into the multimode fiber.
    Type: Application
    Filed: July 15, 2008
    Publication date: May 14, 2009
    Inventors: Mark Webster, Prakash Gothoskar, Vipulkumar Patel, David Piede
  • Publication number: 20090103850
    Abstract: A silicon-insulator-silicon capacitive (SISCAP) optical modulator is configured to provide analog operation for applications which previously required the use of relatively large, power-consuming and expensive lithium niobate devices. An MZI-based SISCAP modulator (preferably a balanced arrangement with a SISCAP device on each arm) is responsive to an incoming high frequency electrical signal and is biased in a region where the capacitance of the device is essentially constant and the transform function of the MZI is linear.
    Type: Application
    Filed: October 8, 2008
    Publication date: April 23, 2009
    Inventors: Kaipendu Shastri, Prakash Gothoskar, Vipulkumar Patel, David Piede, Mark Webster
  • Patent number: 7505694
    Abstract: A fiber optic communication system for receiving an electronic digital data signal and transmitting the same, comprising an optical signal source adapted to receive the digital data signal and to produce a frequency modulated optical signal from a directly modulated semiconductor laser; an optical spectrum reshaper adapted to convert the frequency modulated optical signal into an amplitude modulated optical signal; and compensation apparatus for compensating for the adverse effects of the thermal chirp normally induced in the frequency modulated optical signal by modulating the semiconductor laser with the electronic digital data signal.
    Type: Grant
    Filed: May 2, 2005
    Date of Patent: March 17, 2009
    Assignee: Finisar Corporation
    Inventors: Bart Johnson, Daniel Mahgerefteh, Kevin McCallion, Zhencan (Frank) Fan, David Piede, Parviz Tayebati
  • Publication number: 20080253713
    Abstract: An arrangement for providing optical crossovers between waveguides formed in an SOI-based structure utilize a patterned geometry in the SOI structure that is selected to reduce the effects of crosstalk in the area where the signals overlap. Preferably, the optical signals are fixed to propagate along orthogonal directions (or are of different wavelengths) to minimize the effects of crosstalk. The geometry of the SOI structure is patterned to include predetermined tapers and/or reflecting surfaces to direct/shape the propagating optical signals. The patterned waveguide regions within the optical crossover region may be formed to include overlying polysilicon segments to further shape the propagating beams and improve the coupling efficiency of the crossover arrangement.
    Type: Application
    Filed: June 12, 2008
    Publication date: October 16, 2008
    Inventors: David Piede, Prakash Gothoskar, Margaret Ghiron, Robert Keith Montgomery, Vipulkumar Patel, Soham Pathak, Kalpendu Shastri, Katherine A. Yanushefski
  • Publication number: 20080166136
    Abstract: A unitary optical receiver assembly is formed to include a V-groove passively aligned with a first aspheric lens (the lens formed along a surface perpendicular to the V-groove). An optical fiber is disposed along the V-groove and is used to bring the received optical signal into the unitary assembly. Upon passing through the first aspheric lens, the received optical signal will intercept a 45° turning mirror wall that directs the signal downward, through a second aspheric lens (also molded in the unitary assembly), and then into a photosensitive device. Advantageously, the photosensitive device is disposed in passive alignment with the second aspheric lens, allowing for a received signal to be coupled from an incoming optical fiber to a photosensitive device without needing any type of active alignment therebetween.
    Type: Application
    Filed: December 20, 2007
    Publication date: July 10, 2008
    Inventors: Dincer Birincioglu, Rajesh Dighde, Mary Nadeau, David Piede, Wenhong Qin
  • Publication number: 20080105940
    Abstract: A photodetector integrated within a silicon-on-insulator (SOI) structure is formed directly upon an inverse nanotaper endface coupling region to reduce polarization sensitivity at the detector's input. The photodetector may be germanium-based PN (PIN) junction photodetector, a SiGe photodetector, a metal/silicon Schottky barrier photodetector, or any other suitable silicon-based photodetector. The inverse nanotaper photodetector may also be formed as an in-line monitoring device, converting only a portion of the in-coupled optical signal and allowing for the remainder to thereafter propagate along an associated optical waveguide.
    Type: Application
    Filed: June 12, 2007
    Publication date: May 8, 2008
    Inventors: David Piede, Vipulkumar Patel, Margaret Ghiron, Prakash Gothoskar, Robert Keith Montgomery
  • Patent number: 7358585
    Abstract: A silicon-based IR photodetector is formed within a silicon-on-insulator (SOI) structure by placing a metallic strip (preferably, a silicide) over a portion of an optical waveguide formed within a planar silicon surface layer (i.e., “planar SOI layer”) of the SOI structure, the planar SOI layer comprising a thickness of less than one micron. Room temperature operation of the photodetector is accomplished as a result of the relatively low dark current associated with the SOI-based structure and the ability to use a relatively small surface area silicide strip to collect the photocurrent. The planar SOI layer may be doped, and the geometry of the silicide strip may be modified, as desired, to achieve improved results over prior art silicon-based photodetectors.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: April 15, 2008
    Assignee: SiOptical, Inc.
    Inventors: Vipulkumar Patel, Margaret Ghiron, Prakash Gothoskar, Robert Keith Montgomery, Soham Pathak, David Piede, Kalpendu Shastri, Katherine A. Yanushefski
  • Patent number: 7327911
    Abstract: An improvement in the reliability and lifetime of SOI-based opto-electronic systems is provided through the use of a monolithic opto-electronic feedback arrangement that monitors one or more optical signals within the opto-electronic system and provides an electrical feedback signal to adjust the operation parameters of selected optical devices. For example, input signal coupling orientation may be controlled. Alternatively, the operation of an optical modulator, switch, filter, or attenuator may be under closed-loop feedback control by virtue of the inventive monolithic feedback arrangement. The feedback arrangement may also include a calibration/look-up table, coupled to the control electronics, to provide the baseline signals used to analyze the system's performance.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: February 5, 2008
    Assignee: SiOptical, Inc.
    Inventors: David Piede, Kalpendu Shastri, Robert Keith Montgomery, Prakash Gothoskar, Vipulkumar Patel, Mary Nadeau
  • Publication number: 20070280326
    Abstract: An ECL laser structure utilizes an SOI-based grating structure coupled to the external gain medium to provide lasing activity. In contrast to conventional Bragg grating structures, the grating utilized in the ECL of the present invention is laterally displaced (i.e., offset) from the waveguide (in most cases, a rib or strip waveguide) comprising the laser cavity. The grating is formed in an area with higher contrast ratio between materials (silicon and oxide) and thus requires a lesser amount of optical energy to reflect the selected wavelength, and can easily be formed using well-known CMOS fabrication processes. The pitch of the grating (i.e., the spacing between adjacent grating elements) and the refractive index values of the grating materials determine the reflected wavelength (also referred to as the “center wavelength”).
    Type: Application
    Filed: December 13, 2006
    Publication date: December 6, 2007
    Inventors: David Piede, Margaret Ghiron, Prakash Gothoskar, Robert Montgomery
  • Publication number: 20070280616
    Abstract: A low loss optical waveguiding structure for silicon-on-insulator (SOI)-based arrangements utilizes a tri-material configuration including a rib/strip waveguide formed of a material with a refractive index less than silicon, but greater than the refractive index of the underlying insulating material. In one arrangement, silicon nitride may be used. The index mismatch between the silicon surface layer (the SOI layer) and the rib/strip waveguide results in a majority of the optical energy remaining within the SOI layer, thus reducing scattering losses from the rib/strip structure (while the rib/strip allows for guiding along a desired signal path to be followed). Further, since silicon nitride is an amorphous material without a grain structure, this will also reduce scattering losses. Advantageously, the use of silicon nitride allows for conventional CMOS fabrication processes to be used in forming both passive and active devices.
    Type: Application
    Filed: August 3, 2007
    Publication date: December 6, 2007
    Inventors: Vipulkumar Patel, David Piede, Margaret Ghiron, Prakash Gothoskar
  • Patent number: 7298949
    Abstract: An SOI-based photonic bandgap (PBG) electro-optic device utilizes a patterned PBG structure to define a two-dimensional waveguide within an active waveguiding region of the SOI electro-optic device. The inclusion of the PBG columnar arrays within the SOI structure results in providing extremely tight lateral confinement of the optical mode within the waveguiding structure, thus significantly reducing the optical loss. By virtue of including the PBG structure, the associated electrical contacts may be placed in closer proximity to the active region without affecting the optical performance, thus increasing the switching speed of the electro-optic device. The overall device size, capacitance and resistance are also reduced as a consequence of using PBGs for lateral mode confinement.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: November 20, 2007
    Assignee: SiOptical, Inc.
    Inventors: Prakash Gothoskar, Margaret Ghiron, Robert Keith Montgomery, Vipulkumar Patel, Soham Pathak, David Piede, Kalpendu Shastri, Katherine A. Yanushefski
  • Patent number: 7167293
    Abstract: An arrangement for removing unwanted amplitude modulation from the output of an electro-optic phase modulator (formed within a silicon-on-insulator (SOI) system) includes resonant filters that are biased on the positive and negative slopes of the response signal. Therefore, as the amplitude response of one filter decreases, the amplitude response of the other filter increases, resulting in balancing the output and essentially eliminating amplitude modulation from the phase-modulated output signal. In one embodiment, ring resonators (formed in the SOI layer) are used to provide the filtering, where as the number of resonators is increased, the performance of the filtering arrangement is improved accordingly.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: January 23, 2007
    Assignee: SiOptical, Inc.
    Inventor: David Piede
  • Publication number: 20060245761
    Abstract: An electronic dispersion compensation (EDC) arrangement for a multi-channel optical receive utilizes a time division technique to “share” a common adaptive algorithm block between a plurality of N separate channels. The algorithm block embodies a specific algorithm associated with correcting/updating tap weights for the delay lines forming the equalizing elements, and a time slot assignment element is used in conjunction with the algorithm block to control the access of the various channels to the algorithm block. In situations where certain channels experience a greater degree of dispersion than others, the time slot assignment element may be configured to allot a greater number of time slots to the affected channels.
    Type: Application
    Filed: April 27, 2006
    Publication date: November 2, 2006
    Inventors: Kalpendu Shastri, Bipin Dama, David Piede
  • Patent number: 7113676
    Abstract: A planar optical isolator is formed within the silicon surface layer of an SOI structure. A forward-directed signal is applied to an input waveguiding section of the isolator and thereafter propagates through a non-reciprocal waveguide coupling region into an output waveguide section. A rearward-directed signal enters via the output waveguide section and is thereafter coupled into the non-reciprocal waveguide structure, where the geometry of the structure functions to couple only a small amount of the reflected signal into the input waveguide section. In one embodiment, the non-reciprocal structure comprises an N-way directional coupler (with one output waveguide, one input waveguide and N?1 isolating waveguides).
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: September 26, 2006
    Inventors: David Piede, Margaret Ghiron, Prakash Gothoskar, Robert Keith Montgomery, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, Katherine A. Yanushefski, Harvey Wagner
  • Patent number: 7109739
    Abstract: A wafer-level testing arrangement for opto-electronic devices formed in a silicon-on-insulator (SOI) wafer structure utilizes a single opto-electronic testing element to perform both optical and electrical testing. Beam steering optics may be formed on the testing element and used to facilitate the coupling between optical probe signals and optical coupling elements (e.g., prism couplers, gratings) formed on the top surface of the SOI structure. The optical test signals are thereafter directed into optical waveguides formed in the top layer of the SOI structure. The opto-electronic testing element also comprises a plurality of electrical test pins that are positioned to contact a plurality of bondpad test sites on the opto-electronic device and perform electrical testing operations. The optical test signal results may be converted into electrical representations within the SOI structure and thus returned to the testing element as electrical signals.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: September 19, 2006
    Assignee: SiOptical, Inc.
    Inventors: Prakash Gothoskar, Margaret Ghiron, Robert Keith Montgomery, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, David Piede, Katherine A. Yanushefski
  • Publication number: 20060177173
    Abstract: A vertical stack of integrated circuits includes at least one CMOS electronic integrated circuit (IC), an SOI-based opto-electronic integrated circuit structure, and an optical input/output coupling element. A plurality of metalized vias may be formed through the thickness of the stack so that electrical connections can be made between each integrated circuit. Various types of optical input/output coupling can be used, such as prism coupling, gratings, inverse tapers, and the like. By separating the optical and electrical functions onto separate ICs, the functionalities of each may be modified without requiring a re-design of the remaining system. By virtue of using SOI-based opto-electronics with the CMOS electronic ICs, a portion of the SOI structure may be exposed to provide access to the waveguiding SOI layer for optical coupling purposes.
    Type: Application
    Filed: February 3, 2006
    Publication date: August 10, 2006
    Inventors: Kalpendu Shastri, Vipulkumar Patel, David Piede, John Fangman
  • Publication number: 20060171013
    Abstract: An arrangement for removing unwanted amplitude modulation from the output of an electro-optic phase modulator (formed within a silicon-on-insulator (SOI) system) includes resonant filters that are biased on the positive and negative slopes of the response signal. Therefore, as the amplitude response of one filter decreases, the amplitude response of the other filter increases, resulting in balancing the output and essentially eliminating amplitude modulation from the phase-modulated output signal. In one embodiment, ring resonators (formed in the SOI layer) are used to provide the filtering, where as the number of resonators is increased, the performance of the filtering arrangement is improved accordingly.
    Type: Application
    Filed: January 27, 2006
    Publication date: August 3, 2006
    Inventor: David Piede
  • Publication number: 20060133754
    Abstract: A low loss optical waveguiding structure for silicon-on-insulator (SOI)-based arrangements utilizes a tri-material configuration including a rib/strip waveguide formed of a material with a refractive index less than silicon, but greater than the refractive index of the underlying insulating material. In one arrangement, silicon nitirde may be used. The index mismatch between the silicon surface layer (the SOI layer) and the rib/strip waveguide results in a majority of the optical energy remaining within the SOI layer, thus reducing scattering losses from the rib/strip structure (while the rib/strip allows for guiding along a desired signal path to be followed). Further, since silicon nitirde is an amorphous material without a grain structure, this will also reduce scattering losses. Advantageously, the use of silicon nitride allows for conventional CMOS fabrication processes to be used in forming both passive and active devices.
    Type: Application
    Filed: December 21, 2005
    Publication date: June 22, 2006
    Inventors: Vipulkumar Patel, David Piede, Margaret Ghiron, Prakash Gothoskar