Patents by Inventor David Piede

David Piede has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060126993
    Abstract: An SOI-based optical interconnection arrangement is provided that significantly reduces the size, complexity and power consumption requires of conventional high density electrical interconnections. In particular, a group of optical modulators and wavelength division multiplexers/demultiplexers are used in association with traditional electrical signal paths to “concentrate” a large number of the electrical-pinouts onto one optical waveguide (e.g., fiber). By utilizing a number of such SOI-based signal concentration structures, an optical backplane can be formed that couples all of these concentration structures through one optical substrate and then onto a separate number of output/receiving boards. Additionally, optical gain material may be embedded within the backplane element to further enhance the optical signal quality.
    Type: Application
    Filed: November 25, 2005
    Publication date: June 15, 2006
    Inventors: David Piede, Bipin Dama, Kalpendu Shastri, John Fangman, Harvey Wagner, Margaret Ghiron
  • Publication number: 20060083144
    Abstract: An improvement in the reliability and lifetime of SOI-based opto-electronic systems is provided through the use of a monolithic opto-electronic feedback arrangement that monitors one or more optical signals within the opto-electronic system and provides an electrical feedback signal to adjust the operation parameters of selected optical devices. For example, input signal coupling orientation may be controlled. Alternatively, the operation of an optical modulator, switch, filter, or attenuator may be under closed-loop feedback control by virtue of the inventive monolithic feedback arrangement. The feedback arrangement may also include a calibration/look-up table, coupled to the control electronics, to provide the baseline signals used to analyze the system's performance.
    Type: Application
    Filed: October 19, 2005
    Publication date: April 20, 2006
    Inventors: David Piede, Kalpendu Shastri, Robert Montgomery, Prakash Gothoskar, Vipulkumar Patel, Mary Nadeau
  • Publication number: 20060078338
    Abstract: A fiber optic communication system for receiving an electronic digital data signal and transmitting the same, comprising an optical signal source adapted to receive the digital data signal and to produce a frequency modulated optical signal from a directly modulated semiconductor laser; an optical spectrum reshaper adapted to convert the frequency modulated optical signal into an amplitude modulated optical signal; and compensation apparatus for compensating for the adverse effects of the thermal chirp normally induced in the frequency modulated optical signal by modulating the semiconductor laser with the electronic digital data signal.
    Type: Application
    Filed: May 2, 2005
    Publication date: April 13, 2006
    Inventors: Bart Johnson, Daniel Mahgerefteh, Kevin McCallion, Zhencan (Frank) Fan, David Piede, Parviz Tayebati
  • Publication number: 20060018597
    Abstract: A tunable optical coupling arrangement for use with a relatively thin (generally sub-micron thickness) silicon waveguiding layer of a silicon-on-insulator (SOI) substrate. The arrangement comprises a multi-layer structure including a substrate for supporting one or more diffractive optical elements and a layer of tunable liquid crystal material. The multi-layer structure is disposed over a conventional SOI substrate including the thin silicon waveguiding layer, where the refractive index of the liquid crystal material can be modified to adjust the deflection of an input optical beam through the various diffractive optical elements and present an optimized launch angle into the silicon waveguiding layer, thus reducing insertion loss at the waveguiding layer.
    Type: Application
    Filed: July 22, 2005
    Publication date: January 26, 2006
    Inventors: David Piede, Prakash Gothoskar, Harvey Wagner, Margaret Ghiron
  • Publication number: 20050213873
    Abstract: An arrangement for providing optical crossovers between waveguides formed in an SOI-based structure utilize a patterned geometry in the SOI structure that is selected to reduce the effects of crosstalk in the area where the signals overlap. Preferably, the optical signals are fixed to propagate along orthogonal directions (or are of different wavelengths) to minimize the effects of crosstalk. The geometry of the SOI structure is patterned to include predetermined tapers and/or reflecting surfaces to direct/shape the propagating optical signals. The patterned waveguide regions within the optical crossover region may be formed to include overlying polysilicon segments to further shape the propagating beams and improve the coupling efficiency of the crossover arrangement.
    Type: Application
    Filed: March 24, 2005
    Publication date: September 29, 2005
    Inventors: David Piede, Prakash Gothoskar, Margaret Ghiron, Robert Montgomery, Vipulkumar Patel, Soham Pathak, Kalpendu Shastri, Katherine Yanushefski
  • Publication number: 20050194990
    Abstract: A wafer-level testing arrangement for opto-electronic devices formed in a silicon-on-insulator (SOI) wafer structure utilizes a single opto-electronic testing element to perform both optical and electrical testing. Beam steering optics may be formed on the testing element and used to facilitate the coupling between optical probe signals and optical coupling elements (e.g., prism couplers, gratings) formed on the top surface of the SOI structure. The optical test signals are thereafter directed into optical waveguides formed in the top layer of the SOI structure. The opto-electronic testing element also comprises a plurality of electrical test pins that are positioned to contact a plurality of bondpad test sites on the opto-electronic device and perform electrical testing operations. The optical test signal results may be converted into electrical representations within the SOI structure and thus returned to the testing element as electrical signals.
    Type: Application
    Filed: March 8, 2005
    Publication date: September 8, 2005
    Inventors: Prakash Gothoskar, Margaret Ghiron, Robert Montgomery, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, David Piede, Katherine Yanushefski
  • Publication number: 20050179986
    Abstract: An SOI-based photonic bandgap (PBG) electro-optic device utilizes a patterned PBG structure to define a two-dimensional waveguide within an active waveguiding region of the SOI electro-optic device. The inclusion of the PBG columnar arrays within the SOI structure results in providing extremely tight lateral confinement of the optical mode within the waveguiding structure, thus significantly reducing the optical loss. By virtue of including the PBG structure, the associated electrical contacts may be placed in closer proximity to the active region without affecting the optical performance, thus increasing the switching speed of the electro-optic device. The overall device size, capacitance and resistance are also reduced as a consequence of using PBGs for lateral mode confinement.
    Type: Application
    Filed: January 24, 2005
    Publication date: August 18, 2005
    Inventors: Prakash Gothoskar, Margaret Ghiron, Robert Montgomery, Vipulkumar Patel, Soham Pathak, David Piede, Kalpendu Shastri, Katherine Yanushefski
  • Publication number: 20050135727
    Abstract: An SOI-based opto-electronic structure includes various electronic components disposed with their associated optical components within a single SOI layer, forming a monolithic arrangement. EMI/EMC shielding is provided by forming a metallized outer layer on the surface of an external prism coupler that interfaces with the SOI layer, the metallized layer including transparent apertures to allow an optical signal to be coupled into and out of the SOI layer. The opposing surface of the prism coupler may also be coated with a metallic material to provide additional shielding. Further, metallic shielding plates may be formed on the SOI structure itself, overlying the locations of EMI-sensitive electronics. All of these metallic layers are ultimately coupled to an external ground plane to isolate the structure and provide the necessary shielding.
    Type: Application
    Filed: December 16, 2004
    Publication date: June 23, 2005
    Applicant: SiOptical, Inc.
    Inventors: David Piede, Margaret Ghiron, Prakash Gothoskar, Robert Montgomery, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, Katherine Yanushefski
  • Publication number: 20050123232
    Abstract: A planar optical isolator is formed within the silicon surface layer of an SOI structure. A forward-directed signal is applied to an input waveguiding section of the isolator and thereafter propagates through a non-reciprocal waveguide coupling region into an output waveguide section. A rearward-directed signal enters via the output waveguide section and is thereafter coupled into the non-reciprocal waveguide structure, where the geometry of the structure functions to couple only a small amount of the reflected signal into the input waveguide section. In one embodiment, the non-reciprocal structure comprises an N-way directional coupler (with one output waveguide, one input waveguide and N-1 isolating waveguides).
    Type: Application
    Filed: December 6, 2004
    Publication date: June 9, 2005
    Inventors: David Piede, Margaret Ghiron, Prakash Gothoskar, Robert Montgomery, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, Katherine Yanushefski, Harvey Wagner
  • Publication number: 20050110108
    Abstract: A silicon-based IR photodetector is formed within a silicon-on-insulator (SOI) structure by placing a metallic strip (preferably, a silicide) over a portion of an optical waveguide formed within a planar silicon surface layer (i.e., “planar SOI layer”) of the SOI structure, the planar SOI layer comprising a thickness of less than one micron. Room temperature operation of the photodetector is accomplished as a result of the relatively low dark current associated with the SOI-based structure and the ability to use a relatively small surface area silicide strip to collect the photocurrent. The planar SOI layer may be doped, and the geometry of the silicide strip may be modified, as desired, to achieve improved results over prior art silicon-based photodetectors.
    Type: Application
    Filed: November 17, 2004
    Publication date: May 26, 2005
    Inventors: Vipulkumar Patel, Margaret Ghiron, Prakash Gothoskar, Robert Montgomery, Soham Pathak, David Piede, Kalpendu Shastri, Katherine Yanushefski