Abstract: Intercepting a requested memory operation corresponding to a conventional memory is disclosed. The requested memory operation is translated to be applied to a structured memory.

Abstract: Improved memory management is provided according to a Hierarchical Immutable Content Addressable Memory Processor (HICAMP) architecture. In HICAMP, physical memory is organized as two or more physical memory blocks, each physical memory block having a fixed storage capacity. An indication of which of the physical memory blocks is active at any point in time is provided. A memory controller provides a non-duplicating write capability, where data to be written to the physical memory is compared to contents of all active physical memory blocks at the time of writing, to ensure that no two active memory blocks have the same data after completion of the non-duplicating write.

Abstract: A method is provided for translating sets of constraint declarations to imperative code sequences based on defining an instantiatable object per set, inserting calls to a notification callback mechanism on state modification and defining calls in the constraint context as imperative code sequences that, in response to these callbacks, take actions to maintain these constraints. This notification and callback mechanism can also be employed in connection with external events, thereby providing for efficient implementation of event-sequenced imperative procedures in a constraint programming language.

Abstract: Improved memory management is provided according to a Hierarchical Immutable Content Addressable Memory Processor (HICAMP) architecture. In HICAMP, physical memory is organized as two or more physical memory blocks, each physical memory block having a fixed storage capacity. An indication of which of the physical memory blocks is active at any point in time is provided. A memory controller provides a non-duplicating write capability, where data to be written to the physical memory is compared to contents of all active physical memory blocks at the time of writing, to ensure that no two active memory blocks have the same data after completion of the non-duplicating write.

Abstract: A method is provided for translating sets of constraint declarations to imperative code sequences based on defining an instantiatable object per set, inserting calls to a notification callback mechanism on state modification and defining calls in the constraint context as imperative code sequences that, in response to these callbacks, take actions to maintain these constraints. This notification and callback mechanism can also be employed in connection with external events, thereby providing for efficient implementation of event-sequenced imperative procedures in a constraint programming language.

Abstract: A method for providing security groups based on the use of tunneling is disclosed. The method includes assigning a security group identifier (SGI) to a packet and classifying the packet based on the packet's SGI.

Abstract: Improved memory management is provided according to a Hierarchical Immutable Content Addressable Memory Processor (HICAMP) architecture. In HICAMP, physical memory is organized as two or more physical memory blocks, each physical memory block having a fixed storage capacity. An indication of which of the physical memory blocks is active at any point in time is provided. A memory controller provides a non-duplicating write capability, where data to be written to the physical memory is compared to contents of all active physical memory blocks at the time of writing, to ensure that no two active memory blocks have the same data after completion of the non-duplicating write.

Abstract: A method for providing security groups based on the use of tunneling is disclosed. The method includes assigning a security group identifier (SGI) to a packet and classifying the packet based on the packet's SGI.

Abstract: Improved memory management is provided according to a Hierarchical Immutable Content Addressable Memory Processor (HICAMP) architecture. In HICAMP, physical memory is organized as two or more physical memory blocks, each physical memory block having a fixed storage capacity. An indication of which of the physical memory blocks is active at any point in time is provided. A memory controller provides a non-duplicating write capability, where data to be written to the physical memory is compared to contents of all active physical memory blocks at the time of writing, to ensure that no two active memory blocks have the same data after completion of the non-duplicating write.

Abstract: A method for using network address translation in switches and routers to define a virtual host as the source of a multicast channel within a single-source multicast model and to translate packet addresses from different multicast sources so that the packets appear to be originating from the virtual host. Address-translated packets are thus forwarded through a single-source multicast channel and received by the subscribing host(s)/clients as though the packets came from a single “virtual” source. This methodology can be used to map two or more sources simultaneously onto the same multicast channel. Such a mapping is useful, for example, to present multiple views of a sporting event video broadcast, provide advertisement insertion capability, or to support transparent fail-over to a backup video source in a critical multicast application. Subscribing client hosts in the multicast reception group simply subscribe to the single virtual host as the source of a multicast channel.

Abstract: In one embodiment, a method for processing a packet is disclosed. The method includes classifying the packet and determining an action to be taken with regard to the packet. Classifying the packet includes using information in the packet to perform the classification. The determination made as to the action to be taken with regard to the packet is based on the classifying that is performed, and is performed using a plurality of rules. At least one of the rules is configurable. The information in the packet is related to time-to-live (TTL) data corresponding to the packet.

Abstract: A scheduling mechanism that fairly allocates a resource to a number of schedulable elements, of which some are latency-sensitive, is disclosed. Each element's use of the resource is tracked by determining the element's virtual time. An active element is selected from the elements that are ready to use the resource by determining the element that has the smallest effective virtual time. The effective virtual time is the element's actual virtual time modified by a borrowed virtual time value. When an element has a short-term need for the resource, it can borrow the privilege to run by borrowing virtual time. As the element uses the resource, it consumes virtual time according to its weight. When the elements are scheduled for the resource, the ready element having the smallest virtual time is selected. The invention enforces long-term fairness to each element while allowing latency-sensitive elements to be preferably selected.

Abstract: A logging module is disclosed. A communications device can include, and so be made secure through the use of, the logging module. The logging module is configured to communicate information regarding a change to a configuration of a subsystem of the communications device.

Abstract: Loading data from a computer memory system is disclosed. A memory system is provided, wherein some or all data stored in the memory system is organized as one or more pointer-linked data structures. One or more iterator registers are provided. A first pointer chain is loaded, having two or more pointers leading to a first element of a selected pointer-linked data structure to a selected iterator register. A second pointer chain is loaded, having two or more pointers leading to a second element of the selected pointer-linked data structure to the selected iterator register. The loading of the second pointer chain reuses portions of the first pointer chain that are common with the second pointer chain. Modifying data stored in a computer memory system is disclosed. A memory system is provided. One or more iterator registers are provided, wherein the iterator registers each include two or more pointer fields for storing two or more pointers that form a pointer chain leading to a data element.

Abstract: A programming language is extended to have embedded interpretive types (EIT) that define objects and variables to be resolved at translation time. A variable or data element having a type that is one of the EITs is referred to as an embedded interpretive variable (EIV). A control construct containing an EIV is interpreted (i.e. executed) at translation time.

Abstract: An extension to the conventional single rate microflow policer that provides dual rate policing with a minimum of extra resource utilization. Using the extended microflow policer, an aggressive TCP flow ramps up to exceed the policer rate, setting a burst drop flag. Once the flow rate exceeds the burst rate, a single packet is dropped and the burst drop flag is cleared. On seeing the single packet drop, the TCP sender is then expected to reduce its rate. Flows that do not back off will eventually exceed a higher, hard drop threshold and experience packet drop. An aggressive TCP rate thus oscillate around the burst rate, efficiently approaching the hard drop rate without exceeding it. The addition of only a single bit flag avoids the cost of a dual-rate policer and the tail drop behavior induced by a single rate policer.

Abstract: A system includes a network tunnel, an ingress network device coupled to send packets via the network tunnel, and an egress network device coupled to receive packets sent via the network tunnel. The egress network device is configured to provide information to the ingress network device. The information indicates whether a packet transmitted from the ingress network device to the egress network device was dropped in the network tunnel. The ingress network device can retransmit the packet to the egress network device if the packet is dropped in the network tunnel.

Abstract: The present invention describes a method and an apparatus of multi-feature lookup process using multi-feature classification memory (“CM”). In one embodiment of the present invention, the method defines various features, offered in the router, into a feature hierarchy. Individual associated CMs are merged into a combined associated multi-feature CM. The feature rules for packet processing are merged according to the feature hierarchy and the multi-feature CM is populated with the merged rules. The multi-feature CM includes combined packet-processing rules for multiple features. The multi-feature CM eliminates the need for individual associated CMs. The memory space in the multi-feature CM is shared by various feature rules.

Abstract: A method is provided for translating sets of constraint declarations to imperative code sequences based on defining an instantiatable object per set, inserting calls to a notification callback mechanism on state modification and defining calls in the constraint context as imperative code sequences that, in response to these callbacks, take actions to maintain these constraints. This notification and callback mechanism can also be employed in connection with external events, thereby providing for efficient implementation of event-sequenced imperative procedures in a constraint programming language.

Abstract: Improved memory management is provided according to a Hierarchical Immutable Content Addressable Memory Processor (HICAMP) architecture. In HICAMP, physical memory is organized as two or more physical memory blocks, each physical memory block having a fixed storage capacity. An indication of which of the physical memory blocks is active at any point in time is provided. A memory controller provides a non-duplicating write capability, where data to be written to the physical memory is compared to contents of all active physical memory blocks at the time of writing, to ensure that no two active memory blocks have the same data after completion of the non-duplicating write.