Abstract: Fabrication of radio-frequency (RF) devices involves providing a field-effect transistor (FET), forming one or more electrical connections to the FET, forming one or more dielectric layers over at least a portion of the electrical connections, and disposing an electrical element over the one or more dielectric layers, the electrical element being in electrical communication with the FET via the one or more electrical connections. RF device fabrication further involves covering at least a portion of the electrical element with a sacrificial material, applying an interface material over the one or more dielectric layers, the interface material at least partially covering the sacrificial material, and removing at least a portion of the sacrificial material to form a cavity at least partially covered by the interface layer.

Abstract: A semiconductor device includes a transistor device implemented over an oxide layer, an interface layer applied below at least a portion of the oxide layer, the interface layer having a trench formed therein, and a substrate layer covering at least a portion of the interface layer and the trench to form a cavity.

Abstract: Disclosed herein are switching or other active FET configurations that implement a main-auxiliary branch design. Such designs include a circuit assembly for performing a switching function that includes a branch including a main path in series with an auxiliary path. The circuit assembly also includes a first gate bias network connected to the main path. The circuit assembly also includes a second gate bias network connected to the auxiliary path, the second gate bias network configured to improve linearity of the switching function.

Abstract: Disclosed herein are switching or other active FET configurations that implement a main-auxiliary branch design. Such designs include a circuit assembly for performing a switching function that includes a branch including a main path in parallel with an auxiliary path. The circuit assembly also includes a first gate bias network connected to the main path. The circuit assembly also includes a second gate bias network connected to the auxiliary path, the second gate bias network configured to improve linearity of the switching function.

Abstract: A power amplifier can include a carrier amplifier having first and second differential amplification cells with outputs coupled by a primary loop of a carrier transformer, and a peaking amplifier having first and second differential amplification cells with outputs coupled by a primary loop of a peaking transformer. The power amplifier can further include a combiner having a quarter-wave circuit implemented between the secondary loop of the carrier transformer and a secondary loop of the peaking transformer. The quarter-wave circuit can be configured to provide a characteristic impedance, such that the carrier and peaking amplifiers are presented with an impedance that is approximately the same as the characteristic impedance when both of the carrier and peaking amplifiers are turned on, and the carrier amplifier is presented with an impedance that is approximately twice the characteristic impedance when the carrier amplifier is turned on and the peaking amplifier is turned off.

Abstract: Disclosed herein are switching or other active FET configurations that implement a main-auxiliary branch design. Such designs include a circuit assembly for performing a switching function that includes a branch including a main path in parallel with an auxiliary path, both the main path and the auxiliary path having a plurality of field-effect transistors. The circuit assembly also includes a first gate bias network connected to the main path. The circuit assembly also includes a second gate bias network connected to a first subset of the plurality of FETs of the auxiliary path. The circuit assembly also includes a third gate bias network connected to a second subset of the plurality of FETs of the auxiliary path so that the third gate bias network switches on the auxiliary path when the main path is on for nonlinear cancellation, and switches off the auxiliary path when the main path is off to enable the branch to withstand maximum voltage swings.

Abstract: A method for fabricating a transistor device involves providing a substrate, forming an oxide layer over at least a portion of the substrate, forming a transistor over at least a portion of the oxide layer, and removing at least a portion of a backside of the substrate to form an opening providing radio-frequency isolation for the transistor.

Abstract: Field-effect transistor (FET) devices are described herein that include one or more body contacts implemented near source, gate, drain (S/G/D) assemblies to improve the influence of a voltage applied at the body contact on the S/G/D assemblies. For example, body contacts can be implemented between S/G/D assemblies rather than on the ends of such assemblies. This can advantageously improve body contact influence on the S/G/D assemblies while maintaining a targeted size for the FET device.

Abstract: A switch fabrication method can include forming a plurality of elements, and connecting the elements in series between a first terminal and a second terminal, such that the elements include a first end element connected to the first terminal and a second end element connected to the second terminal. Each element can have a parameter such that the elements have a distribution of parameter values that decreases from the first end element for at least half of the elements to a minimum parameter value corresponding to an element between the first end element and the second end element. The minimum parameter value can be less than the parameter value of the second end element, and the parameter value of the first end element can be greater than or equal to the parameter value of the second end element.

Abstract: Disclosed herein are switching or other active FET configurations that implement a main-auxiliary branch design. Such designs include a circuit assembly for performing a switching function that includes a branch including a main path in parallel with an auxiliary path, both the main path and the auxiliary path having a plurality of field-effect transistors. The circuit assembly also includes a first gate bias network connected to the main path. The circuit assembly also includes a second gate bias network connected to a first subset of the plurality of FETs of the auxiliary path. The circuit assembly also includes a third gate bias network connected to a second subset of the plurality of FETs of the auxiliary path, the second gate bias network and the third gate bias network being independently configurable to improve linearity of the switching function.

Abstract: Electromagnetic coupler systems including built-in frequency detection, and modules and devices including such. One example of an electromagnetic coupler system includes an electromagnetic coupler having an input port, an output port, a coupled port, and an isolation port, the electromagnetic coupler including a main line extending between the input port and the output port, and a coupled line extending between the coupled port and the isolation port, the electromagnetic coupler being configured to produce a coupled signal at the coupled port responsive to receiving an input signal at the input port. An adjustable termination impedance is connected to the isolation port. A frequency detector is connected to the adjustable termination impedance and to the coupled port, and configured to detect a frequency of the coupled signal and provide an impedance control signal to tune the adjustable termination impedance based on the frequency of the coupled signal.

Abstract: Radio-frequency core circuitry includes a first switch arm associated with a first signal band and coupled to a common node, a second switch arm associated with a second signal band and coupled to the common node, a first shunt arm connected to a first shunt node in the first switch arm, and a first transmission line disposed in the first switch arm between the common node and the shunt node and having a length configured present an open circuit at a fundamental frequency associated with the second signal band and to present a short circuit at a harmonic of the fundamental frequency associated with the second signal band.

Abstract: A method for fabricating a semiconductor die involves providing a semiconductor substrate, forming a plurality of active devices and a plurality of passive devices over the semiconductor substrate, forming one or more electrical connections to the plurality of active devices and the plurality of passive devices, forming one or more dielectric layers over at least a portion of the electrical connections, applying an interface material over at least a portion of the one or more dielectric layers, removing portions of the interface material to form a plurality of trenches, and covering at least a portion of the interface material and the plurality of trenches with a substrate layer to form a plurality of radio-frequency isolation cavities.

Abstract: A method for fabricating a radio-frequency device involves providing a semiconductor wafer including a transistor device, applying a form of sacrificial material on the semiconductor wafer, applying an interface material over the form of sacrificial material, and removing at least a portion of the form of sacrificial material to form a cavity at least partially covered by the interface material.

Abstract: A radio-frequency device comprises a first transistor including a first set of fingers having a first finger-to-finger spacing in a width dimension of the first transistor, and a second transistor in a series connection with the first transistor, the second transistor including a second set of fingers having a second finger-to-finger spacing in the width dimension that is greater than the first finger-to-finger spacing.

Abstract: Discharge circuits, devices and methods. In some embodiments, a MEMS device can include a substrate and an electromechanical assembly implemented on the substrate. The MEMS device can further include a discharge circuit implemented relative to the electromechanical assembly. The discharge circuit can be configured to provide a preferred arcing path during a discharge condition affecting the electromechanical assembly. The MEMS device can be, for example, a switching device, a capacitance device, a gyroscope sensor device, an accelerometer device, a surface acoustic wave (SAW) device, or a bulk acoustic wave (BAW) device. The discharge circuit can include a spark gap assembly having one or more spark gap elements configured to facilitate the preferred arcing path.

Abstract: Electromagnetic coupler systems including built-in frequency detection, and modules and devices including such. One example of an electromagnetic coupler system include an electromagnetic coupler having an input port, an output port, a coupled port, and an isolation port, the electromagnetic coupler including a main line extending between the input port and the output port, and a coupled line extending between the coupled port and the isolation port, the electromagnetic coupler being configured to produce a coupled signal at the coupled port responsive to receiving an input signal at the input port. An adjustable termination impedance is connected to the isolation port. A frequency detector is connected to the adjustable termination impedance and to the coupled port, and configured to detect a frequency of the coupled signal and provide an impedance control signal to tune the adjustable termination impedance based on the frequency of the coupled signal.

Abstract: A method for fabricating a radio-frequency device involves providing a substrate structure including a silicon handle wafer, an oxide layer formed on the silicon handle wafer, and an active silicon layer disposed on the oxide layer.

Abstract: A radio-frequency module includes a switching device having first and second switch arms and a common pole node connected to both the first and second switch arms, a first shunt arm connected to the first switch arm, and a first transmission line disposed in the first switch arm between the common pole node and the first shunt arm, the first transmission line being configured to present a substantially open circuit looking into the first switch arm from the common pole node at a fundamental frequency of a signal transmitting on the second switch arm when the first switch arm is in an OFF-state and the first shunt arm is in an ON-state.

Abstract: A transistor device includes a transistor implemented over a semiconductor substrate, one or more dielectric layers formed over the transistor, and a handle wafer layer disposed on at least a portion of the one or more dielectric layers, the handle wafer layer including a topside trench defined at least in part by sidewall portions of the handle wafer layer.