Abstract: Provided herein are methods of reconfiguring directional couplers in an RF transceiver. The methods can include designing and reconfiguring the directional couplers to provide high directivity and a desired coupling factor using configurable capacitors to effect a mutual coupling and using lumped components or delay lines to effect a phase shift. The reconfigurable directional couplers can be designed for multi-band operation with an adjustable coupling factor conducive to semiconductor process integration. The reconfigurable directional couplers can have variable phase shifters to achieve a desired level of directivity in the coupler. In various examples, the methods include monitoring the frequency of power signals received by the reconfigurable directional couplers, and adjusting the configurable capacitors and/or variable phase shifters to maintain desired directivity and coupling factors over multi-band operation of the reconfigurable directional couplers.

Abstract: Provided herein are apparatus and methods for reconfigurable directional couplers in an RF transceiver. Reconfigurable directional couplers can be reconfigured and designed to provide high directivity using configurable capacitors to effect a mutual coupling and using lumped components or delay lines to effect a phase shift. Depending on the embodiment, the reconfigurable directional coupler can include capacitors, inductors, and switching components. The coupler can be designed for multi-band operation with an adjustable coupling factor conducive to semiconductor process integration. The coupler can have variable phase shifters to achieve a desired level of directivity in the coupler.

Abstract: Disclosed herein are switching or other active FET configurations that implement a main-auxiliary branch design. Such designs include a circuit assembly for performing a switching function that includes a branch including a main path in parallel with a first auxiliary path and the main path in series with a second auxiliary path. The circuit assembly also includes a first gate bias network connected to the main path. The circuit assembly also includes a second gate bias network connected to the first auxiliary path. The circuit assembly also includes a third gate bias network connected to the second auxiliary path, the second gate bias network and the third gate bias network configured to improve linearity of the switching function.

Abstract: Disclosed herein are switching or other active FET configurations that implement a main-auxiliary branch design. Such designs include a circuit assembly for performing a switching function that includes a branch including a main path in parallel with an auxiliary path. The circuit assembly also includes a gate bias network connected to the main path and to the auxiliary path, the main path and the auxiliary path each having different structures that are configured to improve linearity of the switching function.

Abstract: Disclosed herein are switching or other active FET configurations that implement a main-auxiliary branch design. Such designs include a circuit assembly for performing a switching function that includes a branch including a main path in parallel with an auxiliary path, both the main path and the auxiliary path having a plurality of field-effect transistors. The circuit assembly also includes a first gate bias network connected to the main path. The circuit assembly also includes a second gate bias network connected to a first subset of the plurality of FETs of the auxiliary path. The circuit assembly also includes a third gate bias network connected to a second subset of the plurality of FETs of the auxiliary path so that the third gate bias network switches on the auxiliary path when the main path is on for nonlinear cancellation, and switches off the auxiliary path when the main path is off to enable the branch to withstand maximum voltage swings.

Abstract: Disclosed herein are switching or other active FET configurations that implement a main-auxiliary branch design. Such designs include a circuit assembly for performing a switching function that includes a branch including a main path in parallel with an auxiliary path, both the main path and the auxiliary path having a plurality of field-effect transistors. The circuit assembly also includes a first gate bias network connected to the main path. The circuit assembly also includes a second gate bias network connected to a first subset of the plurality of FETs of the auxiliary path. The circuit assembly also includes a third gate bias network connected to a second subset of the plurality of FETs of the auxiliary path, the second gate bias network and the third gate bias network being independently configurable to improve linearity of the switching function.

Abstract: Disclosed herein are switching or other active FET configurations that implement a main-auxiliary branch design. Such designs include a circuit assembly for performing a switching function that includes a branch including a main path in series with an auxiliary path. The circuit assembly also includes a first gate bias network connected to the main path. The circuit assembly also includes a second gate bias network connected to the auxiliary path, the second gate bias network configured to improve linearity of the switching function.

Abstract: Disclosed herein are switching or other active FET configurations that implement a main-auxiliary branch design. Such designs include a circuit assembly for performing a switching function that includes a branch including a main path in parallel with an auxiliary path. The circuit assembly also includes a first gate bias network connected to the main path. The circuit assembly also includes a second gate bias network connected to the auxiliary path, the second gate bias network configured to improve linearity of the switching function.

Abstract: A method for fabricating a semiconductor device involves providing a semiconductor substrate, forming an oxide layer in the semiconductor substrate, forming a transistor device over the oxide layer, removing at least part of a backside of the semiconductor substrate, applying a sacrificial material below the oxide layer, covering the sacrificial material with an interface material, and removing at least a portion of the sacrificial material to form a cavity at least partially covered by the interface layer.

Abstract: A method for fabricating a semiconductor device involves providing a transistor device, forming one or more electrical connections to the transistor device, forming one or more dielectric layers over at least a portion of the electrical connections, applying an interface material over at least a portion of the one or more dielectric layers, removing at least a portion of the interface material to form a trench, and covering at least a portion of the interface material and the trench with a substrate layer to form a cavity.

Abstract: Stack device having voltage compensation. In some embodiments, a switching device can include switching elements connected in series between a first terminal and a second terminal, with a first end switching element being connected to the first terminal and a second end switching element being connected to the second terminal. Each switching element can have a parameter such that the switching elements have a distribution of parameter values that decreases from the first end switching element for at least half of the switching elements to a minimum parameter value corresponding to a switching element between the first end switching element and the second end switching element. The minimum parameter value can be less than the parameter value of the second end switching element, and the parameter value of the first end switching element can be greater than or equal to the parameter value of the second end switching element.

Abstract: A radio-frequency switch includes a first field-effect transistor having drain and source fingers separated by a first drain-to-source distance and a second field-effect transistor in a series connection with the first field-effect transistor, the second field-effect transistor having drain and source fingers separated by a second drain-to-source distance that is different than the first drain-to-source distance.

Abstract: Multi-output electromagnetic couplers configured to detect multiple frequencies simultaneously, and devices and systems including same. In one example a multi-output electromagnetic coupler includes a main coupler transmission line extending between and electrically connecting an input port and an output port, a first coupled line section configured to couple electromagnetic power in a first frequency band from the main coupler transmission line to provide a first coupled output signal at a first coupled port, and a second coupled line section configured to couple electromagnetic power in a second frequency band from the main coupler transmission line to provide a second coupled output signal at a second coupled port simultaneously with the first coupled output signal being provided at the first coupled port.

Abstract: Fabrication of radio-frequency (RF) devices involves providing a field-effect transistor (FET) formed over an oxide layer formed on a semiconductor substrate, removing at least part of the semiconductor substrate to expose at least a portion of a backside of the oxide layer, applying an interface material to at least a portion of the backside of the oxide layer, removing at least a portion of the interface material to form a trench, and covering at least a portion of the interface material and the trench with a substrate layer to form a cavity.

Abstract: Fabrication of radio-frequency (RF) devices involves providing a field-effect transistor (FET), forming one or more electrical connections to the FET, forming one or more dielectric layers over at least a portion of the electrical connections, and disposing an electrical element at least partially above the one or more dielectric layers, the electrical element being in electrical communication with the FET via the one or more electrical connections. RF device fabrication further involves applying an interface material over at least a portion of the one or more dielectric layers, removing at least a portion of the interface material to form a trench above at least a portion of the electrical element, and covering at least a portion of the interface material and the trench with a substrate layer to form a cavity, the electrical element being disposed at least partially within the cavity.

Abstract: Fabricating of radio-frequency (RF) devices involve providing a field-effect transistor (FET) formed over an oxide layer formed on a semiconductor substrate, removing at least part of the semiconductor substrate to expose at least a portion of a backside of the oxide layer, applying a sacrificial material to the backside of the oxide layer, applying an interface material to at least a portion of the backside of the oxide layer, the interface material at least partially covering the sacrificial material, and removing at least a portion of the sacrificial material to form a cavity at least partially covered by the interface layer.

Abstract: Electromagnetic coupler systems including built-in frequency detection, and modules and devices including such. One example of an electromagnetic coupler system include an electromagnetic coupler having an input port, an output port, a coupled port, and an isolation port, the electromagnetic coupler including a main line extending between the input port and the output port, and a coupled line extending between the coupled port and the isolation port, the electromagnetic coupler being configured to produce a coupled signal at the coupled port responsive to receiving an input signal at the input port. An adjustable termination impedance is connected to the isolation port. A frequency detector is connected to the adjustable termination impedance and to the coupled port, and configured to detect a frequency of the coupled signal and provide an impedance control signal to tune the adjustable termination impedance based on the frequency of the coupled signal.

Abstract: Aspects of this disclosure relate to a radio frequency coupler with a multi-section coupled line. In an embodiment, an apparatus includes a radio frequency coupler that includes a power input port, a power output port, a coupled port, a multi-section coupled line, and a switch configured to adjust an effective length of the multi-section coupled line electrically connected to the coupled port.

Abstract: Disclosed herein are power amplification (PA) systems configured to amplify a signal, such as a radio-frequency signal. The PA system includes a plurality of power amplifiers that are configured to amplify a signal received at a signal input and to output the amplified signal at a signal output. The power amplifiers are configured to receive a supply voltage that is a combination of a battery voltage and an envelope tracking signal. The PA system includes a PA controller configured to control the power amplifiers based at least in part on the battery voltage or a power output of the power amplifiers. The PA controller can be configured to alter impedance matching components of the PA system to reconfigure a load line of the power amplifiers.

Abstract: Field effect transistor stacks include a first field-effect transistor having a source finger, a drain finger, and a gate finger interposed therebetween, the source finger and the drain finger of the first field-effect transistor being separated by a first drain-to-source distance, and a second field-effect transistor in a series connection with the first field-effect transistor, the second field-effect transistor having a source finger, a drain finger, and a gate finger interposed therebetween, the source finger and the drain finger of the second field-effect transistor being separated by a second drain-to-source distance that is different than the first drain-to-source distance.