Patents by Inventor David Xuan-Qi Wang
David Xuan-Qi Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130167915Abstract: Back contact back junction three dimensional solar cell and methods for manufacturing are provided. The back contact back contact back junction three dimensional solar cell comprises a three-dimensional substrate. The substrate comprises a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer is positioned on the doped backside emitter region. Backside emitter contacts and backside base contacts connected to metal interconnects and selectively formed on three-dimensional features of the backside of three-dimensional solar cell.Type: ApplicationFiled: December 9, 2010Publication date: July 4, 2013Applicant: SOLEXEL, INC.Inventors: Mehrdad M. Moslehi, Pawan Kapur, Karl-Josef Kramer, David Xuan-Qi Wang, Sean M. Seutter, Virenda V. Rana
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Publication number: 20130171808Abstract: This disclosure presents manufacturing methods and apparatus designs for making TFSSs from both sides of a re-usable semiconductor template, thus effectively increasing the substrate manufacturing throughput and reducing the substrate manufacturing cost. This approach also reduces the amortized starting template cost per manufactured substrate (TFSS) by about a factor of 2 for a given number of template reuse cycles.Type: ApplicationFiled: July 20, 2012Publication date: July 4, 2013Applicant: SOLEXEL, INC.Inventors: Mehrdad M. Moslehi, Karl-Josef Kramer, David Xuan-Qi Wang, Pawan Kapur, Somnath Nag, George D. Kamian, Jay Ashjaee, Takao Yonehara
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Publication number: 20130141833Abstract: In one embodiment, there is provided a carrier comprising a top semiconductor layer having isolated positive electrode regions and isolated negative electrode regions separated by a frontside trench through the top semiconductor layer at least to an underlying insulating layer positioned between the top semiconductor layer and a bottom semiconductor layer. A dielectric layer covers the top exposed surfaces of the carrier. Backside trenches through the bottom semiconductor layer at least to the insulating layer form isolated backside regions corresponding to the frontside positive and negative electrode regions. Backside contacts positioned on the bottom semiconductor layer and coupled to the positive and negative electrode regions allow for the electric charging of the frontside electrode regions.Type: ApplicationFiled: December 30, 2010Publication date: June 6, 2013Applicant: Solexel, Inc.Inventors: Mehrdad M. Moslehi, David Xuan-Qi Wang
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Publication number: 20130140838Abstract: This disclosure presents mobile vacuum carriers that may be used to support thin substrates that would otherwise be too brittle to transport and process. This disclosure relates to the processing of thin semiconductor substrates and has particular applicability to the fields of photovoltaic solar cells, semiconductor microelectronic integrated circuits, micro-electro-mechanical systems (MEMS), optoelectronic devices (such as light-emitting diodes, lasers, photo detectors), data storage devices, etc.Type: ApplicationFiled: December 15, 2010Publication date: June 6, 2013Applicant: SOLEXEL, INC.Inventors: David Xuan-Qi Wang, Mehrdad Moslehi
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Publication number: 20130000715Abstract: Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, attaching a prepeg backplane to the interdigitated pattern of base electrodes and emitter electrodes, forming holes in the prepeg backplane which provide access to the first layer of electrically conductive metal, and depositing a second layer of electrically conductive metal on the backside surface of the prepeg backplane forming an electrical interconnect with the first layer of electrically conductive metal through the holes in the prepeg backplane.Type: ApplicationFiled: March 28, 2012Publication date: January 3, 2013Applicant: SOLEXEL, INC.Inventors: Mehrdad M. Moslehi, David Xuan-Qi Wang, Karl-Josef Kramer, Sean M. Seutter, Sam Tone Tor, Anthony Calcaterra
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Publication number: 20120305063Abstract: Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.Type: ApplicationFiled: December 9, 2010Publication date: December 6, 2012Applicant: SOLEXEL, INC.Inventors: Mehrdad M. Moslehi, Pawan Kapur, Karl-Josef Kramer, David Xuan-Qi Wang, Sean M. Seutter, Virenda V. Rana, Anthony Calcaterra, Emmanuel Van Kerschaver
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Publication number: 20120272490Abstract: The present disclosure relates to methods and apparatuses for releasing a thin semiconductor substrate from a reusable template. The method involves forming a mechanically weak layer conformally on a semiconductor template. Then forming a thin semiconductor substrate conformally on the mechanically weak layer. The thin semiconductor substrate, the mechanically weak layer and the template forming a wafer. Then defining the border of the thin-film semiconductor substrate to be released by exposing the peripheral of the mechanically weak layer. Then releasing the thin-film semiconductor substrate by applying a controlled air flow parallel to said mechanically weak layer wherein the controlled air flow separates the thin semiconductor substrate and template according to lifting forces.Type: ApplicationFiled: May 3, 2012Publication date: November 1, 2012Applicant: SOLEXEL, INC.Inventors: Mehrdad M. Moslehi, David Xuan-Qi Wang, Sam Tone Tor, Karl-Josef Kramer
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Patent number: 8294026Abstract: A three-dimensional solar cell comprising a semiconductor substrate with an inverted pyramidal cavity, emitter metallization regions on ridges on the surface of the semiconductor substrate which define an opening of the inverted pyramidal cavity, and base metallization regions on a region which form the apex of the inverted pyramidal cavity. A method for fabricating a three-dimensional thin-film solar cell from an inverted pyramidal three-dimensional thin-film silicon substrate by doping ridges on the surface of the semiconductor substrate which define an opening of an inverted pyramidal cavity on the substrate to form an emitter region, and doping a region which forms the apex of the inverted pyramidal cavity to form a base region. Adding a surface passivation layer to the surface of the substrate. Selectively etching the passivation layer from the emitter region and base region. Then concurrently metallizing the emitter region and base region.Type: GrantFiled: November 13, 2009Date of Patent: October 23, 2012Assignee: Solexel, Inc.Inventors: David Xuan-Qi Wang, Mehrdad M. Moslehi
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Patent number: 8293558Abstract: The present disclosure relates to methods for selectively etching a porous semiconductor layer to separate a thin-film semiconductor substrate (TFSS) having planar or three-dimensional features from a corresponding semiconductor template. The method involves forming a conformal sacrificial porous semiconductor layer on a template. Next, a conformal thin film silicon substrate is formed on top of the porous silicon layer. The middle porous silicon layer is then selectively etched to separate the TFSS and semiconductor template. The disclosed advanced etching chemistries and etching methods achieve selective etching with minimal damage to the TFSS and template.Type: GrantFiled: March 8, 2010Date of Patent: October 23, 2012Assignee: Solexel, Inc.Inventors: David Xuan-Qi Wang, Mehrdad M. Moslehi, Rafael Ricolcol, Joe Kramer
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Patent number: 8288195Abstract: A method is presented for fabrication of a three-dimensional thin-film solar cell semiconductor substrate from a template. A semiconductor template having three-dimensional surface features comprising a top surfaces substantially aligned along a (100) crystallographic plane of semiconductor template and a plurality of inverted pyramidal cavities defined by sidewalls substantially aligned along a (111) crystallographic plane is formed according to an anisotropic etching process. A dose of relatively of high energy light-mass species is implanted in the template at a uniform depth and parallel to the top surfaces and said sidewalls defining the inverted pyramidal cavities of the template. The semiconductor template is annealed to convert the dose of relatively of high energy light-mass species to a mechanically-weak-thin layer. The semiconductor template is cleaved along the mechanically-weak-thin layer to release a three-dimensional thin-film semiconductor substrate from the semiconductor template.Type: GrantFiled: March 24, 2010Date of Patent: October 16, 2012Assignee: Solexel, Inc.Inventors: David Xuan-Qi Wang, Mehrdad M. Moslehi
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Patent number: 8278192Abstract: A method is provided for fabricating a thin-film semiconductor substrate by forming a porous semiconductor layer conformally on a reusable semiconductor template and then forming a thin-film semiconductor substrate conformally on the porous semiconductor layer. An inner trench having a depth less than the thickness of the thin-film semiconductor substrate is formed on the thin-film semiconductor substrate. An outer trench providing access to the porous semiconductor layer is formed on the thin-film semiconductor substrate and is positioned between the inner trench and the edge of the thin-film semiconductor substrate. The thin-film semiconductor substrate is then released from the reusable semiconductor template.Type: GrantFiled: February 8, 2010Date of Patent: October 2, 2012Assignee: SolexelInventors: David Xuan-Qi Wang, Mehrdad Moslehi
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Patent number: 8241940Abstract: This disclosure presents manufacturing methods and apparatus designs for making TFSSs from both sides of a re-usable semiconductor template, thus effectively increasing the substrate manufacturing throughput and reducing the substrate manufacturing cost. This approach also reduces the amortized starting template cost per manufactured substrate (TFSS) by about a factor of 2 for a given number of template reuse cycles.Type: GrantFiled: February 12, 2011Date of Patent: August 14, 2012Assignee: Solexel, Inc.Inventors: Mehrdad M. Moslehi, Karl-Josef Kramer, David Xuan-Qi Wang, Pawan Kapur, Somnath Nag, George D Kamian, Jay Ashjaee, Takao Yonehara
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Publication number: 20120174861Abstract: A semiconductor template having a top surface aligned along a (100) crystallographic orientation plane and an inverted pyramidal cavity defined by a plurality of walls aligned along a (111) crystallographic orientation plane. A method for manufacturing a semiconductor template by selectively removing silicon material from a silicon template to form a top surface aligned along a (100) crystallographic plane of the silicon template and a plurality of walls defining an inverted pyramidal cavity each aligned along a (111) crystallographic plane of the silicon template.Type: ApplicationFiled: January 9, 2012Publication date: July 12, 2012Applicant: SOLEXEL, INC.Inventors: David Xuan-Qi Wang, Mehrdad M. Moslehi
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Publication number: 20120167819Abstract: The disclosed subject matter pertains to deposition of thin film or thin foil materials in general, but more specifically to deposition of epitaxial monocrystalline or quasi-monocrystalline silicon film (epi film) for use in manufacturing of high efficiency solar cells. In operation, methods are disclosed which extend the reusable life and to reduce the amortized cost of a substrate or template used in the manufacturing process of silicon solar cells. Further, methods are disclosed which provide for the conversion of a low quality starting surface into an improved quality starting surface of a silicon wafer.Type: ApplicationFiled: December 31, 2011Publication date: July 5, 2012Applicant: SOLEXEL, INC.Inventors: Karl-Josef Kramer, Mehrdad M. Moslehi, David Xuan-Qi Wang, Rahim Kavari, Rafael Ricolcol, Jay Ashjaee
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Patent number: 8193076Abstract: The present disclosure relates to methods and apparatuses template. The method involves forming a mechanically weak layer conformally on a semiconductor template. Then forming a thin for releasing a thin semiconductor substrate from a reusable semiconductor substrate conformally on the mechanically weak layer. The thin semiconductor substrate, the mechanically weak layer and the template forming a wafer. Then defining the border of the thin-film semiconductor substrate to be released by exposing the peripheral of the mechanically weak layer. Then releasing the thin-film semiconductor substrate by applying a controlled air flow parallel to said mechanically weak layer wherein the controlled air flow separates the thin semiconductor substrate and template according to lifting forces.Type: GrantFiled: June 29, 2010Date of Patent: June 5, 2012Assignee: Solexel, Inc.Inventors: Mehrdad M. Moslehi, David Xuan-Qi Wang, Sam Tone Tor, Karl-Josef Kramer
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Publication number: 20120125256Abstract: Mechanisms are disclosed by which a semiconductor wafer, silicon in some embodiments, is repeatedly used to serve as a template and carrier for fabricating high efficiency capable thin semiconductor solar cells substrates. Mechanisms that enable such repeated use of these templates at consistent quality and with high yield are disclosed.Type: ApplicationFiled: August 13, 2011Publication date: May 24, 2012Applicant: SOLEXEL, INC.Inventors: Karl-Josef Kramer, Mehrdad M. Moslehi, David Xuan-Qi Wang, Subramanian Tamilmani, Sam Tone Tor, Rahim Kavari, Rafael Ricolcol, George Kamian, Joseph Leigh
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Publication number: 20120103408Abstract: Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, forming electrically conductive emitter plugs and base plugs on the interdigitated pattern, and attaching a backplane having a second interdigitated pattern of base electrodes and emitter electrodes at the conductive emitter and base plugs to form electrical interconnects.Type: ApplicationFiled: August 5, 2011Publication date: May 3, 2012Applicant: SOLEXEL, INC.Inventors: Mehrdad M. Moslehi, David Xuan-Qi Wang, Karl-Josef Kramer, Sean M. Seutter, Sam Tone Tor, Anthony Calcaterra
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Patent number: 8168465Abstract: A semiconductor template having a top surface aligned along a (100) crystallographic orientation plane and an inverted pyramidal cavity defined by a plurality of walls aligned along a (111) crystallographic orientation plane. A method for manufacturing a semiconductor template by selectively removing silicon material from a silicon template to form a top surface aligned along a (100) crystallographic plane of the silicon template and a plurality of walls defining an inverted pyramidal cavity each aligned along a (111) crystallographic plane of the silicon template.Type: GrantFiled: November 13, 2009Date of Patent: May 1, 2012Assignee: Solexel, Inc.Inventors: David Xuan-Qi Wang, Mehrdad M. Moslehi
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Publication number: 20120021560Abstract: The present disclosure presents a partially-transparent (see-through) three-dimensional thin film solar cell (3-D TFSC) substrate. The substrate includes a plurality of unit cells. Each unit cell structure has the shape of a truncated pyramid, and its parameters may be varied to allow a desired portion of sunlight to pass through.Type: ApplicationFiled: July 28, 2011Publication date: January 26, 2012Applicant: SOLEXEL, INC.Inventors: Mehrdad M. Moslehi, David Xuan-Qi Wang
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Patent number: 8053665Abstract: The present disclosure presents a partially-transparent (see-through) three-dimensional thin film solar cell (3-D TFSC) substrate. The substrate includes a plurality of unit cells. Each unit cell structure has the shape of a truncated pyramid, and its parameters may be varied to allow a desired portion of sunlight to pass through.Type: GrantFiled: November 27, 2009Date of Patent: November 8, 2011Assignee: Solexel, Inc.Inventors: Mehrdad M. Moslehi, David Xuan-Qi Wang