Abstract: Provided is an interleaved active neutral point clamped (ANPC) circuit including N (N?2) parallel bridge arms, including: direct current (DC) terminals, including a positive and a negative DC terminal; an alternating current (AC) terminal; a switching circuit connected between the positive DC terminal and the negative DC terminal and including a first, a second, a third, and a fourth switching transistor sequentially connected in series, series nodes of the first, the second, the third, and the fourth switching transistor being sequentially a first, a second, and a third node, where the second node is connected to a neutral line; and N parallel high-frequency switching circuits connected between the first node and the third node, each of the N high-frequency switching circuits including a first and a second high-frequency switching transistor connected in series, where a phase difference between two adjacent high-frequency switching circuits among the N high-frequency switching circuits is 2?/N.

Abstract: The present invention provides a Miller clamping device for parallel switching transistors and a driver comprising the same. The Miller clamping device includes: a driver chip including an output terminal and a built-in Miller clamping circuit with a Miller clamping terminal, the output terminal of the driver chip being configured to output a pulse width modulation signal; and a plurality of auxiliary Miller clamping circuits, each of the auxiliary Miller clamping circuits being connected between a gate of a corresponding switching transistor and the Miller clamping terminal of the built-in Miller clamping circuit. When the built-in Miller clamping circuit is triggered for Miller clamping, a Miller current generated by the corresponding switching transistor flows to a first direct-current (DC) voltage through a corresponding auxiliary Miller clamping circuit. The Miller clamping device of the present invention can perform Miller clamping on the parallel switching transistors and reduce the circuit cost.

Abstract: A method and system for locking the resonance frequency of ring resonators by using laser sources to emit a plurality of different wavelengths, applying a tagging signal to each of the wavelengths, multiplexing the tagged wavelengths using a wavelength division multiplexor, coupling the multiplexed tagged wavelengths onto a bus waveguide, detecting the multiplexed tagged wavelengths with a first photodetector disposed before a first ring resonator and a second photodetector disposed after a last ring resonator of a plurality of ring resonators, sending the signals detected by the first and second photodetector to a processor, which identifies and processes the tagging signals, generating a control signal for each ring resonator, by the processor and applying the control signals to phase shifters on each ring resonator of the plurality of ring resonators to tune and align the resonance wavelengths of the ring resonators with the wavelengths of the corresponding laser sources.

Abstract: An optical apparatus comprising an integrated germanium photodetector associated with a silicon nitride launch waveguide, the integrated germanium photodetector comprising a silicon layer, a germanium layer disposed atop the silicon layer, a plurality of conductive vias, at least one conductive via of the plurality of conductive vias being disposed atop the germanium layer, and a plurality of metal contacts each interconnected to each of the plurality of conductive vias; wherein the silicon nitride launch waveguide extends over a length of the silicon layer, and such that to create a coupling region between the silicon nitride launch waveguide and the germanium layer; and wherein, when an optical signal is launched into the silicon nitride launch waveguide, the optical signal is caused to be coupled into the integrated germanium photodetector at the coupling region, such that to be absorbed by the germanium layer.

Abstract: The present invention provides a multiple input converter for outputting power from AC power or a battery to positive and negative DC buses. The multiple input converter includes at least one bridge arm unit and a bidirectional DC-DC conversion unit. The bridge arm unit corresponding to one phase of the AC power includes an upper bridge arm and a lower bridge arm that can independently form a two-level converter. In a battery mode, the upper and lower bridge arms discharge power from the rechargeable battery to the positive and negative DC buses, and the bidirectional DC-DC conversion unit discharges power from the rechargeable battery to the positive and negative DC buses or balances voltages of the positive and negative DC buses. In a mains mode, the bridge arm units are simultaneously connected to the AC power for rectifying and outputting the power to the positive and negative DC buses.

Abstract: A control system for a three-phase inverter includes an instantaneous value voltage controller and an equivalent effective value voltage controller. The instantaneous value voltage controller is configured to feed back and control an instantaneous value of an inverter output voltage. The equivalent 5 effective value voltage controller is configured to perform an orthogonal decomposition feedback control on an effective value of the inverter output voltage. The equivalent effective value voltage controller is configured to perform integral compensation respectively on a real-axis voltage and an imaginary-axis voltage of a two-phase rotating coordinate system of the three-phase inverter. An output of the instantaneous value 10 voltage controller and an output of the equivalent effective value voltage controller are used to obtain the inverter output voltage through a delay stage transfer function and a controlled object transfer function.

Abstract: The present invention provides a power factor correction circuit, a power factor correction assembly and an on-line uninterruptible power supply including the same. The power factor correction circuit comprises a pulse width modulated rectifier and an isolated DC-DC converter, wherein an output of the pulse width modulated rectifier is connected to an input of the isolated DC-DC converter. The power factor correction assembly comprises a plurality of power factor correction circuits described above, wherein inputs of pulse width modulated rectifiers in the plurality of power factor correction circuits are connected in series, and outputs of isolated DC-DC converters in the plurality of power factor correction circuits are connected in parallel. The power factor correction assembly of the present invention needs no line-frequency transformer and has the advantages of small size, low cost and improved operation reliability.

Abstract: A method and system for locking the resonance frequency of ring resonators by using laser sources to emit a plurality of different wavelengths, applying a tagging signal to each of the wavelengths, multiplexing the tagged wavelengths using a wavelength division multiplexor, coupling the multiplexed tagged wavelengths onto a bus waveguide, detecting the multiplexed tagged wavelengths with a first photodetector disposed before a first ring resonator and a second photodetector disposed after a last ring resonator of a plurality of ring resonators, sending the signals detected by the first and second photodetector to a processor, which identifies and processes the tagging signals, generating a control signal for each ring resonator, by the processor and applying the control signals to phase shifters on each ring resonator of the plurality of ring resonators to tune and align the resonance wavelengths of the ring resonators with the wavelengths of the corresponding laser sources.

Abstract: A method and system for locking the resonance frequency of ring resonators by using laser sources to emit a plurality of different wavelengths, applying a tagging signal to each of the wavelengths, multiplexing the tagged wavelengths using a wavelength division multiplexor, coupling the multiplexed tagged wavelengths onto a bus waveguide, detecting the multiplexed tagged wavelengths with a first photodetector disposed before a first ring resonator and a second photodetector disposed after a last ring resonator of a plurality of ring resonators, sending the signals detected by the first and second photodetector to a processor, which identifies and processes the tagging signals, generating a control signal for each ring resonator, by the processor and applying the control signals to phase shifters on each ring resonator of the plurality of ring resonators to tune and align the resonance wavelengths of the ring resonators with the wavelengths of the corresponding laser sources.

Abstract: The present invention provides a temperature protective device for a filter capacitor bank. The capacitor bank comprises two or more capacitors which are arranged in an array manner. The temperature protective device comprises a temperature measurement device which comprises: a cover body covering the capacitor bank; a single temperature sensor fixed at a center area of the cover body, which is used for measuring a temperature value of the capacitor bank; and a heat conduction pad located between the cover body and the capacitor bank, wherein the heat conduction pad and the cover body have fitted shapes. The temperature protective device of the present invention saves cost and can accurately realize temperature protection of the capacitor bank.

Abstract: The present invention provides a power factor correction circuit (21, 22), a power factor correction assembly (2) and an on-line uninterruptible power supply including the same. The power factor correction circuit (21) comprises a pulse width modulated rectifier (211, 221) and an isolated DC-DC converter (212, 222), wherein an output of the pulse width modulated rectifier (211, 221) is connected to an input of the isolated DC-DC converter (212, 222). The power factor correction assembly (2) comprises a plurality of power factor correction circuits (21, 22) described above, wherein inputs of pulse width modulated rectifiers (211, 221) in the plurality of power factor correction circuits (21, 22) are connected in series, and outputs of isolated DC-DC converters (212, 222) in the plurality of power factor correction circuits (21, 22) are connected in parallel.

Abstract: The present invention provides an apparatus to actively balance the thermal performance of paralleled power devices, comprising: a monitoring unit for monitoring the temperature of each power device of the paralleled power devices to judge whether the temperature is out of balance; and a balancing unit for adjusting power loss of the power devices with monitored higher temperatures so as to achieve the balance of the thermal performance of the paralleled power devices.

Abstract: A stable control system for a three-phase rectification controller circuit is provided. The stable control system filters voltage harmonics and performs attenuation feedback compensation on current harmonics to enable a rectification circuit to achieve high stability and low THDi, while performing filtering on a direct current bus voltage in the case of an unbalanced load, so as to filter out voltage harmonics and enable the circuit to support the unbalanced load. A stable control system for an interleaved direct current booster circuit is also provided. The stable control system equalizes inter-leg currents such that a battery has good dynamic effects and good current equalization performance.

Abstract: An integrated transmitter chip having a transmitter block, the transmitter block having: a first power divider optically connected to a first input port; a second power divider optically connected to a second input port; a first plurality of optical channels optically branched from the first power divider; a second plurality of optical channels optically branched from the second power divider; a first multiplexer optically connected to a first optical channel of the first plurality of optical channels and a first optical channel of the second plurality of optical channels, and a second multiplexer optically connected to a second optical channel of the first plurality of optical channels and a second optical channel of the second plurality of optical channels. The integrated transmitter chip may be configured to utilize polarization division multiplexing or wavelength division multiplexing to combine optical signals depending on the application of the corresponding integrated transmitter chip.

Abstract: An integrated transmitter chip comprising: at least one input port disposed at a first end of the integrated transmitter chip; a first variable power divider optically connected to each input port of the at least one input port; a second and a third variable power dividers optically branched from each first variable power divider; a first and a second optical channel optically branched from the second variable power divider, a third and a fourth optical channel optically branched from the third variable power divider; and at least one WDM optically attached to corresponding optical channels and configured to selectively modify the polarization of and multiplex corresponding optical signals into a output optical signal, wherein a laser beam is launched into an input port, split by corresponding variable power dividers based upon each dividers corresponding splitting ratio, then multiplexed and combined into an output optical signal having dual polarization modes.

Abstract: The present disclosure provides a multi-input power converter, including three bridge arm units connected between a three-phase alternating current power supply and a positive/negative direct current bus. A first capacitor and a second capacitor are connected in series between the positive direct current bus and the negative direct current bus, and a node formed by connecting the capacitors is connected to a neutral point. Each bridge arm unit includes an inductor and a bidirectional switch unit that are connected in series, and a current direction control bridge arm connected between the positive direct current bus and the negative direct current bus, and a node formed by connecting the inductor to the bidirectional switch unit is connected to the current direction control bridge arm. Second ends of bidirectional switch units of the three bridge arm units are connected to the neutral point.

Abstract: An integrated Mach-Zehnder Interferometer comprising: an upper arm and a lower arm; and a differential thermo-optic phase shifter comprising a first heating element and a second heating element collocated with the upper arm and the lower arm, respectively, the first heating element having a first resistance and the second heating element having a second resistance, an upper pad electrically connected to the first heating element, the upper pad being adapted to receive a first voltage, a lower pad electrically connected to the second heating element, the lower pad being adapted to receive a second voltage, and a common pad electrically connected to the first heating element and the second heating element, the common pad being adapted to receive a third voltage; wherein, when the first, the second, and the third voltages are applied to the upper, the lower, and the common pads, respectively, a phase shift difference is thermally produced.