Patents by Inventor Debra M. Bell
Debra M. Bell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11664084Abstract: Methods, devices, and systems related to memory device on-die ECC data are described. In an example, a scrub operation can be performed on data in order to determine which rows of memory cells in an array include a particular number of errors. The particular number of errors can be a number of errors that exceed a threshold number of errors. An address of the determined rows with the particular number of errors can be stored in memory cells of the array for later access. The address of the determined rows can be accessed to perform a user-initiated repair operation, a self-repair operation, a refresh operation, and/or to alter timing of access of the cells or alter voltage of the cells.Type: GrantFiled: August 2, 2021Date of Patent: May 30, 2023Assignee: Micron Technology, Inc.Inventors: Anthony D. Veches, Randall J. Rooney, Debra M. Bell
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Publication number: 20230122571Abstract: Systems, apparatuses, and methods related to using memory device sensors are described. Some memory system or device types include sensors embedded in their circuitry. For instance, another device can be coupled to a memory device with an embedded sensor. The memory device can transmit a signal representing sensor data generated by the embedded sensor using a sensor output coupled to the other device. A controller coupled to a memory device may determine one or more threshold values of a sensor or sensors embedded in a memory device. The memory device may transmit an indication responsive to one or more sensors detecting a value greater or less than a threshold and may transmit the indication to another device.Type: ApplicationFiled: December 15, 2022Publication date: April 20, 2023Inventors: Cheryl M. O'Donnell, Erica M. Gove, Zahra Hosseinimakarem, Debra M. Bell, Roya Baghi
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Patent number: 11586958Abstract: Embodiments of the disclosure are drawn to apparatuses, systems, methods for performing operations associated with machine learning. Machine learning operations may include processing a data set, training a machine learning algorithm, and applying a trained algorithm to a data set. Some of the machine learning operations, such as pattern matching operations, may be performed within a memory device.Type: GrantFiled: April 6, 2020Date of Patent: February 21, 2023Assignee: MICRON TECHNOLOGY, INC.Inventors: Di Wu, Anthony D. Veches, James S. Rehmeyer, Debra M. Bell, Libo Wang
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Patent number: 11581031Abstract: Memory with partial bank refresh is disclosed herein. In one embodiment, a memory system includes a memory controller and a memory device operably connected to the memory controller. The memory device includes (i) a memory array having a memory bank with a plurality of memory cells arranged in a plurality of memory rows and (ii) circuitry. In some embodiments, the circuitry is configured to disable at least one memory row of the memory bank from receiving refresh commands such that memory cells of the at least one memory row are not refreshed during refresh operations of the memory device. In some embodiments, the memory controller is configured to track memory rows that include utilized memory cells and/or to write data to the memory rows in accordance with a programming sequence of the memory device.Type: GrantFiled: June 3, 2021Date of Patent: February 14, 2023Assignee: Micron Technology, Inc.Inventors: Dale H. Hiscock, Debra M. Bell, Michael Kaminski, Joshua E. Alzheimer, Anthony D. Veches, James S. Rehmeyer
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Publication number: 20230031842Abstract: Methods, devices, and systems related to memory device on-die ECC data are described. In an example, a scrub operation can be performed on data in order to determine which rows of memory cells in an array include a particular number of errors. The particular number of errors can be a number of errors that exceed a threshold number of errors. An address of the determined rows with the particular number of errors can be stored in memory cells of the array for later access. The address of the determined rows can be accessed to perform a user-initiated repair operation, a self-repair operation, a refresh operation, and/or to alter timing of access of the cells or alter voltage of the cells.Type: ApplicationFiled: August 2, 2021Publication date: February 2, 2023Inventors: Anthony D. Veches, Randall J. Rooney, Debra M. Bell
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Publication number: 20230028176Abstract: Methods, systems, and devices for persistent health monitoring for volatile memory devices are described. A memory device may determine that an operating condition associated with an array of memory cells on the device, such as a temperature, current, voltage, or other metric of health status is outside of a range associated with a risk of device degradation. The memory device may monitor a duration over which the operating condition is outside of the range, and may determine whether the duration satisfies a threshold. In some cases, the memory device may store an indication of when (e.g., each time) the duration satisfied the threshold. The memory device may store the one or more indications in one or more non-volatile storage elements, such as fuses, which may enable the memory device to maintain a persistent indication of a cumulative duration over which the memory device is operated with operating conditions outside of the range.Type: ApplicationFiled: September 29, 2022Publication date: January 26, 2023Inventors: Debra M Bell, Kristen M. Hopper, Erika Prosser, Aaron P. Boehm
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Publication number: 20230029003Abstract: Memory devices and systems with programmable refresh order and stagger times are disclosed herein. In one embodiment, a memory device includes a first memory bank group and a second memory bank group. The memory device is configured, in response to a refresh command, to perform a first refresh operation on the first memory bank group at a first time and a second refresh operation on the second memory bank group at a second time after the first time. The memory device is further configured to perform, in response to a read or write command, a read or write operation on the first memory bank group, the second memory bank group, or both the first and second memory bank groups after beginning the first refresh operation and before completing the second refresh operation.Type: ApplicationFiled: September 21, 2022Publication date: January 26, 2023Inventors: Vaughn N. Johnson, Debra M. Bell, Miles S. Wiscombe, Brian T. Pecha, Kyle Alexander
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Patent number: 11550687Abstract: Systems, apparatuses, and methods related to using memory device sensors are described. Some memory system or device types include sensors embedded in their circuitry. For instance, another device can be coupled to a memory device with an embedded sensor. The memory device can transmit a signal representing sensor data generated by the embedded sensor using a sensor output coupled to the other device. A controller coupled to a memory device may determine one or more threshold values of a sensor or sensors embedded in a memory device. The memory device may transmit an indication responsive to one or more sensors detecting a value greater or less than a threshold and may transmit the indication to another device.Type: GrantFiled: December 9, 2019Date of Patent: January 10, 2023Assignee: Micron Technology, Inc.Inventors: Cheryl M. O'Donnell, Erica M. Gove, Zahra Hosseinimakarem, Debra M. Bell, Roya Baghi
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Publication number: 20220404892Abstract: Systems, apparatuses, and methods related to using memory device sensors are described. Some memory system or device types include sensors embedded in their circuitry. For instance, a device can be coupled to a memory device with an embedded sensor. The memory device can transmit the data generated by the embedded sensor using a sensor output coupled to the device. The memory device may generate, based at least in part on a characteristic of a memory device, a signal from a sensor embedded in the memory device and transmit the signal generated by the sensor from the memory device to another device coupled to the memory device.Type: ApplicationFiled: August 22, 2022Publication date: December 22, 2022Inventors: Debra M. Bell, Roya Baghi, Erica M. Gove, Zahra Hosseinimakarem, Cheryl M. O'Donnell
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Patent number: 11532358Abstract: Memory devices and systems with automatic background precondition upon powerup, and associated methods, are disclosed herein. In one embodiment, a memory device includes a memory array having a plurality of memory cells and a fuse array configured to store precondition data. The precondition data can identify a portion of the memory array, specify a predetermined precondition state, or a combination thereof. When the memory device powers on, the memory device can be configured to automatically retrieve the precondition data from the fuse array and/or to write memory cells in the portion of the memory array to the predetermined precondition state before executing an access command.Type: GrantFiled: August 28, 2019Date of Patent: December 20, 2022Assignee: Micron Technology, Inc.Inventors: Anthony D. Veches, Debra M. Bell, James S. Rehmeyer, Robert Bunnell, Nathaniel J. Meier
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Publication number: 20220391396Abstract: Embodiments of the disclosure are drawn to apparatuses, systems, methods, and memories that are capable of performing pattern matching operations within a memory device. The pattern matching operations may be performed on data stored within the memory based on a pattern stored in a register. The result of the pattern matching operation may be provided by the memory. The data on which the pattern matching operation is performed may not be output from the memory during the pattern matching operation.Type: ApplicationFiled: August 15, 2022Publication date: December 8, 2022Applicant: MICRON TECHNOLOGY, INC.Inventors: DEBRA M. BELL, LIBO WANG, DI WU, JAMES S. REHMEYER, ANTHONY D. VECHES
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Publication number: 20220391334Abstract: Memory devices and systems with improved command/address bus utilization are disclosed herein. In one embodiment, a memory device comprises a plurality of external command/address terminals and a command decoder. The plurality of external command/address terminals are configured to receive a command as a corresponding plurality of command/address bits. A first set of the command/address bits indicate a read or write operation. A second set of the command/address bits indicate whether to execute a refresh operation. The memory device is configured to, in response to the first set of command/address bits, execute the read or write operation on a portion of a memory array. The memory device is further configured to, in response to the second set of command/address bits, execute the refresh operation to refresh at least one memory bank of the memory array when the second set of command/address bits indicate that the refresh operation should be executed.Type: ApplicationFiled: August 6, 2022Publication date: December 8, 2022Inventors: Debra M. Bell, Vaughn N. Johnson, Kyle Alexander, Gary L. Howe, Brian T. Pecha, Miles S. Wiscombe
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Patent number: 11488651Abstract: A memory device may include a phase driver circuit that may output a first voltage for refreshing a plurality of memory cells. The memory device may also include a plurality of word line driver circuits that may receive the first voltage via the phase driver circuit, such that each word line driver circuit of the plurality of word line driver circuits may provide the first voltage to a respective word line associated with a respective portion of the plurality of memory cells. In addition, each word line driver circuit may refresh the respective portion of the plurality of memory cells based on a respective word line enable signal provided to a first switch of the respective word line driver circuit.Type: GrantFiled: December 28, 2020Date of Patent: November 1, 2022Assignee: Micron Technology, Inc.Inventors: James S. Rehmeyer, Debra M. Bell, George B. Raad, Brian P. Callaway, Joshua E. Alzheimer
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Patent number: 11481265Abstract: Methods, systems, and devices for persistent health monitoring for volatile memory devices are described. A memory device may determine that an operating condition associated with an array of memory cells on the device, such as a temperature, current, voltage, or other metric of health status is outside of a range associated with a risk of device degradation. The memory device may monitor a duration over which the operating condition is outside of the range, and may determine whether the duration satisfies a threshold. In some cases, the memory device may store an indication of when (e.g., each time) the duration satisfied the threshold. The memory device may store the one or more indications in one or more non-volatile storage elements, such as fuses, which may enable the memory device to maintain a persistent indication of a cumulative duration over which the memory device is operated with operating conditions outside of the range.Type: GrantFiled: June 6, 2019Date of Patent: October 25, 2022Assignee: Micron Technology, Inc.Inventors: Debra M. Bell, Kristen M. Hopper, Erika Prosser, Aaron P. Boehm
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Publication number: 20220335993Abstract: Tracking circuitry may be used to determine if commands and/or command sequences include illegal commands and/or illegal command sequences. If the commands and/or command sequences include illegal commands and/or illegal command sequences, the tracking circuitry may activate signals that prevent execution of the commands and/or notice of the detected illegal commands and/or command sequences.Type: ApplicationFiled: July 7, 2022Publication date: October 20, 2022Applicant: MICRON TECHNOLOGY, INC.Inventors: Di Wu, Debra M. Bell, Anthony D. Veches, James S. Rehmeyer, Libo Wang
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Publication number: 20220334735Abstract: Apparatuses and methods related to updating data lines for data generation in, for example, a memory device or a computing system that includes a memory device. Updating data lines can include updating a plurality of data lines. The plurality of data lines can provide data form the memory array responsive to a receipt of the access command. The plurality of data lines can also be updated responsive to a determination that an access command received at a memory device is unauthorized.Type: ApplicationFiled: July 1, 2022Publication date: October 20, 2022Inventors: Debra M. Bell, Naveh Malihi
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Patent number: 11468939Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which memory devices are configured to conditionally activate certain rows during refresh operations such that the memory devices can execute operations directed to the activated rows concurrently with the refresh operations. In some embodiments, the memory device receives an activate (ACT) command directed to a section of a memory bank while performing refresh operations for the memory bank. The memory device may carry out the ACT command if certain conditions are satisfied not to corrupt the data being refreshed. Subsequently, the memory device generates a signal to indicate the ACT command has been accepted to activate a row identified by the ACT command. Further, the memory device can perform subsequent access commands directed to the row, in parallel with the refresh operations.Type: GrantFiled: November 30, 2020Date of Patent: October 11, 2022Assignee: Micron Technology, Inc.Inventors: Miles S. Wiscombe, Debra M. Bell, Brian T. Pecha, Vaughn N. Johnson, Kyle Alexander
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Patent number: 11468938Abstract: Memory devices and systems with programmable refresh order and stagger times are disclosed herein. In one embodiment, a memory device includes a first memory bank group and a second memory bank group. The memory device is configured, in response to a refresh command, to perform a first refresh operation on the first memory bank group at a first time and a second refresh operation on the second memory bank group at a second time after the first time. The memory device is further configured to perform, in response to a read or write command, a read or write operation on the first memory bank group, the second memory bank group, or both the first and second memory bank groups after beginning the first refresh operation and before completing the second refresh operation.Type: GrantFiled: November 12, 2020Date of Patent: October 11, 2022Assignee: Micron Technology, Inc.Inventors: Vaughn N. Johnson, Debra M. Bell, Miles S. Wiscombe, Brian T. Pecha, Kyle Alexander
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Patent number: 11442940Abstract: Embodiments of the disclosure are drawn to apparatuses, systems, methods, and memories that are capable of performing pattern matching operations within a memory device. The pattern matching operations may be performed on data stored within the memory based on a pattern stored in a register. The result of the pattern matching operation may be provided by the memory. The data on which the pattern matching operation is performed may not be output from the memory during the pattern matching operation.Type: GrantFiled: March 3, 2020Date of Patent: September 13, 2022Assignee: Micron Technology, Inc.Inventors: Debra M. Bell, Libo Wang, Di Wu, James S. Rehmeyer, Anthony D. Veches
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Patent number: 11435811Abstract: Systems, apparatuses, and methods related to using memory device sensors are described. Some memory system or device types include sensors embedded in their circuitry. For instance, a device can be coupled to a memory device with an embedded sensor. The memory device can transmit the data generated by the embedded sensor using a sensor output coupled to the device. The memory device may generate, based at least in part on a characteristic of a memory device, a signal from a sensor embedded in the memory device and transmit the signal generated by the sensor from the memory device to another device coupled to the memory device.Type: GrantFiled: December 9, 2019Date of Patent: September 6, 2022Assignee: Micron Technology, Inc.Inventors: Debra M. Bell, Roya Baghi, Erica M. Gove, Zahra Hosseinimakarem, Cheryl M. O'Donnell