Patents by Inventor Deepak Kulkarni

Deepak Kulkarni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210357927
    Abstract: Methods and systems are provided authenticating transactions on a token contract. A transaction rule compliance engine that utilizes stored user information to ensure that transactions of tokens associated with the token contract comply with defined ruleset. A curation system maintains the stored user information on the token contract or elsewhere on the blockchain system.
    Type: Application
    Filed: September 17, 2019
    Publication date: November 18, 2021
    Inventors: David Ben Kita, David Charles Williams, Dhruva Deepak Kulkarni, Mateusz Wojciech Pospieszny, Pramod Madabhushi
  • Publication number: 20200395297
    Abstract: Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.
    Type: Application
    Filed: September 1, 2020
    Publication date: December 17, 2020
    Inventors: Robert STARKSTON, Debendra MALLIK, John S. GUZEK, Chia-Pin CHIU, Deepak KULKARNI, Ravi V. MAHAJAN
  • Patent number: 10796988
    Abstract: Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: October 6, 2020
    Assignee: Intel Corporation
    Inventors: Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Deepak Kulkarni, Ravi V. Mahajan
  • Publication number: 20200258847
    Abstract: Embodiments disclosed herein include electronic packages and methods of forming such electronic packages. In an embodiment, the electronic package comprises a mold layer having a first surface and a second surface opposite the first surface, and a plurality of first dies embedded in the mold layer. In an embodiment, each of the plurality of first dies has a surface that is substantially coplanar with the first surface of the mold layer. In an embodiment, the electronic package further comprises a second die embedded in the mold layer. In an embodiment, the second die is positioned between the plurality of first dies and the second surface of the mold layer.
    Type: Application
    Filed: February 12, 2019
    Publication date: August 13, 2020
    Inventors: Srinivas PIETAMBARAM, Gang DUAN, Deepak KULKARNI, Rahul MANEPALLI, Xiaoying GUO
  • Publication number: 20200104519
    Abstract: A computer-implemented method includes receiving permission data from an application server. The permission data is for an account to access a software application of a plurality of software applications, and the application server is configured to provide the software application. Responsive to receiving the permission data from the application server, storing the permission data in a native database. Receiving a request to grant the account access to the software application. Determining whether the database stores the permission data for the account to access the software application. In response to determining that the database stores the permission data, granting access to the account to access the software application.
    Type: Application
    Filed: June 21, 2019
    Publication date: April 2, 2020
    Inventors: Jeffrey Lawrence Farber, Sidney Gee-Lake Shek, Pramod Shashidhara, Deepak Kulkarni, Jonathan Paul Gilbert
  • Publication number: 20190312019
    Abstract: Techniques are provided for fine node heterogeneous-chip packages. In an example, a method of making a heterogeneous-chip package can include coupling electrical terminals of a first side of a first base die to electrical terminals of a first side of a second base die using a silicon bridge, forming an organic substrate about the silicon bridge and adjacent the first sides of the first and second base dies, and coupling a fine node die to a second side of at least one of the first base die or the second base die.
    Type: Application
    Filed: April 10, 2018
    Publication date: October 10, 2019
    Inventors: Srinivas Pietambaram, Gang Duan, Deepak Kulkarni
  • Publication number: 20190236558
    Abstract: Systems and methods are provided to enable the execution of transactions, such as monetary or monetary currency transactions, on a mobile platform, while maintaining compliance requirements. The systems and methods described herein generally includes a server (e.g., management server), an associate computing device, and a client device. The server can communicably couple to a plurality of client devices that are accessible by at least one user to enable the at least one user to communicated with the server. The server can receive at least one request for a transaction from at least one of the plurality of client devices. The server can generate at least one form based on the request that includes a plurality of fields. The serve can transmit the at least one form to at least one of the plurality of client devices to enable at least one user to access the at least one form.
    Type: Application
    Filed: January 30, 2018
    Publication date: August 1, 2019
    Inventors: Spencer Miles, Eytan Daniyalzade, Chaitanya Deepak Kulkarni
  • Patent number: 10366951
    Abstract: Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: July 30, 2019
    Assignee: Intel Corporation
    Inventors: Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Deepak Kulkarni, Ravindranath V. Mahajan
  • Patent number: 10354093
    Abstract: A computer-implemented method includes receiving a first request to grant an account access to a software application of a plurality of software applications, and determining whether a native database stores first permission data for the account to access the software application. This example method further includes, in response to determining that the database does not store the first permission data: sending, via a network to an application server configured to provide the software application, a second request for second permission data for the account to access the software application; responsive to sending the second request to the application server, receiving the second permission data from the application server; responsive to receiving the second permission data from the application server, storing the second permission data in the database; and granting, in accordance with the second permission data, access to the account to access the software application.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: July 16, 2019
    Assignees: Atlassian Pty Ltd, Atlassian, Inc.
    Inventors: Jeffrey Lawrence Farber, Sidney Gee-Lake Shek, Pramod Shashidhara, Deepak Kulkarni, Jonathan Paul Gilbert
  • Publication number: 20180350737
    Abstract: Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.
    Type: Application
    Filed: June 7, 2018
    Publication date: December 6, 2018
    Inventors: Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Deepak Kulkarni, Ravindranath V. Mahajan
  • Publication number: 20170287831
    Abstract: Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.
    Type: Application
    Filed: June 12, 2017
    Publication date: October 5, 2017
    Inventors: Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Deepak Kulkarni, Ravindranath V. Mahajan
  • Patent number: 9679843
    Abstract: Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: June 13, 2017
    Assignee: Intel Corporation
    Inventors: Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Deepak Kulkarni, Ravindranath V. Mahajan
  • Patent number: 9520376
    Abstract: An example includes a die package including a microelectronic die having a lower die surface, an upper die surface parallel to the lower die surface, and a die side, the microelectronic die including an active region and an inactive region. The example optionally includes a heat spreader having a lower heat spreader surface, an upper heat spreader surface parallel to the lower heat spreader surface, and at least one heat spreader side, the heat spreader disposed on the upper surface of the microelectronic die in thermal communication with the inactive region of the die and electrically insulated from the active region. The example optionally includes an encapsulation material encapsulating the die side and the heat spreader side and lower heat spreader surface, the encapsulation material including a lower surface substantially parallel to the die lower surface and an upper surface substantially parallel to the die upper surface.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: December 13, 2016
    Assignee: Intel Corporation
    Inventors: Weng Hong Teh, Deepak Kulkarni, Chia-Pin Chiu, Tannaz Harirchian, John S. Guzek
  • Publication number: 20160197037
    Abstract: Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.
    Type: Application
    Filed: February 22, 2016
    Publication date: July 7, 2016
    Inventors: Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Deepak Kulkarni, Ravindranath V. Mahajan
  • Patent number: 9269701
    Abstract: Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: February 23, 2016
    Assignee: Intel Corporation
    Inventors: Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Deepak Kulkarni, Ravi V. Mahajan
  • Publication number: 20160027757
    Abstract: An example includes a die package including a microelectronic die having a lower die surface, an upper die surface parallel to the lower die surface, and a die side, the microelectronic die including an active region and an inactive region. The example optionally includes a heat spreader having a lower heat spreader surface, an upper heat spreader surface parallel to the lower heat spreader surface, and at least one heat spreader side, the heat spreader disposed on the upper surface of the microelectronic die in thermal communication with the inactive region of the die and electrically insulated from the active region. The example optionally includes an encapsulation material encapsulating the die side and the heat spreader side and lower heat spreader surface, the encapsulation material including a lower surface substantially parallel to the die lower surface and an upper surface substantially parallel to the die upper surface.
    Type: Application
    Filed: October 5, 2015
    Publication date: January 28, 2016
    Inventors: Weng Hong Teh, Deepak Kulkarni, Chia-Pin Chiu, Tannaz Harirchian, John S. Guzek
  • Publication number: 20150340353
    Abstract: Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.
    Type: Application
    Filed: August 5, 2015
    Publication date: November 26, 2015
    Inventors: Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Deepak Kulkarni, Ravi V. Mahajan
  • Patent number: 9153552
    Abstract: An example includes a die package including a microelectronic die having a lower die surface, an upper die surface parallel to the lower die surface, and a die side, the microelectronic die including an active region and an inactive region. The example optionally includes a heat spreader having a lower heat spreader surface, an upper heat spreader surface parallel to the lower heat spreader surface, and at least one heat spreader side, the heat spreader disposed on the upper surface of the microelectronic die in thermal communication with the inactive region of the die and electrically insulated from the active region. The example optionally includes an encapsulation material encapsulating the die side and the heat spreader side and lower heat spreader surface, the encapsulation material including a lower surface substantially parallel to the die lower surface and an upper surface substantially parallel to the die upper surface.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: October 6, 2015
    Assignee: Intel Corporation
    Inventors: Weng Hong Teh, Deepak Kulkarni, Chia-Pin Chiu, Tannaz Harirchian, John S. Guzek
  • Patent number: 9136236
    Abstract: Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: September 15, 2015
    Assignee: Intel Corporation
    Inventors: Robert Starkston, Debendra Mallik, John S. Guzek, Chia-Pin Chiu, Deepak Kulkarni, Ravi V. Mahajan
  • Publication number: 20150104907
    Abstract: An example includes a die package including a microelectronic die having a lower die surface, an upper die surface parallel to the lower die surface, and a die side, the microelectronic die including an active region and an inactive region. The example optionally includes a heat spreader having a lower heat spreader surface, an upper heat spreader surface parallel to the lower heat spreader surface, and at least one heat spreader side, the heat spreader disposed on the upper surface of the microelectronic die in thermal communication with the inactive region of the die and electrically insulated from the active region. The example optionally includes an encapsulation material encapsulating the die side and the heat spreader side and lower heat spreader surface, the encapsulation material including a lower surface substantially parallel to the die lower surface and an upper surface substantially parallel to the die upper surface.
    Type: Application
    Filed: December 15, 2014
    Publication date: April 16, 2015
    Inventors: Weng Hong Teh, Deepak Kulkarni, Chia-Pin Chiu, Tannaz Harirchian, John S. Guzek