Abstract: An example includes a die package including a microelectronic die having a lower die surface, an upper die surface parallel to the lower die surface, and a die side, the microelectronic die including an active region and an inactive region. The example optionally includes a heat spreader having a lower heat spreader surface, an upper heat spreader surface parallel to the lower heat spreader surface, and at least one heat spreader side, the heat spreader disposed on the upper surface of the microelectronic die in thermal communication with the inactive region of the die and electrically insulated from the active region. The example optionally includes an encapsulation material encapsulating the die side and the heat spreader side and lower heat spreader surface, the encapsulation material including a lower surface substantially parallel to the die lower surface and an upper surface substantially parallel to the die upper surface.

Abstract: An integrated circuit including an active region a passive region and a cut line in the passive region includes a passivation layer that includes an outer nitride layer over an oxide layer. The integrated circuit also includes a crack stop below the passivation layer and in the passive region, and a solder ball in the active region. The passivation layer has a trench formed therein in a location that is further from the active region than the crack stop and closer to the active region than the cut line, the trench passing completely through the outer nitride layer and a least a portion of the way through the oxide layer.

Abstract: An example includes a die package including a microelectronic die having a lower die surface, an upper die surface parallel to the lower die surface, and a die side, the microelectronic die including an active region and an inactive region. The example optionally includes a heat spreader having a lower heat spreader surface, an upper heat spreader surface parallel to the lower heat spreader surface, and at least one heat spreader side, the heat spreader disposed on the upper surface of the microelectronic die in thermal communication with the inactive region of the die and electrically insulated from the active region. The example optionally includes an encapsulation material encapsulating the die side and the heat spreader side and lower heat spreader surface, the encapsulation material including a lower surface substantially parallel to the die lower surface and an upper surface substantially parallel to the die upper surface.

Abstract: Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.

Abstract: An integrated circuit including an active region a passive region and a cut line in the passive region includes a passivation layer that includes an outer nitride layer over an oxide layer. The integrated circuit also includes a crack stop below the passivation layer and in the passive region, and a solder ball in the active region. The passivation layer has a trench formed therein in a location that is further from the active region than the crack stop and closer to the active region than the cut line, the trench passing completely through the outer nitride layer and a least a portion of the way through the oxide layer.

Abstract: An integrated circuit including an active region a passive region and a cut line in the passive region includes a passivation layer that includes an outer nitride layer over an oxide layer. The integrated circuit also includes a crack stop below the passivation layer and in the passive region, and a solder ball in the active region. The passivation layer has a trench formed therein in a location that is further from the active region than the crack stop and closer to the active region than the cut line, the trench passing completely through the outer nitride layer and a least a portion of the way through the oxide layer.

Abstract: An electrical contact method. An axle having an axis of rotation is provided. Cantilever arms are provided. Each cantilever arm has a first end and a second opposing end. The first end is connected to the axle. Each cantilever arm extends radially outward from the axle about perpendicular to the axis of rotation. At least two electrically conductive contacts is provided. At least one electrically conductive contact of the at least two electrically conductive contacts is disposed on the second end of each cantilever arm. A sample is supported on a support member. The electrically conductive contacts are pressed against a first surface of the sample. After the electrically conductive contacts are pressed, the electrically conductive contacts are revolved about the axis of rotation, wherein the at least one electrically conductive contact remains in electrical contact with the first surface.

Abstract: An electrical contact method. An axle having an axis of rotation is provided. Cantilever arms are provided. Each cantilever arm has a first end and a second opposing end. The first end is connected to the axle. Each cantilever arm extends radially outward from the axle about perpendicular to the axis of rotation. At least two electrically conductive contacts is provided. At least one electrically conductive contact of the at least two electrically conductive contacts is disposed on the second end of each cantilever arm. A sample is supported on a support member. The electrically conductive contacts are pressed against a first surface of the sample. After the electrically conductive contacts are pressed, the electrically conductive contacts are revolved about the axis of rotation, wherein the at least one electrically conductive contact remains in electrical contact with the first surface.

Abstract: Methods and structures. A planarization method includes: providing a contact structure, where the contact structure includes an axle configured to rotate about an axis of rotation, a plurality of cantilever arms, each arm having a first end connected to the axle, where each arm extends radially outward from the axle; and a plurality of electrically conductive spheres, where at least one sphere is disposed on a second end of each arm; placing a substrate in contact with the spheres, applying an electric voltage to the axle, where the voltage transfers to the substrate, where responsive to the transfer an electrochemical reaction occurs on the substrate; rotating the axle, wherein the spheres revolve about the axis, wherein at least one sphere remains in electrical contact with the substrate; and electrochemical-mechanically planarizing the substrate. Also included is a contact structure, an electrical contact, and an electrical contact method.

Abstract: A method, process and system for the recycling of electrochemical-mechanical planarization slurries/electrolytes as they are used in the back end of line of the semiconductor wafer manufacturing process is disclosed. The method, process and system includes with the removal of metal ions from slurries using ion exchange media and/or electrochemical deposition.

Abstract: A method and system for pad conditioning in an electrochemical mechanical planarization (eCMP) tool is disclosed. A polishing pad having a pad electrode is placed onto a platen of the eCMP tool. A conditioning disk, having a second electrode is placed on the polishing pad, such that the pad electrode and conditioning disk form an electrode pair. An electric potential is established between the conditioning disk and the pad electrode. This causes debris from the polishing pad to become ionized, and attracted to the conditioning disk. The conditioning disk is then removed from the eCMP tool, allowing the eCMP tool to resume operation on normal semiconductor wafers.

Abstract: An integrated circuit including an active region a passive region and a cut line in the passive region includes a passivation layer that includes an outer nitride layer over an oxide layer. The integrated circuit also includes a crack stop below the passivation layer and in the passive region, and a solder ball in the active region. The passivation layer has a trench formed therein in a location that is further from the active region than the crack stop and closer to the active region than the cut line, the trench passing completely through the outer nitride layer and a least a portion of the way through the oxide layer.

Abstract: Methods and structures. A planarization method includes: providing a contact structure, where the contact structure includes an axle configured to rotate about an axis of rotation, a plurality of cantilever arms, each arm having a first end connected to the axle, where each arm extends radially outward from the axle; and a plurality of electrically conductive spheres, where at least one sphere is disposed on a second end of each arm; placing a substrate in contact with the spheres, applying an electric voltage to the axle, where the voltage transfers to the substrate, where responsive to the transfer an electrochemical reaction occurs on the substrate; rotating the axle, wherein the spheres revolve about the axis, wherein at least one sphere remains in electrical contact with the substrate; and electrochemical-mechanically planarizing the substrate. Also included is a contact structure, an electrical contact, and an electrical contact method.

Abstract: A method, process and system for the recycling of electrochemical-mechanical planarization slurries/electrolytes as they are used in the back end of line of the semiconductor wafer manufacturing process is disclosed. The method, process and system includes with the removal of metal ions from slurries using ion exchange media and/or electrochemical deposition.

Abstract: A method and system for pad conditioning in an electrochemical mechanical planarization (eCMP) tool is disclosed. A polishing pad having a pad electrode is placed onto a platen of the eCMP tool. A conditioning disk, having a second electrode is placed on the polishing pad, such that the pad electrode and conditioning disk form an electrode pair. An electric potential is established between the conditioning disk and the pad electrode. This causes debris from the polishing pad to become ionized, and attracted to the conditioning disk. The conditioning disk is then removed from the eCMP tool, allowing the eCMP tool to resume operation on normal semiconductor wafers.