Patents by Inventor Delin Li

Delin Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6403893
    Abstract: A method for making a multi-layer electronic circuit board 136 having electroplated apertures 96, 98 which may be selectively and electrically isolated from an electrically grounded member 46 and further having selectively formed air bridges and/or crossover members 128 which are structurally supported by material 134.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: June 11, 2002
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Achyuta Achari, Andrew Zachary Glovatsky, Robert Edward Belke, Brenda Joyce Nation, Delin Li, Lakhi N. Goenka, Robert Joseph Gordon, Thomas Bernd Krautheim
  • Patent number: 6381837
    Abstract: A method for producing an electronic circuit assembly (e.g., a circuit board) from an etched tri-metal-layer structure which provides air bridge crossovers and specially designed bumps etched from a middle layer of the tri-metal-layer structure. The bumps are formed at particular circuit locations in order to provide interconnects for (1) heavy wirebonding, (2) fine wirebonding, or (3) direct chip attachment; or, to provide (4) lifters for assuring a minimum solder joint standoff height or (5) barriers for retarding solder joint crack propagation.
    Type: Grant
    Filed: September 4, 1998
    Date of Patent: May 7, 2002
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Jay DeAvis Baker, Edward McLeskey, Delin Li, Cuong Van Pham, Robert Edward Belke, Vivek Amir Jairazbhoy, Thomas B Krautheim, Mohan R. Paruchuri, Lakhi Nandlal Goenka, Jun Ming Hu
  • Publication number: 20020020552
    Abstract: A method 10 for making multi-layer electronic circuit boards 148, 248 having aperture 146, 246 which may be selectively connected to an electrical ground potential.
    Type: Application
    Filed: March 20, 2001
    Publication date: February 21, 2002
    Inventors: Robert Edward Belke, Thomas Bernd Krautheim, Vivek Amir Jairazbhoy, Delin Li
  • Publication number: 20020000331
    Abstract: A method for producing an electronic circuit assembly (e.g., a circuit board) from an etched tri-metal-layer structure which provides air bridge crossovers and specially designed bumps etched from a middle layer of the tri-metal-layer structure. The bumps are formed at particular circuit locations in order to provide interconnects for (1) heavy wirebonding, (2) fine wirebonding, or (3) direct chip attachment; or, to provide (4) lifters for assuring a minimum solder joint standoff height or (5) barriers for retarding solder joint crack propagation.
    Type: Application
    Filed: August 1, 2001
    Publication date: January 3, 2002
    Inventors: Vivek Amir Jairazbhoy, Thomas B. Krautheim, Mohan R. Paruchuri, Lakhi Nandlal Goenka, Jun Ming Hu, Jay DeAvis Baker, Edward McLeskey, Delin Li, Cuong Van Pham, Robert Edward Belke
  • Publication number: 20010052423
    Abstract: A method for making a multi-layer electronic circuit board 136 having electroplated apertures 96, 98 which may be selectively and electrically isolated from an electrically grounded member 46 and further having selectively formed air bridges and/or crossover members 128 which are structurally supported by material 134.
    Type: Application
    Filed: March 20, 2001
    Publication date: December 20, 2001
    Inventors: Achyuta Achari, Andrew Zachary Glovatsky, Robert Edward Belke, Brenda Joyce Nation, Delin Li, Lakhi N. Goenka, Robert Joseph Gordon, Thomas Bernd Krautheim
  • Patent number: 6320128
    Abstract: An electronic assembly includes a flexible multilayer substrate having integral electrically-conductive traces that also includes, as a lowermost layer, a metal foil. A plurality of uppermost layers, likewise including a metal foil, form a thin barrier member that is sealingly attached to the substrate's other layers. In this manner, a plurality of electronic components, mounted on the substrate's other layers so as to be electrically interconnected with the traces before sealingly attaching the barrier member, are encapsulated within metal foil to provide an environmentally-sealed assembly featuring improved resistance to moisture diffusion and penetration/permeation of other substances characteristic of the assembly's service environment into the assembly. A filler material, also encapsulated within the metal foil, is operative to neutralize a predetermined amount of a penetrant, further improving the operability and service life of the assembly.
    Type: Grant
    Filed: May 25, 2000
    Date of Patent: November 20, 2001
    Assignee: Visteon Global Technology, Inc.
    Inventors: Andrew Zachary Glovatsky, Brenda Joyce Nation, Charles Frederick Schweitzer, Daniel Phillip Dailey, Delin Li, Jay DeAvis Baker, Lakhi Nandlal Goenka, Lawrence LeRoy Kneisel, Myron Lemecha
  • Publication number: 20010040048
    Abstract: A method 10, 110 for making multi-layer electronic circuit boards 82, 148 having metallized apertures 18, 20, 118, 120 which may be selectively and electrically connected to a source of ground potential.
    Type: Application
    Filed: March 20, 2001
    Publication date: November 15, 2001
    Inventors: Achyuta Achari, Brenda Joyce Nation, Delin Li, Lakhi N. Goenka, Richard Keith McMillan, Vivek A. Jairazbhoy, Andrew Zachary Glovatsky, Robert Edward Belke, Robert Joseph Gordon, Thomas Bernd Krautheim
  • Publication number: 20010035299
    Abstract: A method for making a multi-layer circuit board 116 having apertures 96, 98 which may be selectively and electrically isolated from electrically grounded member 46 and further having selectively formed air bridges and/or crossover members 104 which are structurally supported by material 112. Each of the apertures 96, 98 selectively receives electrically conductive material 114.
    Type: Application
    Filed: March 23, 2001
    Publication date: November 1, 2001
    Inventors: Achyuta Achari, Andrew Zachary Glovatsky, Robert Edward Belke, Brenda Joyce Nation, Delin Li, Lakhi N. Goenka, Mohan R. Paruchuri, Robert Joseph Gordon, Thomas Bernd Krautheim
  • Publication number: 20010036064
    Abstract: A method 10 for making a multi-layer electronic circuit board 110 having electroplated apertures 18, 20 which may be selectively and electrically isolated from electrically grounded member 12 and further having selectively formed air bridges and/or crossover members 50 which are structurally supported by material 54, and further having certain exposed connection surfaces 112, selectively and electrically connected to certain electrically conductive members 34, 42, and 44.
    Type: Application
    Filed: March 20, 2001
    Publication date: November 1, 2001
    Inventor: Delin Li
  • Publication number: 20010035301
    Abstract: An article and method for making and repairing connections between first and second circuits, such as flex circuits. The article 10 includes: a flexible dielectric substrate 12 having first and second edges 14/16, and a plurality of conductive circuit traces 18 arranged on or within the substrate, wherein each of the traces extends from proximate the first edge 14 to proximate the second edge 16. Each of the circuit traces 18 includes: a first connection feature 20 disposed proximate the first edge 14; a second connection feature 22 disposed proximate the second edge 16; and at least one third connection feature 24 disposed between the first and second edges 14/16. Each of the first, second, and third connection features 20/22/24 is a plated through hole, a plated blind via, or a mounting pad. This article 10 may be used to connect together the first and second circuits 50/60 using the first and second connection features 20/22, such as by soldering.
    Type: Application
    Filed: June 26, 2001
    Publication date: November 1, 2001
    Inventors: Delin Li, Jay DeAvis Baker, Achyuta Achari, Brenda Joyce Nation, John Trublowski
  • Patent number: 6274819
    Abstract: An article and method for making and repairing connections between first and second circuits, such as flex circuits. The article 10 includes: a flexible dielectric substrate 12 having first and second edges 14/16, and a plurality of conductive circuit traces 18 arranged on or within the substrate, wherein each of the traces extends from proximate the first edge 14 to proximate the second edge 16. Each of the circuit traces 18 includes: a first connection feature 20 disposed proximate the first edge 14; a second connection feature 22 disposed proximate the second edge 16; and at least one third connection feature 24 disposed between the first and second edges 14/16. Each of the first, second, and third connection features 20/22/24 is a plated through hole, a plated blind via, or a mounting pad. This article 10 may be used to connect together the first and second circuits 50/60 using the first and second connection features 20/22, such as by soldering.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: August 14, 2001
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Delin Li, Jay DeAvis Baker, Achyuta Achari, Brenda Joyce Nation, John Trublowski
  • Patent number: 6270354
    Abstract: A multi-connectable printed circuit assembly, comprising: (a) a printed circuit substrate 11 having a first edge 22 and first and second edge regions 44/55, wherein at least the first edge region 44 is defined along the first edge 22; (b) a first array 77 of electrical connection features 66 disposed on or within the substrate proximate the first edge region 44; (c) a second array 88 of electrical connection features 66 disposed on or within the substrate proximate the second edge region 55, wherein the second array 88 is substantially a duplication or a mirror image of the first array 77; and (d) a plurality of circuit traces 99 disposed on or within the substrate such that each electrical connection feature 66 of the first array 77 is connected by one of the circuit traces 99 to a corresponding electrical connection feature 66 of the second array 88.
    Type: Grant
    Filed: August 31, 1999
    Date of Patent: August 7, 2001
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Delin Li, Jay DeAvis Baker, Achyuta Achari, Brenda Joyce Nation, John Trublowski
  • Publication number: 20010001747
    Abstract: A multi-connectable printed circuit assembly, comprising: (a) a printed circuit substrate 11 having a first edge 22 and first and second edge regions 44/55, wherein at least the first edge region 44 is defined along the first edge 22; (b) a first array 77 of electrical connection features 66 disposed on or within the substrate proximate the first edge region 44; (c) a second array 88 of electrical connection features 66 disposed on or within the substrate proximate the second edge region 55, wherein the second array 88 is substantially a duplication or a mirror image of the first array 77; and (d) a plurality of circuit traces 99 disposed on or within the substrate such that each electrical connection feature 66 of the first array 77 is connected by one of the circuit traces 99 to a corresponding electrical connection feature 66 of the second array 88.
    Type: Application
    Filed: August 31, 1999
    Publication date: May 24, 2001
    Inventors: DELIN LI, JAY DEAVIS BAKER, ACHYUTA ACHARI, BRENDA JOYCE NATION, JOHN TRUBLOWSKI
  • Patent number: 6019910
    Abstract: The invention is an aluminum etchant and method for chemically milling aluminum, according to one embodiment, from a copper-aluminum-copper tri-metal layer to form electronic circuits. The tri-metal comprises copper circuit patterns present on opposing surfaces of an aluminum foil, one of the copper patterns being laminated on a substrate. The etchant comprises an aqueous solution of 50 to 500 g/l base selected from (a) sodium hydroxide, (b) potassium hydroxide, and (c) their mixture; and 60 to 500 g/l nitrate salt. The method comprises contacting the tri-metal with the etchant at a temperature between 25 and 95.degree. C. for a time sufficient to remove a desired amount of the aluminum layer and provide electronic circuitry (rigid/flexible/3-dimensional circuitry) which contains multiple conductive circuit layers.
    Type: Grant
    Filed: December 22, 1997
    Date of Patent: February 1, 2000
    Assignee: Ford Motor Company
    Inventors: Achyuta Achari, Delin Li
  • Patent number: 5968386
    Abstract: An an electronic circuit having improved protection against harsh environments, a preferred embodiment thereof including: a substrate 10 having a top surface 12; an electronic component 14 attached to the top surface of the substrate; a plastic and metal foil laminated barrier 16 having an outer periphery 18 thereabout, the outer periphery being sealably attached to the top surface 12 of the substrate so as to define a closed pocket 20 between the top surface 12 and the barrier 16 within which the electronic component 14 is enclosed; and a desiccant element 50.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: October 19, 1999
    Assignee: Ford Motor Company
    Inventors: Lakhi Nandlal Goenka, Delin Li, Daniel Phillip Dailey, Charles Frederick Schweitzer, Michael Bednarz, Brenda Joyce Nation