Patents by Inventor Deva Pattanayak
Deva Pattanayak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090050960Abstract: Embodiments of the present invention are directed toward a trench metal-oxide-semiconductor field effect transistor (TMOSFET) device. The TMOSFET device includes a source-side-gate TMOSFET coupled to a drain-side-gate TMOSFET 1203. A switching node metal layer couples the drain of the source-side-gate TMOSFET to the source of the drain-side-gate TMOSFET so that the TMOSFETs are packaged as a stacked or lateral device.Type: ApplicationFiled: March 18, 2008Publication date: February 26, 2009Applicant: VISHAY-SILICONIXInventors: Deva Pattanayak, Jason (Jianhai) Qi, Yuming Bai, Kam-Hong Lui, Ronald Wong
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Publication number: 20080220571Abstract: High mobility P-channel power metal oxide semiconductor field effect transistors. In accordance with an embodiment of the present invention, a power MOSFET is fabricated such that the holes flow in an inversion/accumulation channel, which is along the (110) crystalline plane, or equivalents, and the current flow is in the [110] direction, or equivalents, when a negative potential is applied to the gate with respect to the source. The enhanced channel mobility of holes leads to a reduction of the channel portion of the on-state resistance, thereby advantageously reducing total “on” resistance of the device.Type: ApplicationFiled: May 20, 2008Publication date: September 11, 2008Applicant: VISHAY-SILICONIXInventors: Deva Pattanayak, Kuo-In Chen, The-Tu Chau
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Publication number: 20080157281Abstract: Ultra-low drain-source resistance power MOSFET. In accordance with an embodiment of the preset invention, a semiconductor device comprises a plurality of trench power MOSFETs. The plurality of trench power MOSFETs is formed in a second epitaxial layer. The second epitaxial layer is formed adjacent and contiguous to a first epitaxial layer. The first epitaxial layer is formed adjacent and contiguous to a substrate highly doped with red Phosphorus. The novel red Phosphorus doped substrate enables a desirable low drain-source resistance.Type: ApplicationFiled: February 11, 2008Publication date: July 3, 2008Inventors: The-Tu Chau, Sharon Shi, Qufei Chen, Martin Hernandez, Deva Pattanayak, Kyle Terrill, Kuo-In Chen
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Publication number: 20080135872Abstract: Embodiments of the present invention include a method of manufacturing a trench transistor. The method includes forming a substrate of a first conductivity type and implanting a dopant of a second conductivity type, forming a body region of the substrate. The method further includes forming a trench in the body region and depositing an insulating layer in the trench and over the body region wherein the insulating layer lines the trench. The method further includes filling the trench with polysilicon forming a top surface of the trench and forming a diode in the body region wherein a portion of the diode is lower than the top surface of the trench.Type: ApplicationFiled: January 17, 2008Publication date: June 12, 2008Inventors: Qufei Chen, Robert Xu, Kyle Terrill, Deva Pattanayak
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Patent number: 7344945Abstract: Embodiments of the present invention provide a striped or closed cell trench metal-oxide-semiconductor field effect transistor (TMOSFET). The striped or closed cell TMOSFET comprises a source region, a body region disposed above the source region, a drift region disposed above the body region, a drain region disposed above the drift region. A gate region is disposed above the source region and adjacent the body region. A gate insulator region electrically isolates the gate region from the source region, body region, drift region and drain region. The body region is electrically coupled to the source region.Type: GrantFiled: December 22, 2004Date of Patent: March 18, 2008Assignee: Vishay-SiliconixInventors: Deva Pattanayak, Jason (Jianhai) Qi, Yuming Bai, Kam-Hong Lui, Ronald Wong
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Publication number: 20080012068Abstract: A process for forming a short channel trench MOSFET. The process includes forming a first implant at the bottom of a trench that is formed in the body of the trench MOSFET and forming a second or angled implant that is tilted in its orientation and directed perpendicular to the trench that is formed in the body of the trench MOSFET. The second implant is adjusted so that it does not reach the bottom of the trench. In one embodiment the angled implant is n-type material.Type: ApplicationFiled: February 23, 2007Publication date: January 17, 2008Inventors: Zachary Lee, Deva Pattanayak
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Publication number: 20070262360Abstract: High mobility P-channel power metal oxide semiconductor field effect transistors. In accordance with an embodiment of the present invention, a power MOSFET is fabricated such that the holes flow in an inversion/accumulation channel, which is along the (110) crystalline plane, or equivalents, and the current flow is in the [110] direction, or equivalents, when a negative potential is applied to the gate with respect to the source. The enhanced channel mobility of holes leads to a reduction of the channel portion of the on-state resistance, thereby advantageously reducing total “on” resistance of the device.Type: ApplicationFiled: December 22, 2006Publication date: November 15, 2007Inventors: Deva Pattanayak, Kuo-In Chen, The-Tu Chau
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Publication number: 20070187753Abstract: In a trench MOSFET, the lower portion of the trench contains a buried source electrode, which is insulated from the epitaxial layer and semiconductor substrate but in electrical contact with the source region. When the MOSFET is in an “off” condition, the bias of the buried source electrode causes the “drift” region of the mesa to become depleted, enhancing the ability of the MOSFET to block current. The doping concentration of the drift region can therefore be increased, reducing the on-resistance of the MOSFET. The buried source electrode also reduces the gate-to-drain capacitance of the MOSFET, improving the ability of the MOSFET to operate at high frequencies. The substrate may advantageously include a plurality of annular trenches separated by annular mesas and a gate metal layer that extends outward from a central region in a plurality of gate metal legs separated by source metal regions.Type: ApplicationFiled: January 26, 2007Publication date: August 16, 2007Applicant: Siliconix incorporatedInventors: Deva Pattanayak, Yuming Bai, Kyle Terrill, Christiana Yue, Robert Xu, Kam Lui, Kuo-In Chen, Sharon Shi
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Publication number: 20070145411Abstract: Embodiments of the present invention include a method of manufacturing a trench polysilicon diode. The method includes forming a N? (P?) type epitaxial region on a N+ (P+) type substrate and forming a trench in the N? (P?) type epitaxial region. The method further includes forming a insulating layer in the trench and filling the trench with polysilicon forming a top surface of the trench. The method further includes forming P+ (N+) type doped polysilicon region and N+ (P+) type doped polysilicon region in the trench and forming a diode in the trench wherein a portion of the diode is lower than the top surface of the trench.Type: ApplicationFiled: December 28, 2005Publication date: June 28, 2007Inventors: Qufei Chen, Robert Xu, Kyle Terrill, Deva Pattanayak
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Patent number: 7012005Abstract: In accordance with the present invention, a trench MOSFET is formed by creating a trench in a semiconductor substrate. A portion of either a side wall of the trench or the bottom of the trench is implanted with an implant species. An insulating layer is then grown overlying the bottom and side wall of the trench. The implant species is selected such that the insulating layer grows more quickly on the bottom of the trench than on the side wall of the trench, resulting in a thicker insulating layer in the bottom of the trench than on the trench side walls.Type: GrantFiled: June 25, 2002Date of Patent: March 14, 2006Assignee: Siliconix IncorporatedInventors: Karl Lichtenberger, Frederick P. Giles, Christiana Yue, Kyle Terrill, Mohamed N. Darwish, Deva Pattanayak, Kam Hong Lui, Robert Q. Xu, Kuo-in Chen
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Publication number: 20050280077Abstract: A trench-gated MOSFET includes adjacent mesas formed on opposite sides of a trench. A body region in the first mesa extends downward below the level of the trenches and laterally across the bottom of the trenches. The body region in the second mesa extends part of the way down the mesa, leaving a portion of the drain abutting the trench. The body region in the second mesa includes a channel region adjacent a wall of the trench. The area where the drain abuts the trench is thus relatively restricted and the drain-gate capacitance of the device is reduced. Moreover, the drain-gate capacitance is made independent of the depth and width of the trenches, allowing greater freedom in the design of the MOSFET.Type: ApplicationFiled: June 10, 2005Publication date: December 22, 2005Applicant: Siliconix incorporatedInventor: Deva Pattanayak
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Publication number: 20050242392Abstract: In a trench MOSFET, the lower portion of the trench contains a buried source electrode, which is insulated from the epitaxial layer and semiconductor substrate but in electrical contact with the source region. When the MOSFET is in an “off” condition, the bias of the buried source electrode causes the “drift” region of the mesa to become depleted, enhancing the ability of the MOSFET to block current. The doping concentration of the drift region can therefore be increased, reducing the on-resistance of the MOSFET. The buried source electrode also reduces the gate-to-drain capacitance of the MOSFET, improving the ability of the MOSFET to operate at high frequencies. The substrate may advantageously include a plurality of annular trenches separated by annular mesas and a gate metal layer that extends outward from a central region in a plurality of gate metal legs separated by source metal regions.Type: ApplicationFiled: April 30, 2004Publication date: November 3, 2005Applicant: Siliconix incorporatedInventors: Deva Pattanayak, Yuming Bai, Kyle Terrill, Christiana Yue, Robert Xu, Kam Lui, Kuo-In Chen, Sharon Shi
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Publication number: 20050148128Abstract: Embodiments of the present invention provide an improved closed cell trench metal-oxide-semiconductor field effect transistor (TMOSFET). The closed cell TMOSFET comprises a drain, a body region disposed above the drain region, a gate region disposed in the body region, a gate insulator region, a plurality of source regions disposed at the surface of the body region proximate to the periphery of the gate insulator region. A first portion of the gate region and the gate oxide region are formed as parallel elongated structures. A second portion of the gate region and the oxide region are formed as normal-to-parallel elongated structures. A portion of the gate and drain overlap region are selectively blocked by the body region, resulting in lower overall gate to drain capacitance.Type: ApplicationFiled: January 20, 2005Publication date: July 7, 2005Inventors: Deva Pattanayak, Robert Xu
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Patent number: 6906380Abstract: Embodiments of the present invention provide a striped or closed cell trench metal-oxide-semiconductor field effect transistor (TMOSFET). The striped or closed cell TMOSFET comprises a source region, a body region disposed above the source region, a drift region disposed above the body region, a drain region disposed above the drift region. A gate region is disposed above the source region and adjacent the body region. A gate insulator region electrically isolates the gate region from the source region, body region, drift region and drain region. The body region is electrically coupled to the source region.Type: GrantFiled: May 13, 2004Date of Patent: June 14, 2005Assignee: Vishay-SiliconixInventors: Deva Pattanayak, Jason (Jianhai) Qi, Yuming Bai, Kam-Hong Lui, Ronald Wong
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Publication number: 20050116282Abstract: Embodiments of the present invention provide an improved closed cell trench metal-oxide-semiconductor field effect transistor (TMOSFET). The closed cell TMOSFET comprises a drain, a body region disposed above the drain region, a gate region disposed in the body region, a gate insulator region, a plurality of source regions disposed at the surface of the body region proximate to the periphery of the gate insulator region. A first portion of the gate region and the gate oxide region are formed as parallel elongated structures. A second portion of the gate region and the oxide region are formed as normal-to-parallel elongated structures. A portion of the gate and drain overlap region are selectively blocked by the body region, resulting in lower overall gate to drain capacitance.Type: ApplicationFiled: December 2, 2003Publication date: June 2, 2005Applicant: VISHAY-SILICONIXInventors: Deva Pattanayak, Robert Xu
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Publication number: 20050054177Abstract: A trench-gated MOSFET includes adjacent mesas formed on opposite sides of a trench. A body region in the first mesa extends downward below the level of the trenches and laterally across the bottom of the trenches. The body region in the second mesa extends part of the way down the mesa, leaving a portion of the drain abutting the trench. The body region in the second mesa includes a channel region adjacent a wall of the trench. The area where the drain abuts the trench is thus relatively restricted and the drain-gate capacitance of the device is reduced. Moreover, the drain-gate capacitance is made independent of the depth and width of the trenches, allowing greater freedom in the design of the MOSFET.Type: ApplicationFiled: September 8, 2003Publication date: March 10, 2005Applicant: Siliconix incorporatedInventor: Deva Pattanayak
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Patent number: 6709930Abstract: A trench MOSFET is formed by creating a trench in a semiconductor substrate, then forming a barrier layer over a portion of the side wall of the trench. A thick insulating layer is deposited in the bottom of the trench. The barrier layer is selected such that the thick insulating layer deposits in the bottom of the trench at a faster rate than the thick insulating layer deposits on the barrier layer. Embodiments of the present invention avoid stress and reliability problems associated with thermal growth of insulating layers, and avoid problems with control of the shape and thickness of the thick insulating layer encountered when a thick insulating layer is deposited, then etched to the proper shape and thickness.Type: GrantFiled: June 21, 2002Date of Patent: March 23, 2004Assignee: Siliconix IncorporatedInventors: Ben Chan, Kam Hong Lui, Christiana Yue, Ronald Wong, David Chang, Frederick P. Giles, Kyle Terrill, Mohamed N. Darwish, Deva Pattanayak, Robert Q. Xu, Kuo-in Chen
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Publication number: 20030235958Abstract: A trench MOSFET is formed by creating a trench in a semiconductor substrate, then forming a barrier layer over a portion of the side wall of the trench. A thick insulating layer is deposited in the bottom of the trench. The barrier layer is selected such that the thick insulating layer deposits in the bottom of the trench at a faster rate than the thick insulating layer deposits on the barrier layer. Embodiments of the present invention avoid stress and reliability problems associated with thermal growth of insulating layers, and avoid problems with control of the shape and thickness of the thick insulating layer encountered when a thick insulating layer is deposited, then etched to the proper shape and thickness.Type: ApplicationFiled: June 21, 2002Publication date: December 25, 2003Applicant: Siliconix IncorporatedInventors: Ben Chan, Kam Hong Lui, Christiana Yue, Ronald Wong, David Chang, Frederick P. Giles, Kyle Terrill, Mohamed N. Darwish, Deva Pattanayak, Robert Q. Xu, Kuo-in Chen
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Publication number: 20030235959Abstract: In accordance with the present invention, a trench MOSFET is formed by creating a trench in a semiconductor substrate. A portion of either a side wall of the trench or the bottom of the trench is implanted with an implant species. An insulating layer is then grown overlying the bottom and side wall of the trench. The implant species is selected such that the insulating layer grows more quickly on the bottom of the trench than on the side wall of the trench, resulting in a thicker insulating layer in the bottom of the trench than on the trench side walls.Type: ApplicationFiled: June 25, 2002Publication date: December 25, 2003Applicant: Siliconix IncorporatedInventors: Karl Lichtenberger, Frederick P. Giles, Christiana Yue, Kyle Terrill, Mohamed N. Darwish, Deva Pattanayak, Kam Hong Lui, Robert Q. Xu, Kuo-in Chen