Abstract: A method of fabricating a heterostructure includes growing epitaxially, in a growth chamber, a first semiconductor layer of the heterostructure, the first semiconductor layer including a first III-nitride semiconductor material, the first semiconductor layer being supported by a substrate, after growing the first semiconductor layer, growing epitaxially, in the growth chamber, a second semiconductor layer of the heterostructure such that the second semiconductor layer is supported by the first semiconductor layer, the second semiconductor layer including a second III-nitride semiconductor material, and between growing the first semiconductor layer and growing the second semiconductor layer, controlling an extent to which a eutectic layer disposed on the first semiconductor layer is consumed to control a lattice polarity of the second semiconductor layer

Abstract: In an embodiment, a device includes: an interposer including: a back-side redistribution structure; an interconnection die over the back-side redistribution structure, the interconnection die including a substrate, a through-substrate via protruding from the substrate, and an isolation layer around the through-substrate via; a first encapsulant around the interconnection die, a surface of the first encapsulant being substantially coplanar with a surface of the isolation layer and a surface of the through-substrate via; and a front-side redistribution structure over the first encapsulant, the front-side redistribution structure including a first conductive via that physically contacts the through-substrate via, the isolation layer separating the first conductive via from the substrate.

Abstract: A method for spring ploughing and land preparation in saline-sodic paddy fields with thawed water puddling and an application thereof are provided, relating to the technical field of spring ploughing and land preparation in saline-sodic paddy fields. The method includes the following steps: harvesting rice with low stubble left; removing straws from the paddy fields: removing straws after harvesting from fields; ploughing; fertilizing; irrigating for thawing; and drying.

Abstract: A semiconductor package is provided. The semiconductor package includes: semiconductor dies, separated from one another, and including die I/Os at their active sides; and a redistribution structure, disposed at the active sides of the semiconductor dies and connected to the die I/Os, wherein the redistribution structure includes first and second routing layers sequentially arranged along a direction away from the die I/Os, the first routing layer includes a ground plane and first signal lines laterally surrounded by and isolated from the first ground plane, the first signal lines connect to the die I/Os and rout the die I/Os from a central region to a peripheral region of the redistribution structure, the second routing layer includes second signal lines and ground lines, and the second signal lines and the ground lines respectively extend from a location in the peripheral region to another location in the peripheral region through the central region.

Abstract: A semiconductor package includes a circuit board structure, a first redistribution layer structure and first bonding elements. The circuit board structure includes outermost first conductive patterns and a first mask layer adjacent to the outermost first conductive patterns. The first redistribution layer structure is disposed over the circuit board structure. The first bonding elements are disposed between and electrically connected to the first redistribution layer structure and the outermost first conductive patterns of the circuit board structure. In some embodiments, at least one of the first bonding elements covers a top and a sidewall of the corresponding outermost first conductive pattern.

Abstract: A semiconductor device and a method of making the same are provided. A first die and a second die are placed over a carrier substrate. A first molding material is formed adjacent to the first die and the second die. A first redistribution layer is formed overlying the first molding material. A through via is formed over the first redistribution layer. A package component is on the first redistribution layer next to the copper pillar. The package component includes a second redistribution layer. The package component is positioned so that it overlies both the first die and the second die in part. A second molding material is formed adjacent to the package component and the first copper pillar. A third redistribution layer is formed overlying the second molding material. The second redistribution layer is placed on a substrate and bonded to the substrate.

Abstract: A semiconductor package is provided. The semiconductor package includes: semiconductor dies, separated from one another, and including die I/Os at their active sides; and a redistribution structure, disposed at the active sides of the semiconductor dies and connected to the die I/Os, wherein the redistribution structure includes first and second routing layers sequentially arranged along a direction away from the die I/Os, the first routing layer includes a ground plane and first signal lines laterally surrounded by and isolated from the first ground plane, the first signal lines connect to the die I/Os and rout the die I/Os from a central region to a peripheral region of the redistribution structure, the second routing layer includes second signal lines and ground lines, and the second signal lines and the ground lines respectively extend from a location in the peripheral region to another location in the peripheral region through the central region.

Abstract: The invention relates to a composition for the immediate termination of a free-radical polymerization, the use thereof for the stabilization of free-radically polymerizable monomers against free-radical polymerization and a method for the immediate termination of free-radical polymerizations.

Abstract: A method includes of fabricating a heterostructure includes growing epitaxially, in a growth chamber, a first semiconductor layer of the heterostructure, the first semiconductor layer comprising a III-nitride semiconductor material, the first semiconductor layer being supported by a substrate, and, after growing the first semiconductor layer, growing epitaxially, in the growth chamber, a second semiconductor layer of the heterostructure such that the second semiconductor layer is supported by the first semiconductor layer, the second semiconductor layer comprising a quaternary or higher order III-nitride alloy.

Abstract: A semiconductor device and a method of making the same are provided. A first die and a second die are placed over a carrier substrate. A first molding material is formed adjacent to the first die and the second die. A first redistribution layer is formed overlying the first molding material. A through via is formed over the first redistribution layer. A package component is on the first redistribution layer next to the copper pillar. The package component includes a second redistribution layer. The package component is positioned so that it overlies both the first die and the second die in part. A second molding material is formed adjacent to the package component and the first copper pillar. A third redistribution layer is formed overlying the second molding material. The second redistribution layer is placed on a substrate and bonded to the substrate.

Abstract: A device includes a substrate and a semiconductor heterostructure supported by the substrate. The semiconductor heterostructure includes a first semiconductor layer supported by the substrate and including a first III-nitride semiconductor material, and a second semiconductor layer supported by the first semiconductor layer and including a second III-nitride semiconductor material. The second III-nitride semiconductor material includes scandium. The first and second semiconductor layers are nitrogen-polar.

Abstract: An embodiment interposer may include a plurality of first redistribution layers including first electrical interconnect structures having a first line width and a first line spacing embedded in a first dielectric material, and a plurality of second redistribution layers including second electrical interconnect structures having a second line width and a second line spacing embedded in a second dielectric material such that the second line width is greater than the first line width and such that the second line spacing is greater than the first line spacing. The first dielectric material may be one of polyimide, benzocyclobuten, or polybenzo-bisoxazole and second dielectric material may include an inorganic particulate material dispersed in an epoxy resin. The interposer may further include a protective layer, including the second dielectric material, formed over the first redistribution layers, and a surface layer, including the first dielectric material, formed as part of the second redistribution layers.

Abstract: An embodiment semiconductor package includes a bare semiconductor chip, a packaged semiconductor chip adjacent the bare semiconductor chip, and a redistribution structure bonded to the bare semiconductor chip and the packaged semiconductor chip. The redistribution structure includes a first redistribution layer having a first thickness; a second redistribution layer having a second thickness; and a third redistribution layer between the first redistribution layer and the second redistribution layer. The third redistribution layer has a third thickness greater than the first thickness and the second thickness. The package further includes an underfill disposed between the bare semiconductor chip and the redistribution structure and a molding compound encapsulating the bare semiconductor chip, the packaged semiconductor chip, and the underfill.

Abstract: An embodiment semiconductor package includes a bare semiconductor chip, a packaged semiconductor chip adjacent the bare semiconductor chip, and a redistribution structure bonded to the bare semiconductor chip and the packaged semiconductor chip. The redistribution structure includes a first redistribution layer having a first thickness; a second redistribution layer having a second thickness; and a third redistribution layer between the first redistribution layer and the second redistribution layer. The third redistribution layer has a third thickness greater than the first thickness and the second thickness. The package further includes an underfill disposed between the bare semiconductor chip and the redistribution structure and a molding compound encapsulating the bare semiconductor chip, the packaged semiconductor chip, and the underfill.

Abstract: A package structure includes an interposer including a front side and a back side opposite the front side, an upper molded structure on the front side of the interposer and including an upper molding layer and a semiconductor die in the upper molding layer, and a lower molded structure on the back side of the interposer and including a lower molding layer and a substrate portion in the lower molding layer, wherein the substrate portion includes conductive layers electrically coupled to the semiconductor die through the interposer.

Abstract: A method includes forming a photoresist on a base structure, and performing a first light-exposure process on the photoresist using a first lithography mask. In the first light-exposure process, an inner portion of the photoresist is blocked from being exposed, and a peripheral portion of the photoresist is exposed. The peripheral portion encircles the inner portion. A second light-exposure process is performed on the photoresist using a second lithography mask. In the second light-exposure process, the inner portion of the photoresist is exposed, and the peripheral portion of the photoresist is blocked from being exposed. The photoresist is then developed.

Abstract: A method of providing a geographically distributed live mixed-reality meeting is described. The method comprises receiving, from a camera at a first endpoint, a live video stream; generating an mixed reality view incorporating the received video stream; rendering the mixed reality view at a display at the first endpoint and transmitting the mixed reality view to at least one other geographically distant endpoint; receiving data defining a bounding area; calculating a real world anchor for the bounding area using the data defining the bounding area; rendering the bounding area in the mixed reality view at a real world position determined using the real world anchor; and applying different rule sets to content objects placed into the mixed reality view by users dependent upon the position of the content objects relative to the bounding area in real world space.

Abstract: A semiconductor device and a method of making the same are provided. A first die and a second die are placed over a carrier substrate. A first molding material is formed adjacent to the first die and the second die. A first redistribution layer is formed overlying the first molding material. A through via is formed over the first redistribution layer. A package component is on the first redistribution layer next to the copper pillar. The package component includes a second redistribution layer. The package component is positioned so that it overlies both the first die and the second die in part. A second molding material is formed adjacent to the package component and the first copper pillar. A third redistribution layer is formed overlying the second molding material. The second redistribution layer is placed on a substrate and bonded to the substrate.

Abstract: A method of fabricating a heterostructure includes providing a substrate, and implementing a non-sputtered, epitaxial growth procedure at a growth temperature to form a wurtzite structure supported by the substrate. The wurtzite structure includes an alloy of a III-nitride material. The non-sputtered, epitaxial growth procedure is configured to incorporate a group IIIB element into the alloy of the III-nitride material. The growth temperature is at a level such that the wurtzite structure exhibits a breakdown field strength greater than a ferroelectric coercive field strength of the wurtzite structure.

Abstract: An embodiment semiconductor package includes a bare semiconductor chip, a packaged semiconductor chip adjacent the bare semiconductor chip, and a redistribution structure bonded to the bare semiconductor chip and the packaged semiconductor chip. The redistribution structure includes a first redistribution layer having a first thickness; a second redistribution layer having a second thickness; and a third redistribution layer between the first redistribution layer and the second redistribution layer. The third redistribution layer has a third thickness greater than the first thickness and the second thickness. The package further includes an underfill disposed between the bare semiconductor chip and the redistribution structure and a molding compound encapsulating the bare semiconductor chip, the packaged semiconductor chip, and the underfill.