Patents by Inventor Do Ryu

Do Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070024544
    Abstract: A data driving circuit for a light emitting display may include a gamma voltage generator that generates gradation voltages, a current sink that receives a predetermined current from a pixel via a data line during a first partial period of one complete period for driving the pixel, a voltage generator that generates an incrementally increasing compare voltage during the first partial period, a comparator that compares a compensation voltage generated based on the predetermined current with the compare voltage and generates a logic signal based on a result of the compare, an adjusting unit that generates compensation data based on the logic signal, and a digital-analog converter that generates a composite data using the compensation data and externally supplied data and selects, as a data signal for the pixel, one of the plurality of gradation voltages based on a bit value of the composite data.
    Type: Application
    Filed: July 25, 2006
    Publication date: February 1, 2007
    Inventors: Bo Chung, Do Ryu, Hong Kim, Oh Kwon
  • Publication number: 20070024543
    Abstract: A data driving circuit for driving pixels of a light emitting display to display images with uniform brightness may include a current sink that is capable of receiving, via a data line, a predetermined current from a pixel to enable the data driving circuit to generate a compensation voltage for the pixel. The compensation voltage may compensate for variations among the pixels of the display. Variations among the pixels may result from different electron mobilities and/or threshold voltages of transistors included in the pixels. The value of the predetermined current may be equal to or higher than a value of a minimum current employable by the pixel to emit light of maximum brightness. The maximum brightness of the pixel may correspond to a brightness emitted by the pixel when a highest one of a plurality of set gray scale voltages is applied to the pixel.
    Type: Application
    Filed: July 25, 2006
    Publication date: February 1, 2007
    Inventors: Bo Chung, Do Ryu, Oh Kwon
  • Publication number: 20070004211
    Abstract: Methods of fabricating a semiconductor device can include forming at least one layer on a first and a second side of a semiconductor substrate. Portions of the at least one layer may be removed on the first side of the semiconductor substrate to form a pattern of the at least one layer on the first side of the substrate while the at least one layer is maintained on the second side of the substrate. A capping layer can be formed on the pattern of the at least one layer on the first side of the substrate and on the at least one layer on the second side of the semiconductor substrate. The capping layer can be removed on the second side of the semiconductor substrate, thereby exposing the at least one layer on the second side of the substrate while maintaining the capping layer on the first side of the substrate.
    Type: Application
    Filed: September 8, 2006
    Publication date: January 4, 2007
    Inventors: Won Kim, Young-Wook Park, Jeong-Do Ryu
  • Patent number: 7129174
    Abstract: Methods of fabricating a semiconductor device can include forming at least one layer on a first and a second side of a semiconductor substrate. Portions of the at least one layer may be removed on the first side of the semiconductor substrate to form a pattern of the at least one layer on the first side of the substrate while the at least one layer is maintained on the second side of the substrate. A capping layer can be formed on the pattern of the at least one layer on the first side of the substrate and on the at least one layer on the second side of the semiconductor substrate. The capping layer can be removed on the second side of the semiconductor substrate, thereby exposing the at least one layer on the second side of the substrate while maintaining the capping layer on the first side of the substrate.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: October 31, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Jin Kim, Young-Wook Park, Jeong-Do Ryu
  • Publication number: 20060145237
    Abstract: Provided are a non-volatile memory device and a method of manufacturing the same. The non-volatile memory device includes a gate insulating layer having a tunneling window formed therein. The tunneling window has a predetermined width parallel to a channel length direction and has a predetermined length perpendicular to the channel length direction on a semiconductor substrate. The non-volatile memory device further includes a lower floating gate including a first lower floating gate formed on the gate insulating layer and a second lower floating gate spaced a predetermined interval apart from the first lower floating gate, and wherein the tunneling window and a portion of the gate insulating layer which is adjacent to the tunneling window are partially exposed in a region between the first lower floating gate and the second lower floating gate.
    Type: Application
    Filed: January 3, 2006
    Publication date: July 6, 2006
    Inventors: Byoung-Ho Kim, Seung-Beom Yoon, Weon-Ho Park, Ji-Do Ryu
  • Publication number: 20060044252
    Abstract: An organic light emitting display and a method of driving the same, in which a driving frequency is lowered and at the same time a production cost is reduced. The organic light emitting display includes: a display region divided into a left part and a right part; a first data driver adapted to supply a data signal to data lines of the left part; a second data driver adapted to supply the data signal to data lines of the right part; and first and second memory groups wherein, when one of the first and second memory groups stores data to be supplied to the left and right parts therein, another one of the first and second memory groups supplies data to the first and second drivers, and wherein, when one of the first and second memory groups receives a reading signal in parallel, another one of the first and second memory groups receives a writing signal in series.
    Type: Application
    Filed: August 15, 2005
    Publication date: March 2, 2006
    Inventor: Do Ryu
  • Publication number: 20050285162
    Abstract: Methods of forming a semiconductor device having stacked structures include forming a first semiconductor structure on a substrate and forming a first interlayer insulating layer on the substrate. The first interlayer insulating layer has a substantially level upper face. A semiconductor layer is formed on the first interlayer insulating layer and a first gate insulation layer is formed on the semiconductor layer at a processing temperature selected to control damage to the first semiconductor structure. A second semiconductor structure is formed on the first gate insulation layer.
    Type: Application
    Filed: June 23, 2005
    Publication date: December 29, 2005
    Inventors: Chul-Sung Kim, Jin-Hwa Heo, Yu-Gyun Shin, Bon-Young Koo, Dong-Chan Kim, Jeong-Do Ryu
  • Patent number: 6930062
    Abstract: A method of forming an oxide layer on a semiconductor substrate includes thermally oxidizing a surface of the substrate to form an oxide layer on the substrate, and then exposing the oxide layer to an ambient including predominantly oxygen radicals to thereby thicken the oxide layer. Related methods of fabricating a recessed gate transistor are also discussed.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: August 16, 2005
    Assignee: Samsung Electronics Co., Inc.
    Inventors: Sang-Jin Hyun, Yu-Gyun Shin, Bon-Young Koo, Sug-Hun Hong, Taek-Soo Jeon, Jeong-do Ryu
  • Publication number: 20050003679
    Abstract: A method of forming an oxide layer on a semiconductor substrate includes thermally oxidizing a surface of the substrate to form an oxide layer on the substrate, and then exposing the oxide layer to an ambient including predominantly oxygen radicals to thereby thicken the oxide layer. Related methods of fabricating a recessed gate transistor are also discussed.
    Type: Application
    Filed: May 21, 2004
    Publication date: January 6, 2005
    Inventors: Sang-Jin Hyun, Yu-Gyun Shin, Bon-Young Koo, Sug-Hun Hong, Taek-Soo Jeon, Jeong-do Ryu
  • Publication number: 20040241946
    Abstract: Methods of fabricating a semiconductor device can include forming at least one layer on a first and a second side of a semiconductor substrate. Portions of the at least one layer may be removed on the first side of the semiconductor substrate to form a pattern of the at least one layer on the first side of the substrate while the at least one layer is maintained on the second side of the substrate. A capping layer can be formed on the pattern of the at least one layer on the first side of the substrate and on the at least one layer on the second side of the semiconductor substrate. The capping layer can be removed on the second side of the semiconductor substrate, thereby exposing the at least one layer on the second side of the substrate while maintaining the capping layer on the first side of the substrate.
    Type: Application
    Filed: March 23, 2004
    Publication date: December 2, 2004
    Inventors: Won-Jin Kim, Young-Wook Park, Jeong-Do Ryu