Abstract: A method and apparatus for enhancing signal quality within a wireless receiver are disclosed. An image of a desired signal is down-converted to a baseband signal by a digital down converter. The energy of the baseband signal is subsequently determined. If the energy of the baseband signal is equal to or greater than a predetermined threshold, then the IF is swapped for any incoming signals. If the energy of the baseband signal is less than the predetermined threshold, then the IF is maintained for any incoming signals.

Abstract: A low-noise current reference circuitry includes a voltage source, a current source, and a controller. The voltage source generates a reference voltage. The current source provides a low-noise output current in response to a control signal. The controller provides the control signal based at least in part on the relative magnitudes of the reference voltage and a voltage derived from the output current. A low-noise voltage reference circuitry includes a reference voltage source, a voltage source, and a controller. The reference voltage source generates a reference voltage. The voltage source provides a low-noise output voltage in response to a control signal. The controller provides the control signal based at least in part on the relative magnitudes of the output voltage and the reference voltage.

Abstract: A buffer circuitry buffers a radio-frequency (RF) signal. The buffer circuitry includes a complementary pair of switches and a power source. The a complementary pair of switches has an input terminal and output terminal. The input terminal of the complementary pair of switches responds to the RF signal. The output terminal of the complementary pair of switches couples to an output of the buffer circuitry. The power source includes a capacitor coupled to a current source. The power source couples to the complementary pair of switches. The power source supplies power to the complementary pair of switches in a manner that the buffer circuitry supplies a substantially constant power level at its output.

Abstract: The digital interface between the baseband section and the RF transceiver section of a wireless communication device may cause undesired pulling to an impedance sensitive portion of the RF transceiver section. In one embodiment, an original interface signal that exhibits a duty cycle is modified by an interface control block in the baseband section. The resultant modified interface signal exhibits a duty cycle less than the duty cycle of the original interface signal. In this manner, when the modified interface signal is applied to the RF transceiver section, less pulling of the impedance sensitive portion occurs than if the original interface signal were applied directly to the RF transceiver section.

Abstract: A radio-frequency (RF) apparatus capable of transmitting RF signals includes transmitter path circuitry. The transmitter path circuitry includes a voltage-controlled oscillator (VCO) that generates an output signal. The frequency of the output signal of the VCO circuitry is adjustable in response to a first control signal and a second control signal. The transmitter path circuitry also includes a first feedback circuitry and a second feedback circuitry that are responsive to the output signal of the VCO circuitry. The first feedback circuitry provides the first control signal to the VCO circuitry. The first control signal coarsely adjusts the frequency of the output signal of the VCO circuitry to a desired frequency. The second feedback circuitry supplies the second control signal to the VCO circuitry. The second control signal fine tunes the frequency of the output signal of the voltage-controlled oscillator circuitry to the desired frequency.

Abstract: Interchangeable high band low-noise-amplifiers (LNAs) and low band low-noise-amplifiers (LNAs) and related methods are disclosed that greatly enhance the efficiency of designing handsets for different combinations of frequency bands. The input signals to particular pins on a receiver or transceiver integrated circuit (IC) are swappable such that multiple frequency bands can be input to the same input pins thereby allowing for simplified system design. Efficient programmable techniques are also disclosed for controlling a swap mode within communication ICs. These interchangeable or band swappable input paths, for example, can be utilized to allow interchangeability between high band (PCS, DCS) and low band (GSM, E-GSM) inputs for cellular communications.

Abstract: A radio-frequency (RF) receiver includes a receiver analog circuitry and a receiver digital circuitry. The receiver analog circuitry resides within a first integrated circuit and the receiver digital circuitry resides within a second integrated circuit. The second integrated circuit couples to the first integrated circuit via a one-bit digital interface. The receiver analog circuitry receives an RF signal and processes the received RF signal to generate a digital signal. The receiver analog circuitry provides the digital signal to the receiver digital circuitry. The receiver digital circuitry includes a digital down-converter circuitry that mixes the digital signal with an intermediate frequency (IF) local oscillator (LO) signal to generate a digital down-converted signal. The receiver digital circuitry also includes a digital filter circuitry that filters the digital down-converted signal to generate a filtered digital signal.

Abstract: A wireless communication receiver is disclosed that operates in a test mode to determine image correction information that is used to suppress undesired image signals when the receiver switches to a normal operational mode. In one embodiment, the receiver includes a frequency synthesizer coupled by a quadrature divider to an in-phase (I) mixer and a quadrature mixer. The mixers are coupled by respective analog to digital converters (ADCs) to respective I and Q channel inputs of a digital signal processor (DSP). In the test mode, a test tone is provided to the mixer inputs. The test tone is divided down further and provided to clock the frequency synthesizer, the ADCs and the DSP. This configuration locks together the mixers, frequency synthesizer, ADCs and DSP ratiometrically in frequency during the test mode while image correction information is being determined.

Abstract: A wireless communication receiver is disclosed that operates in a test mode to determine image correction information that is used to suppress undesired image signals when the receiver switches to a normal operational mode. In one embodiment, the receiver includes a frequency synthesizer coupled by a quadrature divider to an in-phase (I) mixer and a quadrature mixer. The mixers are coupled by respective analog to digital converters (ADCs) to respective I and Q channel inputs of a digital signal processor (DSP). In the test mode, a test tone is provided to the mixer inputs. The test tone is divided down further and provided to clock the frequency synthesizer, the ADCs and the DSP. This configuration locks together the mixers, frequency synthesizer, ADCs and DSP ratiometrically in frequency during the test mode while image correction information is being determined.

Abstract: A method is disclosed for performing dual mode image rejection calibration in a receiver. A first image correction factor is acquired (1302) for use in a receiver system (15) using a first known signal associated with a first signal band during a startup mode. The first image correction factor is adjusted incrementally (1310) during a normal operation mode. A radio frequency (RF) signal associated with the first signal band is received (1324) using the first image correction factor during the normal operation mode.

Abstract: A radio-frequency (RF) apparatus includes front-end circuitry. The front-end circuitry includes a filter circuitry and an impedance matching circuitry. The filter circuitry has a differential output that has an output impedance. The filter circuitry filters signals outside a signal band of interest. The impedance matching network has a differential input coupled to the output of the filter circuitry. The impedance matching network also has a differential output coupled to a signal processing circuitry. The signal processing circuitry has an input impedance. The impedance matching network matches the input impedance of the signal processing circuitry to the output impedance of the filter circuitry.

Abstract: A calibration circuitry includes an adjustable capacitor, a voltage generator, a reference voltage generator, and a controller. The reference voltage generator provides a reference voltage. The voltage generator provides a measurement voltage that depends on the capacitance of the adjustable capacitor. The capacitance of the adjustable capacitor varies in response to a control signal. The controller provides the control signal based on the relative values of the reference voltage and the measurement voltage.

Abstract: A radio-frequency (RF) receiver includes a receiver analog circuitry and a receiver digital circuitry coupled together. The receiver analog circuitry receives an RF signal. The receiver analog circuitry processes the received RF signal and generates a digital signal that it provides to the receiver digital circuitry. The receiver digital circuitry includes a digital down-converter circuitry that mixes the digital signal provided by a receiver analog circuitry with a digital intermediate frequency (IF) local oscillator signal to generate a digital down-converted signal. The receiver digital circuitry also includes a digital filter circuitry that filters the digital down-converted signal to generate a filtered digital signal. The digital filter circuitry provides a notch at a frequency that corresponds to a residual DC offset of the receiver analog circuitry.

Abstract: A technique includes generating an analog voltage to control a frequency for an oscillator. The analog signal is converted into a digital signal, and the frequency is controlled in response to the digital signal.

Abstract: In one embodiment, the present invention includes a frequency divider that has an I channel to provide an I channel phase; and a Q channel to provide a Q channel phase, in which the I and the Q channels are mirrored with respect to an axis therebetween. The axis may also be substantially coincident with a center axis of a device incorporating the frequency divider, such as a transceiver.

Abstract: A radio-frequency (RF) apparatus capable of transmitting RF signals includes transmitter path circuitry. The transmitter path circuitry includes a voltage-controlled oscillator (VCO) circuitry. The VCO circuitry generates a first signal that has a first frequency. A divider circuitry couples to the VCO circuitry and, in response to the first signal, the divider circuitry generates a second signal that has a second frequency. The frequency of the second signal equals the frequency of the first signal divided by a number.

Abstract: A system and method are disclosed for dynamically selecting high-side injection or low-side injection of local oscillator mixing signals based upon an assessment of signal power within the input signal spectrum that could cause unwanted images in the processed signal. This image rejection assessment provides an advantageous basis upon which to make dynamic high-side versus low-side injection determinations.

Abstract: A radio-frequency (RF) receiver includes a receiver analog circuitry and a receiver digital circuitry. The receiver analog circuitry resides within a first integrated circuit and the receiver digital circuitry resides within a second integrated circuit. The second integrated circuit couples to the first integrated circuit via a one-bit digital interface. The receiver analog circuitry receives an RF signal and processes the received RF signal to generate a digital signal. The receiver analog circuitry provides the digital signal to the receiver digital circuitry. The receiver digital circuitry includes a digital down-converter circuitry that mixes the digital signal with an intermediate frequency (IF) local oscillator (LO) signal to generate a digital down-converted signal. The receiver digital circuitry also includes a digital filter circuitry that filters the digital down-converted signal to generate a filtered digital signal.

Abstract: A bias system is disclosed including a calibration bus to which a controller, a reference bias source, a master bias source, and first and second slave bias sources are coupled. The controller varies a control code sent over the calibration bus to the master bias source until a particular control code is found that causes the bias signal of the master bias source to equal a desired bias value which is provided by the reference bias source. The controller then sends the particular control code to the first and second slave bias sources to cause the first and second slave bias sources to generate a bias signal having the same desired bias value as the master bias source.

Abstract: A bias system is disclosed including a calibration bus to which a controller, a reference bias source, a master bias source, and first and second slave bias sources are coupled. The controller varies a control code sent over the calibration bus to the master bias source until a particular control code is found that causes the bias signal of the master bias source to equal a desired bias value which is provided by the reference bias source. The controller then sends the particular control code to the first and second slave bias sources to cause the first and second slave bias sources to generate a bias signal having the same desired bias value as the master bias source. Isolation between load circuits coupled to the first and second bias sources is thus enhanced while providing low noise, stable operation.