Abstract: An electrode insulating coating composition according to the present invention includes boehmite particles, a dispersant, a binder, and a solvent, wherein the dispersant includes two or more fatty acid compounds, and is included in an amount of 1.2 to 8.8 parts by weight with respect to 100 parts by weight of the boehmite particles.

Abstract: The present disclosure relates to an organic electroluminescent compound and an organic electroluminescent device comprising the same. The organic electroluminescent compound of the present disclosure may be comprised in a light-emitting layer, and is effective for producing an organic electroluminescent device having high luminescent efficiency and/or excellent lifespan characteristic.

Abstract: A crypto processor, a method of operating a crypto processor, and an electronic device including a crypto processor. A method of operating a crypto processor for performing a polynomial multiplication of lattice-based texts includes transferring coefficients of polynomials for the polynomial multiplication to multipliers, performing multiplications for a portion of the coefficients in parallel using the multipliers, performing an addition for a portion of results of the multiplications using an adder, and determining a result of the polynomial multiplication based on another portion of the results of the multiplications and a result of the addition.

Abstract: A method and device for comparing movement paths based on homomorphic encrypted is disclosed, where a server includes a processor configured to collect first encrypted movement path information of a comparison target encrypted by a common key, receive, from a user device, second encrypted movement path information of a user of the user device encrypted by a private key, compare the first encrypted movement path information and the second encrypted movement path information, decrypt a portion of a result of the comparison by the common key to generate a partially decrypted comparison result, and provide the partially decrypted result of the comparison to the user.

Abstract: Disclosed is a method and apparatus for modulus refresh, where the method for modulus refresh of a ciphertext in homomorphic encryption includes receiving a first ciphertext corresponding to a first modulus, generating a second ciphertext by performing a blind rotation on the first ciphertext, and generating a target ciphertext corresponding to a second modulus greater than the first modulus based on the first ciphertext and the second ciphertext.

Abstract: Disclosed are an apparatus and method with homomorphic encryption using automorphism. A computing apparatus includes one or more processors and a memory storing instructions configured to cause the one or more processors to, for a blind rotation key for performing a blind rotation operation and an operand ciphertext of the blind rotation operation: generate a preprocessed ciphertext by performing preprocessing on the operand ciphertext based on automorphism, and generate an operation result of the homomorphic encryption by performing the blind rotation operation for the operand ciphertext on a vector component of the preprocessed ciphertext and a vector component of the blind rotation key.

Abstract: A homomorphic encryption apparatus and method are disclosed. The homomorphic encryption apparatus includes one or more processors, and memory storing instructions configured to, when executed by the one or more processors, cause the one or more processors to receive a blind rotation key for performing a blind rotation operation and receive an operand ciphertext of the blind rotation operation, generate a first ciphertext by performing addition of a polynomial representation based on the blind rotation key and the operand ciphertext, and generate a target ciphertext by performing key switching and accumulative multiplication based on the first ciphertext.

Abstract: An apparatus with homomorphic encryption includes: a first memory configured to receive and store a polynomial; a second memory configured to store a twiddle factor; a number theoretic transform (NTT) module configured to perform an NTT operation on the polynomial based on the twiddle factor; and a controller configured to control the first memory, the second memory, and the NTT module, wherein the NTT module comprises a butterfly unit (BU) array that comprises a plurality of BUs configured to, for the performing of the NTT operation, perform a modular operation on coefficients of the polynomial.

Abstract: Disclosed are apparatuses and methods with crypto processing. Computing devices may be interconnected to each other. Each computing device may be configured to perform polynomial operations based on homomorphic encryption. Memories may be configured to store instructions. Controllers may be configured to transfer instructions from the memories to the computing devices. One or more of the computing devices may each be configured to individually process, in parallel, at least a portion of the polynomial operations based on the homomorphic encryption according to an instruction transferred from a corresponding memory.

Abstract: An encryption key generating method and apparatus based on homomorphic encryption, and a ciphertext operation method and apparatus using the generated encrypt key are disclosed. The method of generating an encryption key for performing encryption based on homomorphic encryption includes receiving data, generating a first encryption key and a second encryption key used for encrypting the data based on a secret key, and transmitting the first and second encryption keys.

Abstract: Disclosed is a method and apparatus for modulus refresh, where the method for modulus refresh of a ciphertext in homomorphic encryption includes receiving a first ciphertext corresponding to a first modulus, generating a second ciphertext by performing a blind rotation on the first ciphertext, and generating a target ciphertext corresponding to a second modulus greater than the first modulus based on the first ciphertext and the second ciphertext.

Abstract: A crypto processor, a method of operating a crypto processor, and an electronic device including a crypto processor. A method of operating a crypto processor for performing a polynomial multiplication of lattice-based texts includes transferring coefficients of polynomials for the polynomial multiplication to multipliers, performing multiplications for a portion of the coefficients in parallel using the multipliers, performing an addition for a portion of results of the multiplications using an adder, and determining a result of the polynomial multiplication based on another portion of the results of the multiplications and a result of the addition.

Abstract: Provided are computing devices, each including a plurality of cores, and methods of allocating power to the plurality of cores. The computing device includes: a control core group including a plurality of control cores, the control core group configured to allocate a power budget to processing cores according to an energy management policy and state information of the processing cores, and transmit the allocated power budget to at least one of a lower control core and the processing cores; and a processing core group including at least one or more of the processing cores, the processing core group configured to perform computations based on the power budget allocated by the control core group, and transmit state information of the processing cores to the control core group, the state information of the processing cores having been modified based on the computations performed.

Abstract: A method and device for comparing movement paths based on homomorphic encrypted is disclosed, where a server includes a processor configured to collect first encrypted movement path information of a comparison target encrypted by a common key, receive, from a user device, second encrypted movement path information of a user of the user device encrypted by a private key, compare the first encrypted movement path information and the second encrypted movement path information, decrypt a portion of a result of the comparison by the common key to generate a partially decrypted comparison result, and provide the partially decrypted result of the comparison to the user.

Abstract: A computing system is provided. The computing system includes: a memory configured to store a shader program; and a graphics processing unit (GPU) configured to obtain the shader program stored in the memory in a profile mode, the GPU being configured to perform: inserting, into the shader program, one or more monitor associative codes; compiling the shader program, into which the one or more monitor associative codes are inserted, into a language that is capable of being processed by a plurality of cores; and obtaining a runtime performance characteristic of the shader program by executing the compiled shader program and the one or more monitor associative codes.

Abstract: An apparatus configured to render an object including a path includes a storage circuit, an arithmetic circuit configured to determine a direction of a plurality of primitives included in the path based on path data, generate primitive direction information, store the primitive direction information in the storage circuit, and generate a winding number of each of a plurality of pixels using the stored primitive direction information, and a determination circuit configured to determine whether a shading operation is to be performed based on the generated winding number.

Abstract: A processor device includes a scheduler and a performance counter. The scheduler schedules commands of a first command set and commands of a second command set for a functional unit. A performance counter counts numbers of times where events of interest respectively occur while the functional unit processes first operations directed by the first command set and second operations directed by the second command set. The commands of the first command set are repeatedly scheduled such that the numbers of times for all the events of interest are counted with regard to the first operations. The commands of the second command set are scheduled after the numbers of times for all the events of interest are counted with regard to the first operations.

Abstract: A swizzle pattern generator is provided to reduce an overhead due to execution of a swizzle instruction in vector processing. The swizzle pattern generator is configured to provide swizzle patterns with respect to data sets of at least one vector register or vector processing unit. The swizzle pattern generator may be reconfigurable to generate various swizzle patterns for different vector operations.

Abstract: Provided are a graphics processing unit and a graphics processing method for performing path rendering. The graphics processing method may include receiving object information including primitive information regarding the object; generating a primitive mask with respect to respective pixels, the primitive mask corresponding to the primitive information and including a plurality of bits; generating, based on the primitive mask, winding numbers with respect to the respective pixels; and rendering the pixels, based on the winding numbers.

Abstract: A computing system is provided. The computing system includes: a memory configured to store a shader program; and a graphics processing unit (GPU) configured to obtain the shader program stored in the memory in a profile mode, the GPU being configured to perform: inserting, into the shader program, one or more monitor associative codes; compiling the shader program, into which the one or more monitor associative codes are inserted, into a language that is capable of being processed by a plurality of cores; and obtaining a runtime performance characteristic of the shader program by executing the compiled shader program and the one or more monitor associative codes.