Abstract: Disclosed are a processor, a processor operation method and an electronic device comprising same. The disclosed processor operation method comprises the steps of: identifying an instruction for instructing the execution of a first operation and address information of an operand corresponding to the instruction; and executing the instruction on the basis of whether or not the address information of the operand satisfies a predetermined condition. In the step of executing the instruction, a second operation configured to the instruction is executed for the operand if the address information of the operand satisfies the predetermined condition, and the first operation is executed for the operand if the address information of the operand does not satisfy the predetermined condition.

Abstract: An interface element connected to a device and a security die-chip are fabricated in a single package. The security die-chip may provide a security authentication function to the interface element that does not have the security authentication function. The security die-chip may include a physically unclonable function (PUF) to provide a private key, and a hardware security module to perform encryption and decryption using the private key.

Abstract: Provided is a PUF by which an identification key is generated according to a random event caused by a semiconductor process variation. The PUF can provide the identification key as a result of electrical differences among elements. According to one embodiment, the PUF can accumulate the electrical differences and/or instantaneous values without generating the identification key by using the instantaneous values caused by the electrical differences. The accumulation may be the accumulation of a discrete iteration and the result thereof. However, according to another embodiment, the accumulation may be a continuation of the accumulation result during time intervals.

Abstract: Provided is an information processing apparatus including a physical unclonable function (PUF) to generate a unique key using a process variation in a semiconductor manufacturing process, and an encryption unit to encrypt a password and/or bio-information received from a user using the unique key.

Abstract: Disclosed are a processor, a processor operation method and an electronic device comprising same. The disclosed processor operation method comprises the steps of: identifying an instruction for instructing the execution of a first operation and address information of an operand corresponding to the instruction; and executing the instruction on the basis of whether or not the address information of the operand satisfies a predetermined condition. In the step of executing the instruction, a second operation configured to the instruction is executed for the operand if the address information of the operand satisfies the predetermined condition, and the first operation is executed for the operand if the address information of the operand does not satisfy the predetermined condition.

Abstract: Provided is a PUF by which an identification key is generated according to a random event caused by a semiconductor process variation. The PUF can provide the identification key as a result of electrical differences among elements. According to one embodiment, the PUF can accumulate the electrical differences and/or instantaneous values without generating the identification key by using the instantaneous values caused by the electrical differences. The accumulation may be the accumulation of a discrete iteration and the result thereof. However, according to another embodiment, the accumulation may be a continuation of the accumulation result during time intervals.

Abstract: Provided is a PUF by which an identification key is generated according to a random event caused by a semiconductor process variation. The PUF can provide the identification key as a result of electrical differences among elements. According to one embodiment, the PUF can accumulate the electrical differences and/or instantaneous values without generating the identification key by using the instantaneous values caused by the electrical differences. The accumulation may be the accumulation of a discrete iteration and the result thereof. However, according to another embodiment, the accumulation may be a continuation of the accumulation result during time intervals.

Abstract: Disclosed is a secure semiconductor chip. The semiconductor chip is, for example, a system-on-chip. The system-on-chip is operated by connecting normal IPs to a processor core included therein via a system bus. A secure bus, which is a hidden bus physically separated from the system bus, is separately provided. Security IPs for performing a security function or handling security data are connected to the secure bus. The secure semiconductor chip can perform required authentication while shifting between a normal mode and a secure mode.

Abstract: Provided are an apparatus and a method for generating an identification key with improved reliability by: providing a plurality of resistances which are generated according to a random connection state between conductive layers of a semiconductor due to process variation of the semiconductor; discriminating a first group which has a resistance value greater than a first threshold value and less than a second threshold value among the plurality of resistances; and reading at least one resistance which does not belong to the first group out of the plurality of resistances and reading an identification key in the form of a digital value.

Abstract: An interface element connected to a device and a security die-chip are fabricated in a single package. The security die-chip may provide a security authentication function to the interface element that does not have the security authentication function. The security die-chip may include a physically unclonable function (PUF) to provide a private key, and a hardware security module to perform encryption and decryption using the private key.

Abstract: Disclosed is a method of generating a physical unclonable function (PUF) by causing unpredictable partial process failure for a semiconductor process. In a designing process, a second mask pattern may be printed by distorting a size and/or shape of at least one mask window included in a designed first mask pattern, without violating semiconductor design rules. A PUF may be generated using a photomask including the printed second mask pattern for photolithography.

Abstract: An interface element connected to a device and a security die-chip are fabricated in a single package. The security die-chip may provide a security authentication function to the interface element that does not have the security authentication function. The security die-chip may include a physically unclonable function (PUF) to provide a private key, and a hardware security module to perform encryption and decryption using the private key.

Abstract: Provided is an information processing apparatus including a physical unclonable function (PUF) to generate a unique key using a process variation in a semiconductor manufacturing process, and an encryption unit to encrypt a password and/or bio-information received from a user using the unique key.

Abstract: A vehicle security network design device may comprise: a level assigning unit for assigning an automobile safety integrity level (ASIL) which provides a risk management standard for each of a plurality of functional elements in a vehicle that is at least temporarily implemented by a processor; a calculation unit for calculating device's controllability with respect to each of the plurality of functional elements on the basis of a connection structure between the plurality of functional elements and a difference value of the ASIL; and a management unit for generating a risk analysis model of a plurality of functional elements.

Abstract: Provided is an apparatus for testing randomness of a digital value and processing the digital value. The digital value may include first bit sequences generated by a physically unclonable function (PUF). A grouping unit may generate a plurality of groups by segmenting the first bit sequence, and a processing unit may calculate a second bit sequence from the plurality of groups by performing a logical operation.

Abstract: Provided is an information processing apparatus including a physical unclonable function (PUF) to generate a unique key using a process variation in a semiconductor manufacturing process, and an encryption unit to encrypt a password and/or bio-information received from a user using the unique key.

Abstract: Provided are a security apparatus and an operation method thereof. The security apparatus comprises a core circuit which performs a security function by using an authentication key such as a secret key provided by a physically unclonable function (PUF). The security apparatus may receive event information indicating that the security apparatus is in a security-vulnerable state such as a case where the security apparatus is stolen or lost. In such case, a power management circuit can apply at least one electrical shock of overvoltage and overcurrent to the security apparatus to cause physical damage to the security apparatus, so that the core circuit does not perform the security function normally.

Abstract: Provided is an apparatus for generating an identification key by a probabilistic determination of a short occurring between nodes constituting a circuit, by violating a design rule provided during a semiconductor manufacturing process. The identification key generating apparatus may include an identification key generator to generate an identification key based on whether a contact or a via used to electrically connect conductive layers in a semiconductor chip shorts the conductive layers, and an identification key reader to read the identification key by reading whether the contact or the via shorts the conductive layers.

Abstract: A vehicle security network design device may comprise: a level assigning unit for assigning an automobile safety integrity level (ASIL) which provides a risk management standard for each of a plurality of functional elements in a vehicle that is at least temporarily implemented by a processor; a calculation unit for calculating device's controllability with respect to each of the plurality of functional elements on the basis of a connection structure between the plurality of functional elements and a difference value of the ASIL; and a management unit for generating a risk analysis model of a plurality of functional elements.

Abstract: Provided is an apparatus for generating an identification key by a probabilistic determination of a short occurring between nodes constituting a circuit, by violating a design rule provided during a semiconductor manufacturing process. The identification key generating apparatus may include an identification key generator to generate an identification key based on whether a contact or a via used to electrically connect conductive layers in a semiconductor chip shorts the conductive layers, and an identification key reader to read the identification key by reading whether the contact or the via shorts the conductive layers.