Patents by Inventor Dong Kyue Kim
Dong Kyue Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10771268Abstract: Provided is an apparatus for generating digital values to provide a random digital value. The apparatus may generate the digital value based on a semiconductor process variation. The apparatus may include a generating unit to generate a plurality of digital values, based on the semiconductor process variation, and a processing unit to process the digital values and to provide a first digital value. The generating unit may include a plurality of physically unclonable functions (PUFs). A parameter may be differently applied to the PUFs, and the PUFs may generate the digital values.Type: GrantFiled: October 3, 2018Date of Patent: September 8, 2020Assignee: ICTK HOLDINGS CO., LTDInventors: Dong Kyue Kim, Byong Deok Choi
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Patent number: 10658311Abstract: Provided is a device for generating an identification key using a process variation during a manufacturing process of a conductive layer. The device for generating an identification key may include a plurality of conductive layers designed so as to be formed in a first region within a semiconductor chip, the density in which the plurality of conductive layers are disposed in the first region being at least a first threshold value and not more than a second threshold value, the first and second threshold values being less than a minimum density according to the design rules for ensuring that all of the plurality of conductive layers are formed in the first region; and a reader which provides an identification key by identifying if, among the plurality of conductive layers, a previously designated first conductive layer has been formed.Type: GrantFiled: January 17, 2019Date of Patent: May 19, 2020Assignee: ICTK Holdings Co., Ltd.Inventors: Byong Deok Choi, Dong Kyue Kim
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Patent number: 10659232Abstract: Disclosed is an authentication apparatus using a public key encryption algorithm. An apparatus according to an embodiment generates a first instant public key through a random number generation process in response to an electronic signature generation request corresponding to a message. Further, the apparatus calculates and uses a first instant private key making a pair with the first instant public key, using the first instant public key.Type: GrantFiled: April 9, 2015Date of Patent: May 19, 2020Assignee: ICTK Holdings Co., Ltd.Inventors: Dong Kyue Kim, Byong Deok Choi, Dong Hyun Kim, Sang Seon Park
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Patent number: 10629548Abstract: Provided are a device and method for generating an identification key using process variation during a bipolar junction transistor (BJT) process. A BJT may be produced by designing such that the effective base width of the BJT is at least a first threshold value but not more than a second threshold value, or, such that the total of the width of a second depletion region formed by connection with a collector region and the width of a first depletion region formed by connection with an emitter region, within a base region, differs from the width of the base region by a value that is at least the first threshold value but not more than the second threshold value. Whether or not there is a short circuit between the emitter region and the collector region is stochastically generated, and if ordinary turn-on voltage is not applied, whether or not there is a short circuit is identified.Type: GrantFiled: February 7, 2019Date of Patent: April 21, 2020Assignee: ICTK Holdings Co., Ltd.Inventors: Byong Deok Choi, Dong Kyue Kim
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Patent number: 10629549Abstract: Provided are a device and method for generating an identification key using process variation during a bipolar junction transistor (BJT) process. A BJT may be produced by designing such that the effective base width of the BJT is at least a first threshold value but not more than a second threshold value, or, such that the total of the width of a second depletion region formed by connection with a collector region and the width of a first depletion region formed by connection with an emitter region, within a base region, differs from the width of the base region by a value that is at least the first threshold value but not more than the second threshold value. Whether or not there is a short circuit between the emitter region and the collector region is stochastically generated by means of process variation, and if ordinary turn-on voltage is not applied to the base in the produced BJT, whether or not there is a short circuit is identified by means of a reader and an identifier is provided.Type: GrantFiled: April 19, 2019Date of Patent: April 21, 2020Assignee: ICTK Holdings Co., Ltd.Inventors: Byong Deok Choi, Dong Kyue Kim
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Publication number: 20190391485Abstract: Disclosed is a method of generating a physical unclonable function (PUF) by causing unpredictable partial process failure for a semiconductor process. In a designing process, a second mask pattern may be printed by distorting a size and/or shape of at least one mask window included in a designed first mask pattern, without violating semiconductor design rules. A PUF may be generated using a photomask including the printed second mask pattern for photolithography.Type: ApplicationFiled: August 26, 2019Publication date: December 26, 2019Inventors: Byong Deok Choi, Dong Kyue Kim, Kwang Hyun Jee
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Patent number: 10423067Abstract: Disclosed is a method of generating a physical unclonable function (PUF) by causing unpredictable partial process failure for a semiconductor process. In a designing process, a second mask pattern may be printed by distorting a size and/or shape of at least one mask window included in a designed first mask pattern, without violating semiconductor design rules. A PUF may be generated using a photomask including the printed second mask pattern for photolithography.Type: GrantFiled: August 26, 2014Date of Patent: September 24, 2019Assignee: ICTK Holdings Co., Ltd.Inventors: Byong Deok Choi, Dong Kyue Kim, Kwang Hyun Jee
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Publication number: 20190253417Abstract: A secure semiconductor chip is presented. The semiconductor chip is, for example, a system-on-chip. Processor cores included in the system-on-chip are connected to normal IPs through a system bus. A secure bus, which is a hidden bus physically separated from the system bus, is provided separately. The secure bus is connected to security IPs which perform security functions or handle security data. The secure semiconductor chip may perform necessary authentication by switching a normal mode to a secure mode.Type: ApplicationFiled: February 13, 2017Publication date: August 15, 2019Inventors: Dong Kyue KIM, Ji-Hoon KIM
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Publication number: 20190244916Abstract: Provided are a device and method for generating an identification key using process variation during a bipolar junction transistor (BJT) process. A BJT may be produced by designing such that the effective base width of the BJT is at least a first threshold value but not more than a second threshold value, or, such that the total of the width of a second depletion region formed by connection with a collector region and the width of a first depletion region formed by connection with an emitter region, within a base region, differs from the width of the base region by a value that is at least the first threshold value but not more than the second threshold value. Whether or not there is a short circuit between the emitter region and the collector region is stochastically generated by means of process variation, and if ordinary turn-on voltage is not applied to the base in the produced BJT, whether or not there is a short circuit is identified by means of a reader and an identifier is provided.Type: ApplicationFiled: April 19, 2019Publication date: August 8, 2019Inventors: Byong Deok Choi, Dong Kyue Kim
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Publication number: 20190172799Abstract: Provided is a device for generating an identification key using a process variation during a manufacturing process of a conductive layer. The device for generating an identification key may include a plurality of conductive layers designed so as to be formed in a first region within a semiconductor chip, the density in which the plurality of conductive layers are disposed in the first region being at least a first threshold value and not more than a second threshold value, the first and second threshold values being less than a minimum density according to the design rules for ensuring that all of the plurality of conductive layers are formed in the first region; and a reader which provides an identification key by identifying if, among the plurality of conductive layers, a previously designated first conductive layer has been formed.Type: ApplicationFiled: January 17, 2019Publication date: June 6, 2019Inventors: Byong Deok Choi, Dong Kyue Kim
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Publication number: 20190171850Abstract: Provided is an apparatus for generating an identification key by a probabilistic determination of a short occurring between nodes constituting a circuit, by violating a design rule provided during a semiconductor manufacturing process. The identification key generating apparatus may include an identification key generator to generate an identification key based on whether a contact or a via used to electrically connect conductive layers in a semiconductor chip shorts the conductive layers, and an identification key reader to read the identification key by reading whether the contact or the via shorts the conductive layers.Type: ApplicationFiled: February 4, 2019Publication date: June 6, 2019Applicant: ICTK Holdings Co., Ltd.Inventors: Byong Deok CHOI, Dong Kyue KIM, Tae Wook KIM
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Publication number: 20190172801Abstract: Provided are a device and method for generating an identification key using process variation during a bipolar junction transistor (BJT) process. A BJT may be produced by designing such that the effective base width of the BJT is at least a first threshold value but not more than a second threshold value, or, such that the total of the width of a second depletion region formed by connection with a collector region and the width of a first depletion region formed by connection with an emitter region, within a base region, differs from the width of the base region by a value that is at least the first threshold value but not more than the second threshold value. Whether or not there is a short circuit between the emitter region and the collector region is stochastically generated, and if ordinary turn-on voltage is not applied, whether or not there is a short circuit is identified.Type: ApplicationFiled: February 7, 2019Publication date: June 6, 2019Inventors: Byong Deok Choi, Dong Kyue Kim
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Publication number: 20190123917Abstract: Provided is an information processing apparatus including a physical unclonable function (PUF) to generate a unique key using a process variation in a semiconductor manufacturing process, and an encryption unit to encrypt a password and/or bio-information received from a user using the unique key.Type: ApplicationFiled: December 14, 2018Publication date: April 25, 2019Inventors: Dong Kyue Kim, Byong Deok Choi, Dong Hyun Kim, Kwang Hyun Jee
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Publication number: 20190114437Abstract: A vehicle security network design device may comprise: a level assigning unit for assigning an automobile safety integrity level (ASIL) which provides a risk management standard for each of a plurality of functional elements in a vehicle that is at least temporarily implemented by a processor; a calculation unit for calculating device's controllability with respect to each of the plurality of functional elements on the basis of a connection structure between the plurality of functional elements and a difference value of the ASIL; and a management unit for generating a risk analysis model of a plurality of functional elements.Type: ApplicationFiled: January 19, 2017Publication date: April 18, 2019Applicants: IUCF-HYU(Industry-University Cooperation Foundation Hanyang University, ICTK Holdings Co., Ltd.Inventors: Dong Kyue KIM, Byong Deok CHOI
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Publication number: 20190114428Abstract: Disclosed is a secure semiconductor chip. The semiconductor chip is, for example, a system-on-chip. The system-on-chip is operated by connecting normal IPs to a processor core included therein via a system bus. A secure bus, which is a hidden bus physically separated from the system bus, is separately provided. Security IPs for performing a security function or handling security data are connected to the secure bus. The secure semiconductor chip can perform required authentication while shifting between a normal mode and a secure mode.Type: ApplicationFiled: February 13, 2017Publication date: April 18, 2019Inventors: Dong Kyue KIM, Ji-Hoon KIM
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Patent number: 10263781Abstract: An IC chip for preventing an authentication key from leaking, and an authentication key setting and authentication key verifying method are provided. A part performing connection or disconnection between an external terminal and a smartcard chip may be configured by a separate chip or may be incorporated into the smartcard chip to configure a single chip. When the part is configured by the separate chip, the disconnection between the external terminal and the smart card chip can be performed according to whether an authentication key is verified. When the part is configured by the one chip, the disconnection between the external terminal and the smart card chip can be performed under a control of the smartcard chip according to whether the authentication key is verified.Type: GrantFiled: January 15, 2014Date of Patent: April 16, 2019Assignee: ICTK Holdings Co., Ltd.Inventors: Byong Deok Choi, Dong Kyue Kim, Sang Seon Park, Kwang Hyun Jee, Dong Hyun Kim
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Patent number: 10235261Abstract: A randomness testing apparatus is disclosed. A randomness testing apparatus according to an embodiment includes a randomness testing module to conduct a randomness test on physically unclonable function (PUF)-based hardware and a processing device to determine whether the PUF-based hardware is defective on the basis of a randomness test result.Type: GrantFiled: July 28, 2014Date of Patent: March 19, 2019Assignee: ICTK Holdings Co., Ltd.Inventors: Dong Kyue Kim, Byong Deok Choi, Kwang Hyun Jee
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Patent number: 10235540Abstract: Provided is an apparatus for generating an identification key by a probabilistic determination of a short occurring between nodes constituting a circuit, by violating a design rule provided during a semiconductor manufacturing process. The identification key generating apparatus may include an identification key generator to generate an identification key based on whether a contact or a via used to electrically connect conductive layers in a semiconductor chip shorts the conductive layers, and an identification key reader to read the identification key by reading whether the contact or the via shorts the conductive layers.Type: GrantFiled: February 4, 2016Date of Patent: March 19, 2019Assignee: ICTK Holdings Co., Ltd.Inventors: Byong Deok Choi, Dong Kyue Kim, Tae Wook Kim
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Patent number: 10224296Abstract: Provided is a device for generating an identification key using a process variation during a manufacturing process of a conductive layer. The device for generating an identification key may include a plurality of conductive layers designed so as to be formed in a first region within a semiconductor chip, the density in which the plurality of conductive layers are disposed in the first region being at least a first threshold value and not more than a second threshold value, the first and second threshold values being less than a minimum density according to the design rules for ensuring that all of the plurality of conductive layers are formed in the first region; and a reader which provides an identification key by identifying if, among the plurality of conductive layers, a previously designated first conductive layer has been formed.Type: GrantFiled: February 17, 2014Date of Patent: March 5, 2019Assignee: ICTK Holdings Co., Ltd.Inventors: Byong Deok Choi, Dong Kyue Kim
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Patent number: 10224295Abstract: Provided are a device and method for generating an identification key using process variation during a bipolar junction transistor (BJT) process. A BJT may be produced by designing such that the effective base width of the BJT is at least a first threshold value but not more than a second threshold value, or, such that the total of the width of a second depletion region formed by connection with a collector region and the width of a first depletion region formed by connection with an emitter region, within a base region, differs from the width of the base region by a value that is at least the first threshold value but not more than the second threshold value. Whether or not there is a short circuit between the emitter region and the collector region is stochastically generated, and if ordinary turn-on voltage is not applied, whether or not there is a short circuit is identified.Type: GrantFiled: February 17, 2014Date of Patent: March 5, 2019Assignee: ICTK Holdings Co., Ltd.Inventors: Byong Deok Choi, Dong Kyue Kim