Abstract: A semiconductor device may include a voltage threshold compensation (VTC) sense amplifier configured to amplify signals read from memory cells to recognizable logic levels. The VTC sense amplifier may equalize threshold voltages of transistors at the sense amplifier during a compensation phase before sensing a memory cell. The compensation phase may be delayed or extended in duration by an amount based on a combination of currents that are proportional to absolute temperature (PTAT) and zero to absolute temperature (ZTAT), or PTAT and complementary to absolute temperature (CTAT). Different combinations of PTAT and ZTAT currents, or PTAT and CTAT currents, may correspond to different temperature slopes. The semiconductor device may choose from the different temperature slopes to achieve different delays for given temperatures.

Abstract: Apparatuses and methods for row hammer counter mat. A memory array may have a number of memory mats and a counter memory mat. The counter mat stores count values, each of which is associated with a row in one of the other memory mats. When a row is accessed, the count value is read out, changed, and written back to the counter mat. In some embodiments, the count value may be processed within access logic of the counter mat, and a row hammer flag may be provided to the bank logic. In some embodiments, the counter mat may have a folded architecture where each sense amplifier is coupled to multiple bit lines in the counter mat. The count value may be used to determine if the accessed row is an aggressor so that its victims can be refreshed as part of a targeted refresh.

Abstract: A communication method for quantum direct communication and quantum direct communication system, an electronic device and a non-transitory computer-readable storage medium. The quantum direct communication method is applied to a sender of the quantum secure direct communication system. The communication method includes: encrypting a transmitted message by using an encryption algorithm to obtain a ciphertext corresponding to the transmitted message; encoding the ciphertext into a quantum state through a quantum direct communication terminal of the sender according to a quantum communication protocol; and sending the quantum state to a receiver of the quantum direct communication system. According to some embodiments, by utilizing the encryption algorithm to encrypt the transmitted message, the capability of eavesdropper detection is provided for ciphertext transmission, reducing the risk of messages being intercepted by eavesdroppers.

Abstract: Systems and methods described herein may increase voltages sensed during testing of a device-under-test, which may increase an ease of sensing by a comparator, where a relatively less sensitive comparator may be used to detect the increased voltage sensed. Indeed, readout circuitry may include two or more diodes coupled in series to a resistor, which may help increase the voltages sensed via the readout circuitry.

Abstract: The present application relates to a quantum secure direct communication method and apparatus based on a one-way transmission, a device and a system. The transmitting terminal performs the error-correction anti-loss encoding on the to-be-transmitted message to obtain the code word corresponding to the to-be-transmitted message. The encryption key negotiated with the receiving terminal is adopted to encrypt the code word and the ciphertext message corresponding to the code word is obtained. Further, the ciphertext message is encoded onto the quantum state, and the obtained quantum state information is transmitted to the receiving terminal through the quantum channel.

Abstract: The present disclosure provides a urea pyrolysis test device and method. The urea pyrolysis test device includes a pyrolysis reactor, a urea preparation unit and an injection unit, where the pyrolysis reactor is provided with a flue therein, the urea preparation unit is configured to prepare a urea solution, and the injection unit is connected to the urea preparation unit and includes a plurality of nozzles extending into the flue so as to spray the urea solution into the flue.

Abstract: The present application provides a secure repeater-based quantum communication method and communication network. Said method comprises a transmitter encrypting plaintext information to be sent, to obtain ciphertext; the transmitter sending the ciphertext to a repeater node by means of a quantum communication protocol, so as to send the ciphertext to a receiver by means of at least one repeater node; and after receiving the ciphertext, the receiver decrypting the ciphertext to obtain the plaintext information. The ciphertext is transmitted step by step by means of the at least one repeater node, which is not limited to the distance between the transmitter and the receiver, so that the ciphertext can be transmitted over a long distance. Furthermore, before arriving at the receiver, the plaintext information is transmitted in the form of a ciphertext and is decrypted on the fly, thereby reducing the risk of information being eavesdropped, improving the security.

Abstract: An electronic device, such as a memory device, may include various circuit components. A memory array of the memory device may be powered via a power distribution network. Over time, loading of voltage regulators may change based on demand of the power distribution network. By including a bias voltage generator to supply the voltage regulators with a compensated bias current, voltages generated by the voltage regulators may be better compensated over temperature and process changes. Voltage regulators that generate relatively more compensated voltages may experience improved matching on transient performance. For example, a Slow process corner transient response may relatively match a Fast process corner transient response (e.g., within a threshold range of difference).

Abstract: Provided is a fly ash removal device for a flue gas, including a fly ash collection assembly adapted to be arranged in a flue. The fly ash collection assembly includes: a flow baffle, a flow guiding component, and a collecting component.

Abstract: Counters may be provided for individual word lines of a memory for tracking word line accesses. In some examples, multiple counters may be provided for individual word lines. In some examples, the counters may be included on the word lines. The counters may be incremented responsive to word line accesses in some examples. In some examples, the counters may be incremented responsive for a time period for which a word line is held open. In some examples, the counters may be incremented responsive to both word line accesses and time periods for which the word line is held open. In some examples, count values for the counters may be written back to the counters after incrementing. In some examples, the count values may be written back prior to receiving a precharge command.

Abstract: Provided herein are methods for treating cancer in a subject comprising administering an ICB therapy to a subject having cancer, wherein the subject's cancer comprises one or more mutations in two or more genes associated with responsiveness to immune checkpoint blockade (ICB).

Abstract: Apparatuses and methods per-row count based refresh target identification. A memory device stores count values associated with the word lines. An aggressor detector circuit stores a maximum of the count values and a row address associated with the maximum count value. Responsive to a targeted refresh signal, the stored count value is compared to a threshold. If the count value has crossed the threshold, then a targeted refresh operation may be performed on one or more refresh addresses based on the stored address, and the count value may be reset.

Abstract: The present disclosure relates to a method for managing cache data, an apparatus, a storage medium and an electronic device, the method includes: acquiring a remaining available space of a solid-state disk for storing cache data; upon the remaining available space being less than a first space threshold, determining a first target fragment group in the solid-state disk that has the greatest garbage proportion, each fragment group including a first number of fragments, and each fragment corresponding to a second number of contiguous logical address spaces in the solid-state disk; and purging the cache data in the first target fragment of the first target fragment group that has the greatest garbage proportion, with this method, the space utilization rate of the solid-state disk can be improved.

Abstract: Counters may be provided for individual word lines of a memory for tracking word line accesses. In some examples, multiple counters may be provided for individual word lines. In some examples, the counters may be included on the word lines. The counters may be incremented responsive to word line accesses in some examples. In some examples, the counters may be incremented responsive for a time period for which a word line is held open. In some examples, the counters may be incremented responsive to both word line accesses and time periods for which the word line is held open. In some examples, count values for the counters may be written back to the counters after incrementing. In some examples, the count values may be written back prior to receiving a precharge command.

Abstract: Provided is a device for spraying an ammoniacal gas in an automatically-adjustable manner based on a flow rate

Abstract: Apparatuses and methods for row hammer counter mat. A memory array may have a number of memory mats and a counter memory mat. The counter mat stores count values, each of which is associated with a row in one of the other memory mats. When a row is accessed, the count value is read out, changed, and written back to the counter mat. In some embodiments, the count value may be processed within access logic of the counter mat, and a row hammer flag may be provided to the bank logic. In some embodiments, the counter mat may have a folded architecture where each sense amplifier is coupled to multiple bit lines in the counter mat. The count value may be used to determine if the accessed row is an aggressor so that its victims can be refreshed as part of a targeted refresh.

Abstract: Systems and methods described herein may increase voltages sensed during testing of a device-under-test, which may increase an ease of sensing by a comparator, where a relatively less sensitive comparator may be used to detect the increased voltage sensed. Indeed, first readout circuitry may include two or more diodes coupled in series to a first resistor, which may help increase the voltages sensed via the first readout circuitry.

Abstract: Apparatuses and techniques for implementing usage-based disturbance (UBD) counter repair are described. In example implementations, a memory device includes multiple memory rows, multiple corresponding UBD counters, a register, and a spare UBD counter. If a UBD counter is faulty, logic can substitute the spare UBD counter. To do so, the logic can store a row address corresponding to the faulty UBD counter in the register. The logic can increment a value in the spare UBD counter responsive to a row activation corresponding to the stored row address. A mitigation procedure on a row that may be affected by the activation can be performed based on the value. A host device can control, at least partially, the UBD counter repair process. In these manners, a repair of a faulty UBD counter can be accomplished faster and/or with fewer resources as compared to replacing a memory row and corresponding UBD counter.

Abstract: Systems and devices are provided for tracking bandgap current generated by a bandgap circuit and mitigation of leakage current regardless of variations in PVT conditions. An apparatus may include one or more power amplifiers that powers components of the apparatus and comprising a transistor. The apparatus may also include bandgap current mirroring circuitry that generates a mirrored current that mirrors a received current that is process, voltage, and temperature (PVT) independent. The apparatus may also include a bulk voltage generator circuit including an amplifier having an input coupled to the bandgap current mirroring circuitry. Bulk voltage control circuitry is coupled to an output of the amplifier and generates a bulk voltage based on the relationship between the mirrored current and the leakage current.

Abstract: A semiconductor device may include a voltage threshold compensation (VTC) sense amplifier configured to amplify signals read from memory cells to recognizable logic levels. The VTC sense amplifier may equalize threshold voltages of transistors at the sense amplifier during a compensation phase before sensing a memory cell. The compensation phase may be delayed or extended in duration by an amount based on a combination of currents that are proportional to absolute temperature (PTAT) and zero to absolute temperature (ZTAT), or PTAT and complementary to absolute temperature (CTAT). Different combinations of PTAT and ZTAT currents, or PTAT and CTAT currents, may correspond to different temperature slopes. The semiconductor device may choose from the different temperature slopes to achieve different delays for given temperatures.