Patents by Inventor Dong Pan
Dong Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11969904Abstract: A registration system for robot-oriented augmented reality teaching system, comprising: a physical robot unit, a registration unit, a virtual robot generation unit and a computer; the physical robot unit comprising a physical robot, a physical robot controller and a robot point-to-point intermittent movement control program; the physical robot provided thereon with a physical robot base coordinate system; the physical robot controller connected with the physical robot and the computer respectively; the robot point-to-point intermittent movement control program installed in the computer; the registration unit comprising a registration marker, a camera and a conversion calculation unit; the registration marker arranged on the physical robot body; the camera fixed in a physical environment except the physical robot; the camera connected with the computer, and the conversion calculation unit arranged in the computer; the virtual robot generation unit arranged in the computer and used for generating a virtual roboType: GrantFiled: March 24, 2020Date of Patent: April 30, 2024Assignee: QINGDAO UNIVERSITY OF TECHNOLOGYInventors: Cheng Jun Chen, Xu Tong Ding, Yong Pan, Dong Nian Li, Jun Hong
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Patent number: 11967355Abstract: A device includes source circuitry comprising a first portion of a current mirror and a first transistor. The device also includes load circuitry comprising a second portion of the current mirror and a second transistor, wherein the load circuitry is disposed at a distance from the source circuitry. The device further includes a path coupled to a first gate of the first transistor and to a second gate of the second transistor, wherein the path provides a predetermined voltage to both of the first gate of the first transistor and to the second gate of the second transistor.Type: GrantFiled: June 20, 2022Date of Patent: April 23, 2024Assignee: Micron Technology, Inc.Inventors: Wei Lu Chu, Dong Pan
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Patent number: 11929749Abstract: Methods and apparatuses are provided for temperature independent resistive-capacitive delay circuits of a semiconductor device. For example, delays associated with ZQ calibration or timing of the RAS chain may be implemented that to include circuitry that exhibits both proportional to absolute temperature (PTAT) characteristics and complementary to absolute temperature (CTAT) characteristics in order to control delay times across a range of operating temperatures. The RC delay circuits may include a first type of circuitry having impedance with PTAT characteristics that is coupled to an output node in parallel with a second type of circuitry having impedance with CTAT characteristics. The first type of circuitry may include a resistor and the second type of circuitry may include a transistor, in some embodiments.Type: GrantFiled: July 18, 2022Date of Patent: March 12, 2024Assignee: Micron Technology, Inc.Inventors: Zhiqi Huang, Weilu Chu, Dong Pan
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Patent number: 11912861Abstract: This invention relates to a rubber compound for tire treads, comprising: 30 to 70 parts by weight per hundred parts by weight rubber (phr) of a cyclopentene ring-opening rubber having a Tg of ?120° C. to ?80° C. and a ratio of cis to trans of 5:95 to 40:60; and 20 phr to 60 phr of a high vinyl polybutadiene rubber.Type: GrantFiled: October 28, 2021Date of Patent: February 27, 2024Assignee: ExxonMobil Engineering & Technology Co.Inventor: Xiao-Dong Pan
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Publication number: 20240048371Abstract: The present application provides a secure repeater-based quantum communication method and communication network. Said method comprises a transmitter encrypting plaintext information to be sent, to obtain ciphertext; the transmitter sending the ciphertext to a repeater node by means of a quantum communication protocol, so as to send the ciphertext to a receiver by means of at least one repeater node; and after receiving the ciphertext, the receiver decrypting the ciphertext to obtain the plaintext information. The ciphertext is transmitted step by step by means of the at least one repeater node, which is not limited to the distance between the transmitter and the receiver, so that the ciphertext can be transmitted over a long distance. Furthermore, before arriving at the receiver, the plaintext information is transmitted in the form of a ciphertext and is decrypted on the fly, thereby reducing the risk of information being eavesdropped, improving the security.Type: ApplicationFiled: July 28, 2021Publication date: February 8, 2024Inventors: Guilu LONG, Dong PAN
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Publication number: 20240038321Abstract: An electronic device, such as a memory device, may include various circuit components. The electronic device may also include one or more voltage testing circuits to determine whether signals of one or more of the circuit components are within acceptable voltage ranges of the respective circuit components. Systems and methods are described to improve correct voltage measurement of the received signals by a voltage testing circuit. In particular, multiple supply voltage levels are provided to different components of the voltage testing circuit to provide a sufficient headroom voltage gap between received signals and the supply voltages. For example, some active circuits (e.g., operational amplifiers) of the voltage testing circuit may receive a higher supply voltage of the electronic device compared to one or more other circuits of the voltage testing circuit.Type: ApplicationFiled: July 26, 2022Publication date: February 1, 2024Inventors: Subhasis Sasmal, Dong Pan
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Publication number: 20230410877Abstract: A device includes source circuitry comprising a first portion of a current mirror and a first transistor. The device also includes load circuitry comprising a second portion of the current mirror and a second transistor, wherein the load circuitry is disposed at a distance from the source circuitry. The device further includes a path coupled to a first gate of the first transistor and to a second gate of the second transistor, wherein the path provides a predetermined voltage to both of the first gate of the first transistor and to the second gate of the second transistor.Type: ApplicationFiled: June 20, 2022Publication date: December 21, 2023Inventors: Wei Lu Chu, Dong Pan
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Patent number: 11829177Abstract: A semiconductor device may include a bandgap circuit that outputs a reference voltage. The bandgap circuit may include a bandgap core circuit and a startup circuit coupled to the bandgap core circuit. The startup circuit may connect a voltage source to a node that corresponds to an output of the bandgap core circuit in response to the bandgap core circuit being initialized. The startup circuit may also disconnect the voltage source from the node in response to the output voltage being equal to or greater than a desired voltage (e.g., a threshold voltage) and one or more local voltages of the bandgap core circuit being equal to or greater than a local threshold voltage.Type: GrantFiled: August 2, 2021Date of Patent: November 28, 2023Assignee: Micron Technology, Inc.Inventors: Suresh Chattu, Wei Lu Chu, Dong Pan
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Patent number: 11831399Abstract: Disclosed are an optical multiplexing and demultiplexing module having an automatic discovery function, comprising a signal transmission portion and a signal reception portion. The signal transmission portion transmits information about the optical multiplexing and demultiplexing module by modulating transmission power of a laser. The signal reception portion samples and decodes the received optical power signal to acquire information about the other optical multiplexing and demultiplexing modules borne thereon. In configuring a wavelength division multiplexing transmission system, the device of the present disclosure may simplify the complexity of manual configuration, improve the accuracy of configuration, reduce the cost and failure rate in a solution in which an individual transceiver is used as an automatic discovery function, and adapt to different connection modes.Type: GrantFiled: December 19, 2016Date of Patent: November 28, 2023Inventors: Lu Guo, Dong Pan, Qingyan Yue
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Patent number: 11824441Abstract: A multi-mode voltage pump may be configured to select an operational mode based on a temperature of a semiconductor device. The selected mode for a range of temperature values may be determined based on process variations and operational differences caused by temperature changes. The different selected modes of operation of the multi-mode voltage pump may provide pumped voltage having different voltage magnitudes. For example, the multi-mode voltage pump may operate in a first mode that uses two stages to provide a first VPP voltage, a second mode that uses a single stage to provide a second VPP voltage, or a third mode that uses a mixture of a single stage and two stages to provide a third VPP voltage. The third VPP voltage may be between the first and second VPP voltages, with the first VPP voltage having the greatest magnitude. Control signal timing of circuitry of the multi-mode voltage pump may be based on an oscillator signal.Type: GrantFiled: June 14, 2022Date of Patent: November 21, 2023Assignee: Micron Technology, Inc.Inventors: Dong Pan, Beau D. Barry, Liang Liu
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Patent number: 11781918Abstract: A temperature sensor is disclosed. The temperature sensor includes an analog core having at least first and second circuit nodes and configured to provide a temperature dependent output, a multiplexer coupled to the first and second circuit nodes and configured for at least first and second states in each of which the first circuit node couples to a different circuit element and in each of which the second circuit node couples to a different circuit element, and a controller coupled to the analog core and configured to provide a temperature measurement that is an average of at least first and second readings of the temperature dependent output of the analog core, the first reading taken while the multiplexer is in the first state, and the second reading taken while the multiplexer is in the second state.Type: GrantFiled: July 11, 2019Date of Patent: October 10, 2023Assignee: Micron Technology, Inc.Inventor: Dong Pan
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Patent number: 11749331Abstract: Apparatuses, systems, and methods for refresh modes. A memory may need to perform targeted refresh operations to refresh the ‘victim’ word lines which are near to frequently accessed ‘aggressor’ word lines. To refresh the victims at a high enough rate, it may be desirable to refresh multiple victims as part of the same refresh operation. However, certain word lines (e.g., word lines in a same section or adjacent sections of the memory) cannot be refreshed together. The memory may have a section comparator, which may check stored aggressor addresses and may provide a signal if there are not two stored addresses which can be refreshed together. Based, in part, on the signal, the memory may activate one of several different refresh modes, which may control the types of refresh operation performed responsive to a refresh signal.Type: GrantFiled: May 10, 2022Date of Patent: September 5, 2023Inventors: Jun Wu, Yu Zhang, Dong Pan
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Publication number: 20230253928Abstract: Systems and devices are provided for tracking bandgap current generated by a bandgap circuit and mitigation of leakage current regardless of variations in PVT conditions. An apparatus may include one or more power amplifiers that powers components of the apparatus and comprising a transistor. The apparatus may also include bandgap current mirroring circuitry that generates a mirrored current that mirrors a received current that is process, voltage, and temperature (PVT) independent. The apparatus may also include a bulk voltage generator circuit including an amplifier having an input coupled to the bandgap current mirroring circuitry. Bulk voltage control circuitry is coupled to an output of the amplifier and generates a bulk voltage based on the relationship between the mirrored current and the leakage current.Type: ApplicationFiled: January 24, 2022Publication date: August 10, 2023Inventors: Wei Lu Chu, Dong Pan
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Patent number: 11721387Abstract: Methods, systems, and devices for compensating for kickback noise are described. A regulator may include an input circuit, a bias circuit, and an enable circuit. The regulator may be configured so that the enable circuit is positioned between the input circuit and the bias circuit. A balance resistor may be included in a path between an input of the regulator and a gate of a bias transistor included in the bias transistor. A size of the balance resistor may be based on an amount of charge drawn by the bias transistor during an activation event. Dimensions of the bias transistor may be modified based on an amount of charge drawn by the bias transistor during an activation event.Type: GrantFiled: July 13, 2022Date of Patent: August 8, 2023Assignee: Micron Technology, Inc.Inventors: Wei Lu Chu, Dong Pan
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Publication number: 20230206989Abstract: Apparatuses and methods for row hammer counter mat. A memory array may have a number of memory mats and a counter memory mat. The counter mat stores count values, each of which is associated with a row in one of the other memory mats. When a row is accessed, the count value is read out, changed, and written back to the counter mat. In some embodiments, the count value may be processed within access logic of the counter mat, and a row hammer flag may be provided to the bank logic. In some embodiments, the counter mat may have a folded architecture where each sense amplifier is coupled to multiple bit lines in the counter mat. The count value may be used to determine if the accessed row is an aggressor so that its victims can be refreshed as part of a targeted refresh.Type: ApplicationFiled: December 29, 2021Publication date: June 29, 2023Applicant: MICRON TECHNOLOGY, INC.Inventors: Yuan He, Dong Pan
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Publication number: 20230206980Abstract: Apparatuses and methods for row hammer counter mat. A memory array may have a number of memory mats and a counter memory mat. The counter mat stores count values, each of which is associated with a row in one of the other memory mats. When a row is accessed, the count value is read out, changed, and written back to the counter mat. In some embodiments, the count value may be processed within access logic of the counter mat, and a row hammer flag may be provided to the bank logic. In some embodiments, the counter mat may have a folded architecture where each sense amplifier is coupled to multiple bit lines in the counter mat. The count value may be used to determine if the accessed row is an aggressor so that its victims can be refreshed as part of a targeted refresh.Type: ApplicationFiled: December 29, 2021Publication date: June 29, 2023Applicant: MICRON TECHNOLOGY, INC.Inventors: Yuan He, Dong Pan
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Publication number: 20230145787Abstract: A rubber compound for heavy-duty truck or bus tire treads may comprise: 5 to 100 parts by weight per hundred parts by weight rubber (phr) of a long chain branched cyclopentene ring opening rubber (LCB-CPR) having a glass transition temperature (Tg) of ?120° C. to ?80° C., a g?vis of 0.50 to 0.91, and a ratio of cis-to-trans of 40:60 to 5:95; 0 phr to 95 phr of a rubber selected from a group consisting of a natural rubber (NR), a polybutadiene rubber (BR), and a combination thereof; 30 phr to 90 phr of a reinforcing filler; and 0.5 phr to 20 phr of a process oil.Type: ApplicationFiled: February 26, 2021Publication date: May 11, 2023Inventors: Alan A. Galuska, Alexander V. Zabula, Yong Yang, Carlos R. Lopez-Barron, Brian J. Rohde, Xiao-Dong Pan, Wen J. Liu
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Publication number: 20230130953Abstract: A rubber compound suitable for passenger tires may comprise: 40 to 70 parts by weight per hundred parts by weight rubber (phr) of a long chain branched cyclopentene ring-opening rubber (LCB-CPR) having a glass transition temperature (Tg) of ?120° C. to ?80° C., a g?vis of 0.50 to 0.91, and a ratio of cis to trans of 40:60 to 5:95, 30 phr to 60 phr of a styrene-butadiene rubber (SBR), wherein the SBR has a glass transition temperature (Tg) of ?60° C. to ?5° C., 50 phr to 110 phr of a reinforcing filler, and 20 phr to 50 phr of a process oil.Type: ApplicationFiled: February 26, 2021Publication date: April 27, 2023Inventors: Xiao-Dong Pan, Alan A. Galuska, Feng Li, Nieves Hernandez, JR.
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Patent number: 11632084Abstract: Methods, systems, and devices for operating an amplifier with a controllable pull-down capability are described. A memory device may include a memory array and a power circuit that generates an internal signal for components in the memory array. The power circuit may include an amplifier and a power transistor that is coupled with the amplifier. A pull-down capability of the amplifier may be controllable using an external signal that is based on a difference between a reference signal and the internal signal. The power circuit may also include a comparator that is coupled with the amplifier and configured to compare the reference signal and the internal signal. Components of the comparator may be integrated with components of the amplifier, may share a bias circuit, and may use nodes within the amplifier to control the comparator. A signal output by the comparator may control the pull-down capability of the amplifier.Type: GrantFiled: December 18, 2020Date of Patent: April 18, 2023Assignee: Micron Technology, Inc.Inventors: Wei Lu Chu, Zhi Qi Huang, Dong Pan
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Patent number: 11626152Abstract: Apparatuses and methods for pure-time, self-adopt sampling for RHR refresh. An example apparatus includes a memory bank comprising a plurality of rows each associated with a respective row address, and a sampling timing generator circuit configured to provide a timing signal having a plurality of pulses. Each of the plurality of pulses is configured to initiate sampling of a respective row address associated with a row of the plurality of rows to detect a row hammer attack. The sampling timing generator includes first circuitry configured to provide a first subset of pulses of the plurality of pulses during a first time period and includes second circuitry configured to initiate provision of a second subset of pulses of the plurality of pulses during a second time period after the first time period.Type: GrantFiled: May 19, 2021Date of Patent: April 11, 2023Assignee: Micron Technology, Inc.Inventors: Jun Wu, Dong Pan