Abstract: Apparatuses and methods for row hammer counter mat. A memory array may have a number of memory mats and a counter memory mat. The counter mat stores count values, each of which is associated with a row in one of the other memory mats. When a row is accessed, the count value is read out, changed, and written back to the counter mat. In some embodiments, the count value may be processed within access logic of the counter mat, and a row hammer flag may be provided to the bank logic. In some embodiments, the counter mat may have a folded architecture where each sense amplifier is coupled to multiple bit lines in the counter mat. The count value may be used to determine if the accessed row is an aggressor so that its victims can be refreshed as part of a targeted refresh.

Abstract: Systems and methods described herein may increase voltages sensed during testing of a device-under-test, which may increase an ease of sensing by a comparator, where a relatively less sensitive comparator may be used to detect the increased voltage sensed. Indeed, first readout circuitry may include two or more diodes coupled in series to a first resistor, which may help increase the voltages sensed via the first readout circuitry.

Abstract: Apparatuses and techniques for implementing usage-based disturbance (UBD) counter repair are described. In example implementations, a memory device includes multiple memory rows, multiple corresponding UBD counters, a register, and a spare UBD counter. If a UBD counter is faulty, logic can substitute the spare UBD counter. To do so, the logic can store a row address corresponding to the faulty UBD counter in the register. The logic can increment a value in the spare UBD counter responsive to a row activation corresponding to the stored row address. A mitigation procedure on a row that may be affected by the activation can be performed based on the value. A host device can control, at least partially, the UBD counter repair process. In these manners, a repair of a faulty UBD counter can be accomplished faster and/or with fewer resources as compared to replacing a memory row and corresponding UBD counter.

Abstract: Systems and devices are provided for tracking bandgap current generated by a bandgap circuit and mitigation of leakage current regardless of variations in PVT conditions. An apparatus may include one or more power amplifiers that powers components of the apparatus and comprising a transistor. The apparatus may also include bandgap current mirroring circuitry that generates a mirrored current that mirrors a received current that is process, voltage, and temperature (PVT) independent. The apparatus may also include a bulk voltage generator circuit including an amplifier having an input coupled to the bandgap current mirroring circuitry. Bulk voltage control circuitry is coupled to an output of the amplifier and generates a bulk voltage based on the relationship between the mirrored current and the leakage current.

Abstract: A semiconductor device may include a voltage threshold compensation (VTC) sense amplifier configured to amplify signals read from memory cells to recognizable logic levels. The VTC sense amplifier may equalize threshold voltages of transistors at the sense amplifier during a compensation phase before sensing a memory cell. The compensation phase may be delayed or extended in duration by an amount based on a combination of currents that are proportional to absolute temperature (PTAT) and zero to absolute temperature (ZTAT), or PTAT and complementary to absolute temperature (CTAT). Different combinations of PTAT and ZTAT currents, or PTAT and CTAT currents, may correspond to different temperature slopes. The semiconductor device may choose from the different temperature slopes to achieve different delays for given temperatures.

Abstract: An electronic paper display device includes a first base substrate, and a plurality of sub-pixels on the first base substrate. Each sub-pixel includes: a first electrode on the first base substrate; a second electrode on the first electrode and including a plurality of grooves passing through thereof, the orthographic projection of the grooves on the first base substrate falling within the orthographic projection of the first electrode on the first base substrate; a microstructure on the side of the second electrode away from the first base substrate and including a paper film microcavity and a plurality of charged particles in the paper film microcavity, where the plurality of charged particles include a plurality of first color charged particles and a plurality of second color charged particles with opposite electrical properties; and a third electrode on the side of the microstructure away from the second electrode.

Abstract: A value associated with a number of accesses of a word line and a length of said accesses may be stored on said word line. A timer may provide a periodic signal that increments a counter to update the value. The updated value may then be written back to the word line. In some examples, a memory device including the word lines may have a specification that prevents the word line from closing prior to writing the updated value to the word line.

Abstract: The present application relates to a quantum secure direct communication method and apparatus based on a one-way transmission, a device and a system. The transmitting terminal performs the error-correction anti-loss encoding on the to-be-transmitted message to obtain the code word corresponding to the to-be-transmitted message. The encryption key negotiated with the receiving terminal is adopted to encrypt the code word and the ciphertext message corresponding to the code word is obtained. Further, the ciphertext message is encoded onto the quantum state, and the obtained quantum state information is transmitted to the receiving terminal through the quantum channel.

Abstract: Disclosed herein is a two-component system for preparing deodorant polyurethane foams, which system includes component A including (b) at least one compound having at least two hydrogen atoms reactive toward isocyanates, (c) optionally chain extender and/or crosslinking agent, (d) blowing agent, (e) catalyst, and (f) optionally auxiliaries and additives, and component B including (a) at least one polyisocyanate, and (g) at least one anhydride. Further disclosed herein are a method of preparing deodorant polyurethane foams by the two-component system and a method of using such polyurethane foams in certain applications.

Abstract: A display substrate includes a base substrate, the base substrate including a display region, and the display region including a plurality of pixel regions; and at least four conductive layers arranged in a stacked manner, located on the base substrate, wherein any two adjacent conductive layers are arranged in an insulated manner, each of the conductive layers includes conductive patterns located in the pixel regions, the conductive patterns of any two adjacent conductive layers in the same pixel region form a storage capacitor (e.g., Cst1, Cst2 and Cst3), and in a direction perpendicular to the base substrate, projections of the at least four conductive layers on the base substrate overlap. A manufacturing method of a display substrate and a display device are further provided.

Abstract: Electronic paper includes a display panel and a drive component. The display panel may include a plurality of pixels disposed in a display region and a photoelectric conversion transistor disposed in a non-display region. The drive component is electrically connected to the plurality of pixels, and is electrically connected to a current output terminal of the photoelectric conversion transistor.

Abstract: The present disclosure provides a lithium manganate positive electrode active material, comprising a lithium manganate matrix and a cladding layer, where the cladding layer comprises an organic bonding material, one or more A-type salts, and one or more B-type salts. The lithium manganate positive electrode active material of the present disclosure significantly reduces the content of transition metal manganese ions within a battery through combined action of the organic bonding material, the A-type salts, and the B-type salts, thereby slowing down the decomposition and consumption of the SEI film (solid electrolyte interphase) by transition metal manganese, and improving the capacity retention rate and impedance performance of the battery.

Abstract: An electronic device, such as a memory device, may include various circuit components. The electronic device may also include one or more voltage testing circuits to determine whether signals of one or more of the circuit components are within acceptable voltage ranges of the respective circuit components. Systems and methods are described to improve correct voltage measurement of the received signals by a voltage testing circuit. In particular, multiple supply voltage levels are provided to different components of the voltage testing circuit to provide a sufficient headroom voltage gap between received signals and the supply voltages. For example, some active circuits (e.g., operational amplifiers) of the voltage testing circuit may receive a higher supply voltage of the electronic device compared to one or more other circuits of the voltage testing circuit.

Abstract: A device includes source circuitry comprising a first portion of a current mirror and a first transistor. The device also includes load circuitry comprising a second portion of the current mirror and a second transistor, wherein the load circuitry is disposed at a distance from the source circuitry. The device further includes a path coupled to a first gate of the first transistor and to a second gate of the second transistor, wherein the path provides a predetermined voltage to both of the first gate of the first transistor and to the second gate of the second transistor.

Abstract: Methods and apparatuses are provided for temperature independent resistive-capacitive delay circuits of a semiconductor device. For example, delays associated with ZQ calibration or timing of the RAS chain may be implemented that to include circuitry that exhibits both proportional to absolute temperature (PTAT) characteristics and complementary to absolute temperature (CTAT) characteristics in order to control delay times across a range of operating temperatures. The RC delay circuits may include a first type of circuitry having impedance with PTAT characteristics that is coupled to an output node in parallel with a second type of circuitry having impedance with CTAT characteristics. The first type of circuitry may include a resistor and the second type of circuitry may include a transistor, in some embodiments.

Abstract: This invention relates to a rubber compound for tire treads, comprising: 30 to 70 parts by weight per hundred parts by weight rubber (phr) of a cyclopentene ring-opening rubber having a Tg of ?120° C. to ?80° C. and a ratio of cis to trans of 5:95 to 40:60; and 20 phr to 60 phr of a high vinyl polybutadiene rubber.

Abstract: The present application provides a secure repeater-based quantum communication method and communication network. Said method comprises a transmitter encrypting plaintext information to be sent, to obtain ciphertext; the transmitter sending the ciphertext to a repeater node by means of a quantum communication protocol, so as to send the ciphertext to a receiver by means of at least one repeater node; and after receiving the ciphertext, the receiver decrypting the ciphertext to obtain the plaintext information. The ciphertext is transmitted step by step by means of the at least one repeater node, which is not limited to the distance between the transmitter and the receiver, so that the ciphertext can be transmitted over a long distance. Furthermore, before arriving at the receiver, the plaintext information is transmitted in the form of a ciphertext and is decrypted on the fly, thereby reducing the risk of information being eavesdropped, improving the security.

Abstract: An electronic device, such as a memory device, may include various circuit components. The electronic device may also include one or more voltage testing circuits to determine whether signals of one or more of the circuit components are within acceptable voltage ranges of the respective circuit components. Systems and methods are described to improve correct voltage measurement of the received signals by a voltage testing circuit. In particular, multiple supply voltage levels are provided to different components of the voltage testing circuit to provide a sufficient headroom voltage gap between received signals and the supply voltages. For example, some active circuits (e.g., operational amplifiers) of the voltage testing circuit may receive a higher supply voltage of the electronic device compared to one or more other circuits of the voltage testing circuit.

Abstract: A device includes source circuitry comprising a first portion of a current mirror and a first transistor. The device also includes load circuitry comprising a second portion of the current mirror and a second transistor, wherein the load circuitry is disposed at a distance from the source circuitry. The device further includes a path coupled to a first gate of the first transistor and to a second gate of the second transistor, wherein the path provides a predetermined voltage to both of the first gate of the first transistor and to the second gate of the second transistor.

Abstract: A semiconductor device may include a bandgap circuit that outputs a reference voltage. The bandgap circuit may include a bandgap core circuit and a startup circuit coupled to the bandgap core circuit. The startup circuit may connect a voltage source to a node that corresponds to an output of the bandgap core circuit in response to the bandgap core circuit being initialized. The startup circuit may also disconnect the voltage source from the node in response to the output voltage being equal to or greater than a desired voltage (e.g., a threshold voltage) and one or more local voltages of the bandgap core circuit being equal to or greater than a local threshold voltage.