Abstract: An apparatus may include a sort circuit for receiving first and second baseband signals, where the sort circuit shifting frequencies of the first and second baseband signals. The apparatus may also include a removal circuit for receiving the shifted first and second baseband signals and for combining the shifted first and second baseband signals to provide a frequency-modulated signal, and a symbol timing restoration circuit for measuring a timing error in related symbols of the frequency-modulated signal, for generating an address selection signal that is proportional to the timing error, in response to a carrier restoration signal, and for indicating restoration of the carrier.

Abstract: A carrier recovery apparatus, which may used in a high-definition TV receiver, includes an error compensating unit, an error detecting unit, and an oscillator. The error compensating unit combines a complex input signal with a frequency signal to generate a complex output signal. The complex output signal includes an error reference signal. The error detecting unit determines a location of the error reference signal in the complex output signal based on a real part of the complex output signal, and generates an error signal based on the location of the error reference signal. The oscillator generates the frequency signal with a frequency that varies based on the error signal. The complex input signal may be a VSB signal that is represented as a complex number, and the error reference signal may be a PN63 signal in a field synchronization signal of the complex input signal.

Abstract: An equalizer for a single-carrier receiver having an enhanced convergence speed and a steady equalization performance. A filter unit filters received multi-path signals. A field synch extractor extracts a field synch signal having two signals of different levels from the received signals and a field synch storage unit stores a kth field synch signal of the extracted field synch signal. An error calculator N times repeatedly uses the kth field synch signal and calculates equalization error values, wherein the filter unit uses the equalization error values to update coefficients of the filters. Accordingly, the equalizer N times repeats the kth field synch signal to be compared to a reference signal generated from the field synch generator, so as to be operated in a training mode, to thereby enhance the convergence speed of the equalizer.

Abstract: The present invention provides an equalizer capable of improving an equalization speed. The equalizer comprises a channel estimation unit estimating channel estimation values using a received signal inputted thereto and a generated field synchronizing signal, a filter filtering a pre-ghost and post-ghost of the received signal using the channel estimation values, wherein the filter initializes coefficients of filters thereof and updates the coefficients gradually, thereby filtering the pre and post-ghosts and an error calculation unit calculating an equalization error using an output signal from the filter unit. The filter updates the coefficients of the filters according to the equalization error and filters the pre and post-ghosts through these updated filters. The filters of the equalizer are initialized by estimating a delay profile of a received signal, thereby improving a convergence speed of equalization of an equalizer.

Abstract: An equalizer and an equalization method usable in a high definition television (HDTV) are provided. The equalizer may receive an input signal including a data signal and a training sequence and may compensate for distortion of the input signal in a high definition television. The equalizer may include an input signal reuse unit, a filter unit, and an error calculation unit. The error calculation unit may receive an equalizer output signal, may estimate the equalizer output signal at an estimate value, may generate the estimate value as a decision value, and may output a difference between the equalizer output signal and the decision value as the error signal.

Abstract: A dual HDTV/NTSC receiver for recovering one of a HDTV signal and a NTSC signal coexisting in a desired channel includes a tuning unit for converting a desired one of HDTV signals and NTSC signals into an intermediate frequency (IF) signal, a sync detector, coupled to receive the IF signal for detecting a sync signal of the NTSC signal, a timing recovery unit, coupled to receive the IF signal for self-recovering symbol timing of the applied HDTV signal, and providing a symbol timing lock signal corresponding to the IF signal and an analog-to-digital converted HDTV signal, a controller for judging whether a currently received television signal is either a NTSC signal or a HDTV signal based on the sync detection result of the sync detector and the symbol timing lock signal from the timing recovery unit, and for outputting a control signal according to the determination result, and a tuning controller for initially controlling the tuning unit so that one desired HDTV signal is received, and for subsequently cont

Abstract: A dual HDTV/NTSC receiver for recovering one of a HDTV signal and a NTSC signal coexisting in a desired channel includes a tuning unit for converting a desired one of HDTV signals and NTSC signals into an intermediate frequency (IF) signal, a sync detector, coupled to receive the IF signal for detecting a sync signal of the NTSC signal, a timing recovery unit, coupled to receive the IF signal for self-recovering symbol timing of the applied HDTV signal, and providing a symbol timing lock signal corresponding to the IF signal and an analog-to-digital converted HDTV signal, a controller for judging whether a currently received television signal is either a NTSC signal or a HDTV signal based on the sync detection result of the sync detector and the symbol timing lock signal from the timing recovery unit, and for outputting a control signal according to the determination result, and a tuning controller for initially controlling the tuning unit so that one desired HDTV signal is received, and for subsequently cont

Abstract: A symbol timing recovery apparatus recovers the symbol timing necessary for sampling a signal received in a receiver of a high-speed data transmission system such as a full-digital high-definition television. Pre-processing filters primarily determine a signal component necessary for recovering the symbol timing from the received signal. Square calculators, respectively corresponding to an I-channel and a Q-channel, square the outputs of the pre-processing filters. An adder adds the outputs of the square calculators. A narrow-band filter performs narrow-band filtering having a center frequency which matches a symbol rate with respect to the output of the adder. An average value detector calculates an average value of the positive-going zero-crossing point and determines a sampling point in time and a symbol timing interval. A clock generator uses the sampling point in time and the symbol timing interval and generates a sampling clock which is appropriate for an input signal.

Abstract: A data segment synchronizing signal detecting circuit for reducing bit resolution of an HDTV without affecting its function. The apparatus includes a hard limiter added between a four-symbol correlator and an adder, to obtain a 2-bit output of three-level values for a four-bit input.

Abstract: An apparatus is provided for detecting when a carrier signal and a symbol timing have been recovered for a demodulated signal corresponding to a received signal. The apparatus contains an estimating circuit and a detection signal generation circuit. The estimating circuit calculates an average value of the demodulated signal and outputs an estimation value which corresponds to the average value. The generation circuit detects when the carrier signal and the symbol timing of the demodulated signal have been recovered based on the estimation value and generates a corresponding recovery completion detection signal. Specifically, the generation circuit includes a carrier signal detection circuit and a symbol timing detection circuit. The carrier signal detection circuit determines that the carrier signal has been recovered when the estimation value exceeds a first threshold value, and the circuit generates a corresponding carrier recovery signal.

Abstract: A digital carrier wave restoring device for use in a telecommunication receiving system which utilizes a pilot signal: frequency-converts an output signal of a filter to a digital signal processing frequency band; phase-splits the digital signal to output a first I signal and a first Q signal; low-pass filters and phase-splits the digital signal to output a second I signal and a second Q signal; mixes the first I signal and the first Q signal with a fixed local oscillation frequency to output a first I signal and a first Q signal of a baseband; mixes the second I signal and the second Q signal with the fixed local oscillation frequency to output a second I signal and a second Q signal of a baseband; and detects a frequency error and a phase error to generate an error correction value for correcting the frequency error and the phase error, and for applying to a tuning unit a second tuning frequency which is obtained by adding a preliminary correction frequency value to the error correction value, to thereby ca

Abstract: An adaptive equalizer for use in a high definition television (HDTV) receiver, which includes a filtering device having a first filter for FIR (Finite Impulse Response) filtering by receiving a real signal and a real coefficient for output from the filtering device, a second filter for FIR filtering by receiving the real signal and an imaginary coefficient, a third filter for FIR filtering by receiving the real coefficient and an imaginary signal, and a fourth filter for FIR filtering by receiving the imaginary signal and the imaginary coefficient. The adaptive equalizer also includes an adding device having a first adder and a second adder, the first adder subtracting the second filter output from the first filter output in the filtering device, and the second adder adding the outputs of the third and fourth filters.