Abstract: A transimpedance amplification apparatus includes a signal source for generating a current signal, a source follower stage, a common source stage and a shunt feedback resistor. The source follower stage having a source follower structure receives the current signal to reduce an impedance of the signal source. The common source stage, following the source follower stage, driven by the reduced signal source impedance, amplifies the current signal to extend a frequency bandwidth of the current signal and buffers the amplified signal with the extended frequency bandwidth thereof maintained, wherein the reduced signal source impedance serves to extend a frequency bandwidth of the common source stage. The shunt feedback resistor, which is installed between the source follower stage and the common source stage, adjusts an input DC bias of the source follower stage and increasing a transimpedance gain of the common source stage.

Abstract: A biosensor and a sensing cell array using a biosensor are disclosed. Adjacent materials containing a plurality of different ingredients are analyzed to determine the ingredients based on their magnetic susceptibility or dielectric constant. A sensing cell array includes such as a magnetization pair detection sensor including a MTJ (Magnetic Tunnel Junction) or GMR (Giant Magnetoresistive) device, a magnetoresistive sensor including a MTJ device and a magnetic material (current line), a dielectric constant sensor including a sensing capacitor and a switching device, a magnetization hole detection sensor including a MTJ or GMR device, a current line, a free ferromagnetic layer and a switching device, and a giant magnetoresistive sensor including a GMR device, a switching device and a magnetic material (or forcing wordline).

Abstract: A heat sink assembly includes a back plate (10), a clip (20) and a heat sink (50). The back plate is attached below a motherboard (60) on which a CPU (63) is mounted. The heat sink is attached on the CPU. Two posts (13) of the back plate extend through the motherboard and the heat sink. The heat sink includes a base (51) and fins (55). A longitudinal channel (57) is transversely defined through the fins. The base defines a recess (53) under the channel fittingly receiving an annular disc (58) therein. The clip includes a pressing portion (22) received in the channel, and two locking portions (29) engaging with the corresponding posts. A bolt (40) is screwed through the pressing portion to abut against the disc. By adjusting a depth to which the bolt is screwed, the clip can provide adjustable pressure acting on the heat sink.

Abstract: A method is disclosed for manufacturing a semiconductor device. Initially, a conductive layer is formed over a cell array region, in which high-integrated devices are formed, and over a non-cell region, which functions to assist a proper formation of the cell array region. An etching mask pattern is then formed over the conductive layer to form a conductive pattern over the cell array region and to remove the conductive layer formed on the non-cell region. The conductive pattern is actually formed by etching the conductive layer. An ion-assisted plasma etching is then implemented to form a pattern on the cell array region. This prevents the generation of arcing caused by independent conductive patterns formed on the non-cell region during the ion-assisted plasma etching.

Abstract: A heat sink assembly includes a back plate (10), a clip (20) and a heat sink (50). The back plate is attached below a motherboard (60) on which a CPU (63) is mounted. The heat sink is attached on the CPU. Two posts (13) of the back plate extend through the motherboard and the heat sink. The heat sink includes a base (51) and fins (55). A longitudinal channel (57) is transversely defined through the fins. The base defines a recess (53) under the channel fittingly receiving an annular disc (58) therein. The clip includes a pressing portion (22) received in the channel, and two locking portions (29) engaging with the corresponding posts. A bolt (40) is screwed through the pressing portion to abut against the disc. By adjusting a depth to which the bolt is screwed, the clip can provide adjustable pressure acting on the heat sink.

Abstract: A broadband amplification apparatus for extending a bandwidth includes a first and a second amplifying unit for amplifying an input signal, a buffering unit and a first inductive buffer. The buffering unit disposed between the first and the second amplifying unit buffers an output signal of the first amplifying unit to thereby maintain a bandwidth of the output signal, increases a gain and returns back a portion of the buffered signal to the first amplifying unit. The first inductive buffer, which is connected to the buffer unit, enhances input impedance as a frequency increases within a predetermined range, thereby introducing little gain changes while serving to extend a bandwidth.

Abstract: A spacer is formed on a side wall of a gate electrode formed over a substrate, and a dielectric interlayer is then formed over the substrate, the gate electrode and the spacer. A region of the dielectric interlayer is then subjected to a first etching process using an etching gas. An emission amount of a chemical compound emitted during the first etching process is detected, where the chemical compound is produced by a chemical reaction of the etching gas and the spacer. The region of the dielectric interlayer is then subjected to a second etching process upon detecting that the emission amount of the chemical compound has reached a given level. The second etching process may be continued until a contact hole is defined in the dielectric interlayer.

Abstract: A relocatable container inspection device, which is constituted by modularized units, is used for inspecting a container.

Abstract: A wireless communication system to support real time service and handoff method thereof. A plurality of mobile management units having a plurality of visitor management units perform a handoff based on the movement of a mobile communication unit. One or more visitor management unit is a common visitor management unit that is included in a network constructed by the plurality of mobile management units. When the mobile communication unit moves to another visitor management unit of the same mobile management unit, the mobile management unit including the mobile communication unit updates the mobility information to provide a real time service path between the information providing unit and the mobile communication unit. When the mobile communication unit moves to a different mobile management unit, the common visitor management unit requests another mobile management unit for registration of the mobile communication unit, thereby making a reservation for a real time service path.

Abstract: A relocatable container inspection device, which is constituted by modularized units, is used for inspecting a container.

Abstract: An integrated circuit having a locking circuit and method using the same are provided. The locking circuit includes a time-to-digital converter. The time-to-digital converter includes first and second delay chains, each for delaying one of two input signals at predetermined intervals. The time-to-digital converter also includes first and second phase comparators, each for comparing the delayed signal with the other signal and generating a digital signal. The locking circuit converts the phase difference between a feedback signal and an internal clock signal into a delay control signal group using the time-to-digital converter. The delay control signal group controls the delay time of a mirror delay circuit to rapidly minimize the phase difference between the feedback signal and the internal clock signal.

Abstract: Disclosed is a processor clock generation circuit and related method for a low power consumption modem chip design, comprising a first clock generator for generating a first clock signal in response to enable and disable signals; a second clock generator for generating a second clock signal that is lower, in frequency, than the first clock signal; a decoder for decoding an externally inputted instruction to check whether the inputted instruction is a power-down instruction or a power-up instruction, and generating control signals; a clock selection unit for, if the instruction is the power-down instruction, outputting the second clock signal as a processor clock signal and outputting a clock change end signal in response to a control signal outputted from the decoder and, if the instruction is the power-up instruction, outputting the first clock signal as the processor clock signal in response to the outputted control signal from the decoder and a first clock wake-up end signal; and a first clock controller f

Abstract: A spacer is formed on a side wall of a gate electrode formed over a substrate, and a dielectric interlayer is then formed over the substrate, the gate electrode and the spacer. A region of the dielectric interlayer is then subjected to a first etching process using an etching gas. An emission amount of a chemical compound emitted during the first etching process is detected, where the chemical compound is produced by a chemical reaction of the etching gas and the spacer. The region of the dielectric interlayer is then subjected to a second etching process upon detecting that the emission amount of the chemical compound has reached a given level. The second etching process may be continued until a contact hole is defined in the dielectric interlayer.

Abstract: Load driving circuits are adjusted to drive loads with fewer or more pull-down devices by sensing the load electrically coupled to the load driving circuit. In particular, capacitance of the load is compared to a threshold capacitance. If the capacitance of the load is less than the threshold capacitance, selected ones of the pull-down devices are disabled, thereby reducing the capacity of the load driving circuit. If the capacitance of the load is greater than the threshold capacitance, selected ones of the pull-down devices are enabled, thereby increasing the capacity of the load driving circuit. The pull-down devices include delay circuits that enable selected transistors after a delay.

Abstract: A method for etching a metal film containing aluminum, using a hard mask, and a method for forming a line of a semiconductor device using the same, are provided. A metal film containing Al is formed on a semiconductor substrate. A hard mask pattern is formed on the metal film containing Al. Next, the metal film containing Al is etched using an etching gas, including a gas containing carbon, and using the hard mask pattern as the etching mask. Preferably, the hard mask pattern is formed of an oxide film or a nitride film in which case a capping layer for the etched metal layer is not needed.

Abstract: An integrated circuit which generates a plurality of local clock signals with substantially no phase difference from an internal clock signal and a stable internal clock generating circuit that generates an internal clock having with reduced sensitivity to variations in a manufacturing process, temperature, supply voltage and noise are provided. The local clock signal generating circuit includes a plurality of phase blenders, each which receives the signals at two points on a clock signal line which transmits the internal clock signals, blends the received signals, and generates a local clock signal having a phase intermediate the phases of the signals at the two points. The internal clock signal generating circuit includes a feedback circuit and a delay lock loop (DLL) circuit.

Abstract: Clock generating circuits include a clock buffer, a delay mirror circuit (DMC), a clock frequency divider circuit and a clock generator circuit. The clock buffer is responsive to an external clock signal EXTCLK and generates a buffered clock signal ICLK in response to the external clock signal EXTCLK. The buffered clock signal ICLK is delayed relative to the external clock signal EXTCLK by a fixed buffer delay time "dtb". The delay mirror circuit (DMC) is responsive to the buffered clock signal ICLK and generates a delayed clock signal IDCLK. The delayed clock signal IDCLK is delayed relative to the buffered clock signal ICLK by a fixed delay-mirror time "dtot". The clock frequency divider circuit is responsive to the buffered clock signal ICLK and the delayed clock signal IDCLK. The clock frequency divider circuit includes first and second divider devices that generate first and second divided clock signals VDIV1 and VDIV2, respectively.

Abstract: A method of forming a low-k dielectric insulating layer includes forming the dielectric insulating layer and then removing hydrogen bonds in the dielectric insulating layer. The dielectric layer as formed is preferably a HSQ film which contains the structure Si--O--H. Hydrogen is removed from the dielectric layer by either: a heat treatment in plasma, an ozone reduction process, an ion implantation process, or electron beam bombardment.

Abstract: A gas mixture for etching a polysilicon electrode layer in a plasma etching apparatus, and a method for etching the electrode layer using the same. The etching gas mixture is a mixture of Cl.sub.2 gas and N.sub.2 gas, wherein the N.sub.2 gas is in the range of about 30% by volume of the total volume of Cl.sub.2 gas and N.sub.2 gas combined. In the electrode layer etching method of the present invention, the polysilicon electrode layer is formed on a semiconductor substrate. A mask pattern of an oxide or photoresist is then formed on the electrode layer. The electrode layer is etched using a plasma formed by the gas mixture of Cl.sub.2 gas and N.sub.2 gas, with the mask pattern functioning as an etching mask. An upper power source of the plasma etching apparatus delivers power in the range of about 500 to 1000 W, while the etching gas mixture is formed by supplying Cl.sub.2 gas at a rate of about 100 to 400 sccm, and N.sub.2 gas at a rate of about 3 to 15 sccm.

Abstract: A brushless DC motor having external and internal permanent magnets buried in rotor core in a two-tier structure to form the poles of the rotor, thereby improving efficiency of the motor and reducing vibration and noise, as well.