Patents by Inventor Dongdong Wang

Dongdong Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8822323
    Abstract: A method of manufacturing a semiconductor device having a transition layer, including (a) forming a wiring and a die pad on a wafer, (b) forming a thin film layer on an entire surface of the wafer obtained in the step (a), (c) forming a resist layer on the thin film layer, and forming a thickening layer on a resist layer unformed section, (d) peeling the resist layer, (e) removing the thin film layer by etching, and (f) dividing the wafer to thereby form semiconductor devices.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: September 2, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Hajime Sakamoto, Dongdong Wang
  • Patent number: 8810475
    Abstract: An antenna device has a substrate having a first surface and a second surface on the opposite side of the first surface, a first-surface-side conductive layer formed on the first surface of the substrate, a second-surface-side conductive layer formed on the second surface of the substrate, and through hole conductors connecting the first-surface-side conductive layer and the second-surface-side conductive layer. The first-surface-side conductive layer and the second-surface-side conductive layer are formed such that the first-surface-side conductive layer and the second-surface-side conductive layer are connected via the through hole conductors in a crank form from the first surface to second surface of the substrate.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: August 19, 2014
    Assignees: Ibiden Co., Ltd., Ibiden USA R&D Inc., The Ritsumeikan Trust
    Inventors: Tadahiko Maeda, Masataka Ito, Dongdong Wang, Yoshitsugu Wakazono, Yasuhiko Mano
  • Patent number: 8782882
    Abstract: A method of manufacturing a printed circuit board includes the following steps (A) to (D). (A) Laminating a resin insulating layer on each of two sides of a core member to form a core substrate, (B) forming penetrating openings in the core substrate by applying laser beams, (C) forming a rough surface on the core substrate, and (D) providing a metal film for each penetrating opening to form through holes.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: July 22, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Motoo Asai, Dongdong Wang, Takahiro Mori
  • Patent number: 8780573
    Abstract: A printed circuit board includes an accommodating layer, chip capacitor devices accommodated in the accommodating layer, and a buildup structure formed on the accommodating layer such that the buildup structure covers the chip capacitor devices in the accommodating layer. The buildup structure has mounting conductor structures positioned to mount an IC chip device on a surface of the buildup structure such that the IC chip device is mounted directly over the chip capacitor devices, each of the chip capacitor devices has a dielectric body having a surface facing the buildup structure, a first electrode formed on the dielectric body and extending on the surface of the dielectric body, and a second electrode formed on the dielectric body and extending on the surface of the dielectric body, and the dielectric body is interposed between the first electrode and the second electrode.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: July 15, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi
  • Patent number: 8763241
    Abstract: A method for manufacturing a printed circuit board including providing a first resin substrate having a resin plate and a circuit pattern formed on a surface of the resin plate, providing a second resin substrate having a resin plate and an accommodation portion formed in the resin plate of the second substrate, connecting an electrode of a capacitor to the circuit pattern of the first substrate with a bonding material such that the capacitor is mounted to the first substrate, attaching the second substrate to the resin substrate through a bonding resin layer such that the capacitor on the first substrate is accommodated in the accommodation portion of the second substrate, and forming a via hole in the first substrate such that the via hole is electrically connected to the electrode of the capacitor in the accommodation portion of the second substrate.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: July 1, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Patent number: 8745863
    Abstract: A method of manufacturing a multi-layer printed circuit board includes the following steps (A) and (B). (A) Providing penetrating openings which are formed into through holes and each of which has a small diameter for a core substrate, and (B) providing penetrating openings which are formed into through holes each having a large diameter for the core substrate.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: June 10, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Motoo Asai, Dongdong Wang, Takahiro Mori
  • Patent number: 8717772
    Abstract: A printed circuit board includes a core substrate having an opening portion, an electronic component provided in the opening portion of the core substrate and including a dielectric body, a first electrode formed over the dielectric body, and a second electrode formed over the dielectric body such that the dielectric body is interposed between the first electrode and the second electrode, and a resin filling a gap between the core substrate and the electronic component in the opening portion of the core substrate. The resin filling the gap includes a filler.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: May 6, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Patent number: 8705907
    Abstract: An optical interconnect device includes a first substrate, a second substrate, an optical waveguide, an electrical wiring and a switching device. The first substrate has an electrical wiring circuit, an electrical-optical converter for converting an electrical signal to an optical signal, and a light emitting device for emitting a light. The second substrate has an electrical wiring circuit, an optical-electrical converter for converting the optical signal to the electrical signal, and a light receiving device for receiving the light from the light emitted device. The optical waveguide optically connects the light emitting and light receiving devices. The electrical wiring electrically connects the electrical wiring circuits of the first and second substrates. The switching device determines a fast signal of data to be transmitted via the optical substrate and a slow signal of data to be transmitted via the electrical wiring.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: April 22, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Dongdong Wang, Zhenhua Shao, Xu Huang, Masataka Ito, Christopher Lee Keller
  • Patent number: 8705909
    Abstract: An optical interconnect device including a first printed wiring board, a second printed wiring board facing the first printed wiring board, a light-emitting device positioned on the first printed wiring board and electrically connected to the first printed wiring board, a light-receiving device positioned on the second printed wiring board and electrically connected to the second printed wiring board such that the light-receiving device faces the light-emitting device and receives an optical signal transmitted in a direct line from the light-emitting device, and an electrical-connection device mounted on the first printed wiring board and the second printed wiring board such that the first printed wiring board is electrically connected to the second printed wiring board.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: April 22, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Masataka Ito, Dongdong Wang, Christopher Lee Keller, Yoshitsugu Wakazono
  • Patent number: 8573842
    Abstract: A sensor control circuit for controlling a sensor unit for measuring a physical value includes a timing controller which selects periodically one or more sensor units among multiple sensor units and converts an output signal from the sensor unit to a continuous serial input signal, an oscillator which receives the serial input signal input by the controller and outputs a frequency signal corresponding to the output signal detected by the sensor unit, a counter which counts for a predetermined duration a number of pulses of the frequency signal output from the oscillator, a data converter which converts the number of pulses to voltage data and outputs the data, and an RLC selector which inputs to the converter information indicating a characteristic value on which the number of pulses is based. The characteristic value is resistance, inductance or electrostatic capacitance. The sensor units measure physical values, respectively.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: November 5, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Zhenhua Shao, Christopher Lee Keller, Masataka Ito, Dongdong Wang
  • Publication number: 20130286615
    Abstract: A method for manufacturing a printed circuit board includes forming an opening portion in a substrate, positioning chip capacitors in the opening portion of the substrate such that the chip capacitors are accommodated in the opening portion of the substrate, forming a buildup structure including an interlayer resin insulating layer and a conductive layer over a surface of the substrate and the chip capacitors accommodated in the opening portion of the substrate, and forming on a surface of the buildup structure bump structures positioned to mount an IC chip such that the chip capacitors in the opening portion of the substrate are positioned directly below the IC chip.
    Type: Application
    Filed: June 28, 2013
    Publication date: October 31, 2013
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Patent number: 8533943
    Abstract: A method of manufacturing a multilayer printed circuit board includes preparing a substrate having a first conductor circuit, forming on first circuit formed over substrate a film including cycloolefin resin such that an insulating layer including the resin is formed on substrate and first circuit, forming in insulating layer an opening exposing at least portion of first circuit, forming an electroless plating film covering surface of insulating layer including surface of insulating layer inside opening, forming on electroless film a plating resist layer having pattern exposing selected portions of electroless film, selected portions of electroless film including a second conductor circuit and a portion of electroless film covering opening, and forming an electrolytic plating film covering selected portions of electroless film such that a filled via conductor including an electrolytic material filling space in opening and that first circuit is connected to second circuit via conductor.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: September 17, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Honchin En, Masayuki Hayashi, Dongdong Wang, Kenichi Shimada, Motoo Asai, Koji Sekine, Tohru Nakai, Shinichiro Ichikawa, Yukihiko Toyoda
  • Patent number: 8524535
    Abstract: A transition layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit board 10 without using lead members and a sealing resin. Also, by providing the transition layer 38 made of copper on an aluminum pad 24, it is possible to prevent a resin residue on the pad 24 and to improve connection characteristics between the die pad 24 and a via hole 60 and reliability.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: September 3, 2013
    Assignee: IBIDEN Co., Ltd.
    Inventors: Hajime Sakamoto, Dongdong Wang
  • Patent number: 8453323
    Abstract: A method for manufacturing a printed circuit board, including providing a core substrate having an electronic component accommodated in the core substrate; forming a positioning mark on the core substrate; forming an interlayer insulating layer over the core substrate, the positioning mark and the electronic component; forming a via hole opening connecting to the electronic component through the interlayer insulating layer in accordance with the positioning mark on the core substrate; and forming a via hole structure in the via hole opening in the interlayer insulating layer such that the via hole structure is electrically connected to the electronic component.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: June 4, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Hajime Sakamoto, Tadashi Sugiyama, Dongdong Wang, Takashi Kariya
  • Patent number: 8438727
    Abstract: A method of manufacturing a multilayer printed circuit board having interlayer insulating layers and conductor layers repeatedly formed on a substrate, via holes formed in the interlayer insulating layers, and establishing electrical connection through the via holes, including containing an electronic component in said substrate, forming a positioning mark on said substrate based on a positioning mark of said electronic component, and conducting working or formation based on the positioning mark of said substrate.
    Type: Grant
    Filed: October 1, 2009
    Date of Patent: May 14, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Hajime Sakamoto, Tadashi Sugiyama, Dongdong Wang, Takashi Kariya
  • Publication number: 20130107482
    Abstract: A printed circuit board includes an accommodating layer, chip capacitor devices accommodated in the accommodating layer, and a buildup structure formed on the accommodating layer such that the buildup structure covers the chip capacitor devices in the accommodating layer. The buildup structure has mounting conductor structures positioned to mount an IC chip device on a surface of the buildup structure such that the IC chip device is mounted directly over the chip capacitor devices, each of the chip capacitor devices has a dielectric body having a surface facing the buildup structure, a first electrode formed on the dielectric body and extending on the surface of the dielectric body, and a second electrode formed on the dielectric body and extending on the surface of the dielectric body, and the dielectric body is interposed between the first electrode and the second electrode.
    Type: Application
    Filed: October 31, 2012
    Publication date: May 2, 2013
    Inventors: Yasushi INAGAKI, Motoo ASAI, Dongdong WANG, Hideo YABASHI, Seiji SHIRAI
  • Patent number: 8340480
    Abstract: An opto-electrical hybrid wiring board is formed with a flexible wiring board; a first rigid wiring board and second rigid wiring board connected to each other by the flexible wiring board; a light-emitting element and a light-receiving element, one of which is arranged on the first rigid wiring board and the other on the second rigid wiring board; and a flexible optical waveguide for optically connecting the light-emitting element and the light-receiving element. One end of the flexible wiring board is inserted in and supported by the first rigid wiring board, and the other end is inserted in and supported by the second rigid wiring board; the rigid wiring boards and flexible wiring board are electrically connected to each other by using vias to connect the wiring of the first and second rigid wiring boards and the wiring of the flexible wiring board at the inserted portions.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: December 25, 2012
    Assignee: Ibiden Co., Ltd.
    Inventors: Dongdong Wang, Masataka Ito
  • Patent number: 8331102
    Abstract: Chip capacitors are provided in a printed circuit board. In this manner, the distance between the IC chip and each chip capacitor is shortened, and the loop inductance is reduced. In addition, the chip capacitors are accommodated in a core substrate having a large thickness. Therefore, the thickness of the printed circuit board does not become large.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: December 11, 2012
    Assignee: Ibiden Co., Ltd.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Patent number: 8293579
    Abstract: A transition layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit board 10 without using lead members and a sealing resin. Also, by providing the transition layer 38 made of copper on an aluminum pad 24, it is possible to prevent a resin residue on the pad 24 and to improve connection characteristics between the die pad 24 and a via hole 60 and reliability.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: October 23, 2012
    Assignee: IBIDEN Co., Ltd.
    Inventors: Hajime Sakamoto, Dongdong Wang
  • Patent number: 8288665
    Abstract: A multi-layer printed circuit board including a first insulating layer, a first conductor layer having conductor circuits on one surface of the first insulating layer, a second conductor layer having conductor circuits on the opposite surface of the first insulating layer, a second insulating layer on the second conductor and first insulating layers, and a third conductor layer having conductor circuits on the second insulating layer on the opposite side of the second conductor layer. The first and second insulating layers have first and second via holes which are formed in openings of the first and second insulating layers and made of conductive materials filled to the top of the openings such that conductor circuits in the first and third conductor layers are connected to one or more conductor circuits in the second conductor layer, and the first and second via holes are tapering toward the second conductor layer.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: October 16, 2012
    Assignee: Ibiden Co., Ltd.
    Inventors: Motoo Asai, Dongdong Wang, Takahiro Mori