Abstract: Wavelength-selective films are visibly apparent under the selective wavelength. Wavelength-selective films typically reflect off axis the selected wavelength and therefore can provide high-contrast against a background when applied in a pattern on a substrate. However, it is difficult to apply unique patterned embedded images from film. Disclosed is a cost-effective method and construction of a patterned wavelength-selective image to a substrate. In the disclosed wavelength-selective image, wavelength-selective film particles are applied to an adhesive pattern to create the wavelength-selective image.

Abstract: The present disclosure relates to systems and method for deploying a fiber optic network. Distribution devices are used to index fibers within the system to ensure that live fibers are provided at output locations throughout the system. In an example, fibers can be indexed in multiple directions within the system. In an example, fibers can be stored and deployed form storage spools.

Abstract: A one-time programmable device includes a controller, a protection system, a static storage element and a latch, which can be referred to as a latch-based one-time programmable (OTP) element. In one example, the static storage element includes a thin gate-oxide that acts as a resistance element, which, depending on whether its blown, sets the latch into one of two states.

Abstract: The present invention relates to a multi-port register file memory or SRAM including a plurality of storage elements and other circuitry that operate synchronously or asynchronously. The storage elements are arranged in rows and columns and store data. Two read port pairs are coupled to each of the storage elements and a differential sensing device or circuit. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A column mux circuit is coupled to each column and the sensing device. Performance is not degraded unusually as the power supply voltage is reduced due to bus drop or inductive effects.

Abstract: The present invention relates to a method and circuit for verifying the state of a gated fuse element used with a one-time programmable CMOS memory device. A first expected state is set and a state of a first gate-ox fuse is sensed. The state of the first gate-ox fuse is compared to the first expected state to determine if they are equal, and a first signal is generated. A second expected state is set and a state of a second gate-ox fuse is sensed. The state of the second gate-ox fuse is compared to the second expected state to determine if they are equal, and a second signal is generated. A valid output is generated if both the first and second signals are in a correct state, both signals are high for example.

Abstract: An anti-fuse device includes a substrate and laterally spaced source and drain regions formed in the substrate. A channel is formed between the source and drain regions. A gate and gate oxide are formed on the channel and lightly doped source and drain extension regions are formed in the channel. The lightly doped source and drain regions extend across the channel from the source and the drain regions, respectively, occupying a substantial portion of the channel. Programming of the anti-fuse is performed by application of power to the gate and at least one of the source region and the drain region to break-down the gate oxide, which minimizes resistance between the gate and the channel.

Abstract: The present invention relates to a multi-port register file memory or SRAM including a plurality of storage elements and other circuitry that operate synchronously or asynchronously. The storage elements are arranged in rows and columns and store data. Two read port pairs are coupled to each of the storage elements and a differential sensing device or circuit. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A column mux circuit is coupled to each column and the sensing device. Performance is not degraded unusually as the power supply voltage is reduced due to bus drop or inductive effects.

Abstract: The present invention relates to a multi-port register file memory or SRAM including a plurality of storage elements and other circuitry that operate synchronously or asynchronously. The storage elements are arranged in rows and columns and store data. Two read port pairs are coupled to each of the storage elements and a differential sensing device or circuit. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A column mux circuit is coupled to each column and the sensing device. Performance is not degraded unusually as the power supply voltage is reduced due to bus drop or inductive effects.

Abstract: A one-time programmable device includes a controller, a protection system, a static storage element and a latch, which can be referred to as a latch-based one-time programmable (OTP) element. In one example, the static storage element includes a thin gate-oxide that acts as a resistance element, which, depending on whether its blown, sets the latch into one of two states.

Abstract: A one time programmable memory cell for use in high-density memory devices is provided. The one time programmable memory cell includes a fuse device connected to a bit line and a select device and a select device connected to a row select line and to ground. The fuse device may be a thin oxide transistor having its gate connected to the bit line, its source connected to the select device, and a floating or non-existent. Alternatively, the fuse device may be a thin oxide transistor. The high density memory device includes a plurality of the one time programmable memory cells arranged in an array and adapted to be programmed using a high voltage.

Abstract: A one-time programmable device includes a controller, a protection system, a static storage element and a latch, which can be referred to as a latch-based one-time programmable (OTP) element. In one example, the static storage element includes a thin gate-oxide that acts as a resistance element, which, depending on whether its blown, sets the latch into one of two states.

Abstract: The present invention relates to a multi-port register file memory or SRAM including a plurality of storage elements and other circuitry that operate synchronously or asynchronously, and a method of making the multi-port register file memory. The storage elements are arranged in N rows and M columns and store data, each column having at least one output channel or circuit. Two read port pairs are coupled to each of the storage elements and a plurality of differential sensing devices or circuits. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A column mux circuit is coupled to each column and at least one of the sensing device. The method of forming the multi-port register file memory comprises determining the number of storage elements and arranging the storage elements in the N rows and M columns, each column having an output channel.

Abstract: A one-time programmable device includes a controller, a protection system, a static storage element and a latch, which can be referred to as a latch-based one-time programmable (OTP) element. In one example, the static storage element includes a thin gate-oxide that acts as a resistance element, which, depending on whether its blown, sets the latch into one of two states.

Abstract: An anti-fuse device includes a substrate and laterally spaced source and drain regions formed in the substrate. A channel is formed between the source and drain regions. A gate and gate oxide are formed on the channel and lightly doped source and drain extension regions are formed in the channel. The lightly doped source and drain regions extend across the channel from the source and the drain regions, respectively, occupying a substantial portion of the channel. Programming of the anti-fuse is performed by application of power to the gate and at least one of the source region and the drain region to break-down the gate oxide, which minimizes resistance between the gate and the channel.

Abstract: The present invention relates to storage element. At least one read port is coupled to the storage element and a sensing device is coupled to the read port, where the read port is coupled to the storage element in an isolated manner. The sensing device is adapted to sense a small voltage swing. The sensing device includes two inverters comprising input offset and gain stages.

Abstract: The present invention relates to a programmable memory device and a method of setting a state for a programmable memory device. In at least one embodiment, the memory device comprises at least a level shifter adapted to stand off a high programing voltage to at least one fuse element in the memory device, wherein the high programming voltage is used to set a state of the memory device.

Abstract: The present invention relates to a high voltage switch used with a one-time programmable memory device and a method of setting a state of a one-time programmable memory device using such a high voltage switch. The memory device includes a plurality of one time programmable memory cells arranged in an array and adapted to be programmed using a high voltage, wherein each of the memory cells includes at least one storage element and two gated fuses connected to the storage element. A high voltage switch is connected to at least one of the memory cells and is adapted to switch in a high voltage.

Abstract: The present invention relates to a programmable memory cell and a method of setting a state for a programmable memory cell. The memory cell includes two thin gated fuses adapted to set the state of the memory cell. A level shifter device is connected to the gated fuses and is adapted to stand off a high voltage when setting the state of the memory cell. At least one switch transistor is connected to at least the level shifter device and is adapted to select at least one of the gated fuses, enabling a high voltage to be communicated thereto, thus setting the state of the memory cell.

Abstract: The present invention relates to a high voltage switch used with a one-time programmable memory device and a method of setting a state of a one-time programmable memory device using such a high voltage switch. The memory device includes a plurality of one time programmable memory cells arranged in an array and adapted to be programmed using a high voltage, wherein each of the memory cells includes at least one storage element and two gated fuses connected to the storage element. A high voltage switch is connected to at least one of the memory cells and is adapted to switch in a high voltage.

Abstract: The present invention relates to a method for improving speed and increasing performance in a multi-port register file memory or SRAM including at least one storage element and other circuitry that operate synchronously or asynchronously. The method comprises differentially sensing a small voltage swing in the multi-port memory using a two-stage analog-style sense amplifier including at least one trip-level-shifted inverter device.