Abstract: A system for installing separator grates within a combine may include a grate frame having first and second frame members extending circumferentially between proximal and distal ends. The system may also include a first and second separator grate sections configured to be supported between the frame members along first and second circumferential frame sections of the grate frame, respectively. Additionally, the grate frame may include first and second guide rails extending between the frame members along at least a portion of the first circumferential frame section. When the first separator grate section is being installed from a side of the grate frame located adjacent to the proximal end, at least a portion of the first separator grate section may be configured to ride along the guide rails at a location between the frame member as the first separator grate section is moved towards the distal end of the grate frame.

Abstract: A method of controlling operation of a side-shaking mechanism in a combine is provided. The method includes enabling the side-shaking mechanism, and moving the side-shaking mechanism to a predetermined zero position. The method includes receiving incline data representing the inclination of the combine, and receiving sensed data representing at least one operating condition of a combine system. The method includes causing the side-shaking mechanism to increase the distance of movement of the at least one sieve in the side-to-side motion, or decrease the distance of movement of the at least one sieve in the side-to-side motion.

Abstract: Stacked capacitor structures using TSVs are provided. In one aspect, a stacked capacitor structure includes: a first substrate having at least one first capacitor formed in a TSV in the first substrate; and a second substrate, bonded to the first substrate, having at least one second capacitor formed in a TSV in the second substrate, wherein the first capacitor and the second capacitor each comprises a first electrode and a dielectric that both surround a second electrode that is at a core of the TSV, wherein the dielectric separates the first electrode from the second electrode, and wherein the second substrate is bonded to the first substrate such that the first capacitor is stacked on the second capacitor. A method of forming a stacked capacitor structure is also provided.

Abstract: An agricultural harvester includes a frame; a threshing and separating system carried by the frame; a cleaning system carried by the frame; a mounting surface carried by the frame; and a residue system including a chopper carried by the frame and supplied with crop material from the threshing and separating system and/or the cleaning system. The chopper includes a chopper frame mounted to the mounting surface and having at least one shaft opening formed through; a chopper shaft held in the at least one shaft opening that is configured to rotate and is carried by the frame independently of the chopper frame; at least one rotating knife carried by the chopper shaft; and at least one stationary knife held in the chopper frame.

Abstract: A semiconductor interconnect structure that has a first portion included in an upper interconnect level and a second portion included in a lower interconnect level. The semiconductor interconnect structure has a segment of dielectric capping material that is in contact with the bottom of the first portion, which separates, in part, the upper interconnect level from a lower interconnect level. The second portion is in electrical contact with the first portion.

Abstract: A novel method for the catalytic selective decarboxylation of a starting material to produce an organic acid is disclosed. According to at least one embodiment, the method may include placing a reaction mixture into a reaction vessel, the reaction mixture including a solvent, a starting material, and a catalyst, subjecting the reaction mixture to a predetermined pressure and temperature, and allowing the reaction to continue for 1-3 hours. The starting material may be at least one of a dicarboxylic acid, a tricarboxylic acid, and an anhydride of a dicarboxylic or tricarboxylic acid. As an exemplary embodiment, itaconic acid may be a starting material and the organic acid may be methacrylic acid. The predetermined temperature may be 250° C. or less, and the reaction pressure may be less than 425 psi. Further, a polymerization inhibitor may be used.

Abstract: A spreader arrangement for an agricultural harvester includes a windrow chute having a first position for building a windrow in which the chute angles downwardly from a proximal edge to a distal edge of the chute, and a second position for cleanout of the chute in which the chute angles downwardly from the distal edge to the proximal edge of the chute. Adjustment from the first position to the second position and back to the first position can occur automatically when the combine is operating but not currently harvesting, such as during the time period between when a harvesting swath is completed and the next harvesting swath is commenced, so that accumulated crop residue material can be dislodged from the windrow chute without disrupting harvesting or the windrow building process.

Abstract: A method includes measuring a difference between a primary X-ray diffraction peak and a secondary X-ray diffraction peak, the primary X-ray diffraction peak corresponds to an unstrained portion of a semiconductor substrate and the secondary X-ray diffraction peak corresponds to a strained portion of the semiconductor substrate, the difference between the primary X-ray diffraction peak and the secondary X-ray diffraction peak includes a delta shift peak that corresponds to changes in a crystal lattice caused by a stress applied to the strained portion of the semiconductor substrate, the delta shift peak includes variations in a deep trench capacitance.

Abstract: Techniques relate to treating metallic interconnects of semiconductors. A metallic interconnect is formed in a layer. A metallic cap is disposed on top of the metallic interconnect. Any metallic residue, formed during the disposing of the metallic cap, is converted into insulating material.

Abstract: Embodiments of the present invention provide integrated circuits and methods for activating reactions in integrated circuits. In one embodiment, an integrated circuit is provided having reactive material capable of being activated by electrical discharge, without requiring a battery or similar external power source, to produce an exothermic reaction that erases and/or destroys one or more semiconductor devices on the integrated circuit.

Abstract: Stacked capacitor structures using TSVs are provided. In one aspect, a stacked capacitor structure includes: a first substrate having at least one first capacitor formed in a TSV in the first substrate; and a second substrate, bonded to the first substrate, having at least one second capacitor formed in a TSV in the second substrate, wherein the first capacitor and the second capacitor each comprises a first electrode and a dielectric that both surround a second electrode that is at a core of the TSV, wherein the dielectric separates the first electrode from the second electrode, and wherein the second substrate is bonded to the first substrate such that the first capacitor is stacked on the second capacitor. A method of forming a stacked capacitor structure is also provided.

Abstract: A method for manufacturing a semiconductor device includes conformally depositing a liner layer on a top surface of a dielectric layer, and on sidewall and bottom surfaces of an opening in the dielectric layer, annealing the liner layer, wherein the annealing is performed in at least one of a nitrogen (N2) and ammonia (NH3) ambient, at a temperature of about 60° C. to about 500° C., and at a power of about 200 Watts to about 4500 Watts, and forming a conductive layer on the liner layer on the top surface of the dielectric layer, and on the liner layer in a remaining portion of the opening.

Abstract: A method for manufacturing a semiconductor device includes conformally depositing a liner layer on a top surface of a dielectric layer, and on sidewall and bottom surfaces of an opening in the dielectric layer, annealing the liner layer, wherein the annealing is performed in at least one of a nitrogen (N2) and ammonia (NH3) ambient, at a temperature of about 60° C. to about 500° C., and at a power of about 200 Watts to about 4500 Watts, and forming a conductive layer on the liner layer on the top surface of the dielectric layer, and on the liner layer in a remaining portion of the opening.

Abstract: Disclosed is a method for using a metal catalyst or catalyst precursor that catalyzes the isomerization of an unsaturated fatty acid, unsaturated fatty acid derivative, or an unsaturated triglyceride. Also disclosed is a method for using a metal catalyst or catalyst precursor that catalyzes the decarboxylation of an unsaturated organic compound. Also disclosed is a method for using a catalyst or catalyst precursor for the dual function isomerization and decarboxylation of an unsaturated fatty acid to an unsaturated organic compound.

Abstract: A method includes measuring a difference between a primary X-ray diffraction peak and a secondary X-ray diffraction peak, the primary X-ray diffraction peak corresponds to an unstrained portion of a semiconductor substrate and the secondary X-ray diffraction peak corresponds to a strained portion of the semiconductor substrate, the difference between the primary X-ray diffraction peak and the secondary X-ray diffraction peak includes a delta shift peak that corresponds to changes in a crystal lattice caused by a stress applied to the strained portion of the semiconductor substrate, the delta shift peak includes variations in a deep trench capacitance.

Abstract: A method for manufacturing a semiconductor device includes forming a trench in at least one dielectric layer; and forming an interconnect structure in the trench, wherein forming the interconnect structure includes forming a first conductive layer on a bottom surface of the trench, and partially filling the trench, and forming a second conductive layer on the first conductive layer, and filling a remaining portion of the trench, wherein the second conductive layer comprises a different material from the first conductive layer, and wherein an amount of the first conductive layer in the trench is controlled so that an aspect ratio of the second conductive layer has a value that is determined to result in columnar grain boundaries in the second conductive layer.

Abstract: Disclosed herein are polyketone triglyceride compositions containing 8 to 16 ketone carbonyl moieties per triglyceride unit and methods of making. Also disclosed are polyimine triglyceride compositions having has 8 to 16 nitrogen moieties per triglyceride unit and methods of making. Also disclosed are polyamine triglyceride compositions containing 8 to 16 nitrogen moieties per triglyceride unit and methods of making.

Abstract: A method of fabricating a semiconductor interconnect structure by providing a semiconductor structure that includes two dielectric layers. The first dielectric layer has an embedded electrically conductive structure. A second dielectric layer is located above the first dielectric layer. The second dielectric layer and the first dielectric layer have a segment of a dielectric capping layer and a segment of a metal capping layer located between them. The segment of the dielectric capping layer is horizontally planar with the segment of the metal capping layer. The segment of metal capping layer covers and abuts at least a portion of a top surface of the first electrically conductive structure. The method includes forming an opening in the second dielectric layer and the metal capping layer that exposes at least a portion of the first electrically conductive structure and a portion of the dielectric capping layer.

Abstract: A method for manufacturing a semiconductor device includes conformally depositing a liner layer on a top surface of a dielectric layer, and on sidewall and bottom surfaces of an opening in the dielectric layer, annealing the liner layer, wherein the annealing is performed in at least one of a nitrogen (N2) and ammonia (NH3) ambient, at a temperature of about 60° C. to about 500° C., and at a power of about 200 Watts to about 4500 Watts, and forming a conductive layer on the liner layer on the top surface of the dielectric layer, and on the liner layer in a remaining portion of the opening.

Abstract: Stacked capacitor structures using TSVs are provided. In one aspect, a stacked capacitor structure includes: a first substrate having at least one first capacitor formed in a TSV in the first substrate; and a second substrate, bonded to the first substrate, having at least one second capacitor formed in a TSV in the second substrate, wherein the first capacitor and the second capacitor each comprises a first electrode and a dielectric that both surround a second electrode that is at a core of the TSV, wherein the dielectric separates the first electrode from the second electrode, and wherein the second substrate is bonded to the first substrate such that the first capacitor is stacked on the second capacitor. A method of forming a stacked capacitor structure is also provided.