Abstract: A nonlinear feedback shift register for creating a signature for cryptographic applications includes a sequence of series-connected flip-flops which are connected to each other for forming at least one polynomial, with the aid of at least one signal feedback having at least one operator. The flip-flops are connected to at least one switching operator for forming at least two different polynomials, the switching operator switching between the polynomials as a function of an input signal. A method for nonlinear signature formation is also provided.

Abstract: In a method for controlling a data exchange between at least one set of data sinks and at least one set of data sources in circuit configurations and circuit sequences, which circuit configurations have at least one arbitration unit, the arbitration unit selects a first data sink (data sink arbitration) and a first data source (data source arbitration) according to a predefined sequence, and outputs an address of a first data source and a request signal and an address of a first data sink and a validity signal. Data of the first data source are stored in the first data sink.

Abstract: A method and device for monitoring functions of a computer system having at least two execution units, a switchover unit being provided, and switchover operations being carried out between at least two operating modes, and a comparison unit being provided, a first operating mode corresponding to a comparison mode and a second operating mode corresponding to a performance mode, and a first function being monitored by a second function, the second function being executed in the comparison mode on at least two execution units, and each of these two second functions, which are executed on at least two execution units, monitoring the same first function.

Abstract: A method and device for performing switchover operations in a computer system having at least two execution units are provided, in which switchover units are included which are configured in such a way that they switch over between at least two operating modes, a first operating mode corresponding to a compare mode, and a second operating mode corresponding to a performance mode. An interrupt controller is provided and, furthermore, at least three memory areas are provided, and the access to the memory areas is implemented in such a way that one first memory area is assigned to at least one first execution unit, and one second memory area is assigned to the at least one second execution unit, and at least one third memory area is assignable to the at least two execution units.

Abstract: A method and a circuit configuration for generating a bit vector are described. At least two configurations, each having state machines of the same design, are used, to whose inputs an input signal is sent and which generate an output signal as a function of their state, each state machine always having a different state than the other state machine of one configuration, so that the bit vector is generated by a linear gating of the output signals of the state machines of different configurations.

Abstract: For checking an address decoder of a data memory, from a record of addresses of the data memory, designated as base addresses, one after another each base address is selected, and the following steps are executed for the respectively selected base address: a) determining the content of the base address; and b) selecting an address having the Hamming distance 1 from the base address, designated as the Hamming address; and then: c) changing the content of the Hamming address selected in step b); and then: d) reading the base address and detecting an error of the address decoder if the content read differs from that determined in step a); and e) recovering the content of the Hamming address.

Abstract: A method and a device for controlling a computer system having at least two execution units, switchover operations being carried out between at least two operating modes, and a first operating mode corresponding to a comparison mode and a second operating mode corresponding to a performance mode. At least one set of runtime objects is defined; at least one identifier is assigned to each runtime object of the defined set; and the identifier assigns at least the two operating modes to the runtime object.

Abstract: A method and a device for transmitting information in a network having at least three subscribers, as well as a corresponding network, the information being transmitted in at least a first frame of a predefined length and structure, and the first frame on a first transmission path being transmitted in a loop to the next, second subscriber in each instance, given a predefined transmission direction, the information being additionally transmitted in a second frame having the same length and structure as the first frame, the second frame on a second transmission path being transmitted to a one-after-the-next, third subscriber, the second transmission path and, thus, the second frame skipping the second subscriber, and an assessment being made in dependence upon at least one criterion, thus information, length or structure.

Abstract: A signal acquisition device which receives an input signal, a physical data and a timing data to generate an output data. The signal acquisition device keeps monitoring the input signal for a valid edge. When a valid edge is detected, the signal acquisition device reads the physical data from a physical data processing module and a timing data from a timing module to generate the output data which comprises the new state of the input signal, the physical data and the timing data. The output data is written to a storage arrangement and also sent out to CPU or any other devices.

Abstract: A vehicle-supported data processing system includes a plurality of processing units communicating with one another via a bus system, which are each supplied with operating power by at least one of the at least two different vehicle electrical systems. Multiple transmitter units for control information and multiple receiver units for the control information are among the processing units. The bus system is a ring bus, in which each processing unit is connected to at least two adjacent processing units by a bus segment in each case. The ring bus is divided, by potential separating devices, which are incorporated in the bus segments which connect processing units powered by different vehicle electrical systems, into a number of sections, which is smaller than the number of the processing units.

Abstract: A method and a device are provided for performing switching and data comparison in a computer system having at least two processing units which each process data at a specified clock pulse, in which a switchover arrangement is provided and switching takes place between at least two operating modes, and a comparison unit is provided. A first operating mode corresponding to a compare mode is provided, and a second operating mode corresponding to a performance mode is provided. A synchronization arrangement is provided which assigns to the specifiable data a clock pulse information as a function of a processing unit, and at least the comparison unit takes into consideration this clock pulse information in the corresponding data.

Abstract: A device and method for configuring a semiconductor circuit having at least two identical or similar functional units, the faulty unit being identified and deactivated if an error occurs in at least one of the identical or similar functional units.

Abstract: A method and device for controlling a computer system having at least two execution units and having at least two groups of internal states, in particular processor states, in at least one of the execution units, and having a switchover device, through which it is possible to switch between at least two different operating modes, in particular a performance mode and a compare mode, of the computer system, wherein a switchover is triggered by the fact that at least one execution unit changes its internal state.

Abstract: In a method for error handling in transmission of a datum over a communications system, at least two data words consisting of bits are generated for the datum in accordance with a predefined coding rule, and one of the generated data words is selected taking into consideration a running digital sum formed over the corresponding data word, and the running digital sum of the selected data word is used for the formation of a first running digital sum. The selected data word is converted into a code data word, and a bit of the data word is in each case assigned a two-bit string with two different single-bit values. The code data word and the first running digital sum are transmitted. The received code data word is examined to ascertain whether an erroneous two-bit string exists, in which case the error is corrected using the first running digital sum.

Abstract: A method and device for controlling memory access in a computer system having at least two execution units, a buffer, in particular a cache being provided for each execution unit, and furthermore a switchover device and a comparison device being provided, the system switching between a performance mode and a compare mode, wherein in the performance mode each execution unit accesses the buffer assigned to it and in the compare mode both execution units access one buffer.

Abstract: A method for the manipulation-proof transmission of data from a transmitter to a receiver, a test part being generated in the transmitter from the data using a secret key and communicated together with the data to the receiver, where a verification test part is generated from the received data using the same secret key and is compared to the received test part. Before the generation of the test part, the data are nonlinearly compressed using at least one feedback shift register. In addition, a device for the manipulation-proof transmission of data.

Abstract: A method and device for controlling memory access in a computer system having at least two execution units, a buffer area, in particular a cache memory area being provided for each execution unit, and furthermore a switchover device and a comparison device being provided, the system switching between a performance mode and a compare mode, wherein in the performance mode each execution unit accesses the buffer area assigned to it and in the compare mode both execution units access one buffer area that can be predefined, the buffer areas being configurable.

Abstract: The invention relates to a method and device for monitoring operations of a computer system comprising at least two execution units, wherein switching means are provided and make it is possible to switch at least two operating modes to each other and comparison means are provided, the first operating mode corresponds to the comparison mode and the second operating mode corresponds to the performance mode and the first operation is monitored by the second operation, in the comparison mode said second operation is run on at least two execution units and each second operation which is run on at least two execution units monitors the first operation.

Abstract: A method for transmitting data, in which a first signature is formed according to a specifiable signature formation method as a function of the data to be transmitted, the first signature is transmitted together with the data a second signature is formed according to the signature formation method as a function of the transmitted data and the first signature is compared with the second signature. To reduce the likelihood of fault masking in monitoring the transmission of the data using signature analysis, a provision is made to invert the data to be transmitted, to form the first signature according to the specifiable signature formation method as a function of the data to be transmitted and of the inverted Data, to transmit the first signature and the data to invert the transmitted data, to form the second signature according to the signature formation method as a function of these inverted data and the transmitted data, and to compare the first signature with the second signature.

Abstract: In a method and a device for decoding a signal, the signal is transmitted via at least one connecting line of a data transmission system, in a user of the data transmission system receiving the signal. It is provided to measure the interval of a change—provided compulsorily in a transmission protocol used in the data transmission system—of the signal from rising to falling or from falling to rising edge. A tendency for an asymmetrical delay of the signal can be ascertained from the measured interval. The sampling of the bits of the received signal can be improved as a function of the interval or of the asymmetrical delay, for example, by setting the sampling instant in variable fashion. Alternatively, the interval or the asymmetrical delay can be utilized for diagnostic purposes.